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Graphics Adapter for Retropixel Yeeting. An experiment for now, who knows what might happen.
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David Anderson 79b54ca86f vram/MemArbiter: add a granted_port method to make downstream wiring easier 
To implement the mux tree that feeds into RAM ports, we need to know the
port index of the grantee to be able to wire it up. In theory we could
dispense with the per-port grant signal, but keeping it around allows
each client to deal with local concerns separate from the port routing.
 		2024-09-08 23:16:49 -07:00
experiments vram/MemArbiter: fix bug with write conflict avoidance 2024-09-08 15:02:55 -07:00
hardware/sentinel65x hardware/sentinel65x: comment out logic 2024-09-08 15:16:34 -07:00
images Add tentative requirements document to capture requests. 2024-08-14 09:39:42 -07:00
lib lib/ClockOut: hack module to export a clock as an ordinary signal 2024-09-07 10:06:50 -07:00
scripts Grab the inout port fixer from bsc tree, wire it in 2024-09-06 21:26:39 -07:00
sim Add some early testing harness for the sim DP16KD 2024-08-30 22:14:10 -07:00
vram vram/MemArbiter: add a granted_port method to make downstream wiring easier 2024-09-08 23:16:49 -07:00
.gitignore add a simple build/test script 2024-08-14 09:39:42 -07:00
.svlint.toml Add svlint config 2024-08-23 00:21:15 -07:00
LICENSE Initial basic files 2024-08-13 22:24:20 -07:00
Requirements.md Requirements.md: fix image insertion syntax 2024-08-14 09:44:14 -07:00
flake.lock flake.lock: update tools 2024-09-06 21:17:32 -07:00
flake.nix sim: implementation of a simulation model DP16KD 2024-08-30 18:54:54 -07:00
tasks.py tasks.py: fix typo in synth process 2024-09-07 16:03:52 -07:00