 David Anderson
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ae90803026
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tiler/Tiler: start of tiling engine.
Some internal modules are written, with tests. Top-level tiler module
still TODO.
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2024-09-23 15:11:44 -07:00 |
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David Anderson
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f7e3f36254
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vram/VRAM: add tests for the arbitration glue and the entire VRAM stack
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2024-09-14 20:26:55 -07:00 |
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David Anderson
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65d13a0e50
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vram/VRAM: only expect a response on reads
The VRAMCore doesn't generate responses for writes, so demanding one here
deadlocks the port the first time it writes something.
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2024-09-14 20:24:40 -07:00 |
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David Anderson
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23a78eee9e
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vram/VRAM: a little more documentation tweaking
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2024-09-08 23:44:45 -07:00 |
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David Anderson
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16af267ab6
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vram/VRAM: tweak docs, remove unnecessary rule condition
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2024-09-08 23:42:27 -07:00 |
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David Anderson
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1929bbe3cc
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vram/VRAM: at last, a video RAM, with all the gubbins
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2024-09-08 23:39:12 -07:00 |
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David Anderson
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2760bad965
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vram: move VRAM to VRAMCore, in prep for arbitrated VRAM
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2024-09-08 09:28:28 -07:00 |
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David Anderson
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b2b2c14009
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vram/VRAM: finish the top-level VRAM module
Well, for now at least. It can build 112KiB and 128KiB memories that
seem to synthesize to something reasonable.
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2024-09-07 16:04:21 -07:00 |
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David Anderson
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f7cb4b6ba2
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vram/VRAM: early VRAM implementation
Only checked up to mkByteRAMArray, main VRAM still WIP
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2024-09-06 16:11:55 -07:00 |