vram/VRAM: a little more documentation tweaking
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@ -69,8 +69,10 @@ interface VRAM;
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interface VRAMServer sprite;
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endinterface
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// mkVRAM constructs a VRAM of the requested size. Memory access is
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// spread across two internal ports as follows:
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// mkVRAM constructs a VRAM of the requested size. The memory size must be a multiple of
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// 4KiB, with a maximum of 128KiB.
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//
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// Memory accesses are spread across two internal ports as follows:
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//
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// Port A: strict most-important-wins priority: CPU, then debugger,
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// then palette DAC.
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@ -85,8 +87,8 @@ module mkVRAM(Integer num_kilobytes, VRAM ifc);
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MemArbiter#(3, VRAMAddr) arbB <- mkRoundRobinMemArbiter();
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Vector#(3, VRAMServer) portB <- mkArbitratedVRAMServers(ram.portB, arbB);
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// Connect up the arbiters so they correctly prevent write-write
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// and write-read conflicts.
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// Connect the arbiters together so they correctly prevent
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// write-write and write-read conflicts.
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mkConnection(arbA, arbB);
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interface cpu = portA[0];
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