diff --git a/vram/VRAM.bsv b/vram/VRAM.bsv
index d7c0593..a128dc8 100644
--- a/vram/VRAM.bsv
+++ b/vram/VRAM.bsv
@@ -69,8 +69,10 @@ interface VRAM;
    interface VRAMServer sprite;
 endinterface
 
-// mkVRAM constructs a VRAM of the requested size. Memory access is
-// spread across two internal ports as follows:
+// mkVRAM constructs a VRAM of the requested size. The memory size must be a multiple of
+// 4KiB, with a maximum of 128KiB.
+//
+// Memory accesses are spread across two internal ports as follows:
 //
 // Port A: strict most-important-wins priority: CPU, then debugger,
 //         then palette DAC.
@@ -85,8 +87,8 @@ module mkVRAM(Integer num_kilobytes, VRAM ifc);
    MemArbiter#(3, VRAMAddr) arbB <- mkRoundRobinMemArbiter();
    Vector#(3, VRAMServer) portB <- mkArbitratedVRAMServers(ram.portB, arbB);
 
-   // Connect up the arbiters so they correctly prevent write-write
-   // and write-read conflicts.
+   // Connect the arbiters together so they correctly prevent
+   // write-write and write-read conflicts.
    mkConnection(arbA, arbB);
 
    interface cpu = portA[0];