707 B
707 B
- Need a Vera demo with new kernel code
- address timing - bsx just runs flat out right now, want stable 8 Mhz.
- hardware updates
- add other I/O & 65c265 features
TODO Need a Vera demo with new kernel code
TODO address timing - bsx just runs flat out right now, want stable 8 Mhz.
- instrumentation: how fast are we going?
TODO hardware updates
- VERA
- SDL Events (Keyboard & Controllers)
- Timer 5. -> calls CPU_addIrqt5() question How do the timers work? Do they count FCLK cycles? we might have to update timer 5 by more than 1 at a time. (i.e. depends on cycles)