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Sentinel65X-Handbook
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Memory Management.md
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# Memory Management
Sentinel 65X, having a [65816-compatible CPU](CPU.md), has a 24-bit address bus, which allows for up to 16MB of linear address space. This space must contain all RAM, ROM, and I/O devices on the system, as the 65816 bus has no distinct notion of I/O addresses separate from memory addresses — it is a memory-mapped I/O architecture.
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# Memory Management
Sentinel 65X, having a [65816-compatible CPU](CPU.md), has a 24-bit address bus, which allows for up to 16MB of linear address space. This space must contain all RAM, ROM, and I/O devices on the system, as the 65816 bus has no distinct notion of I/O addresses separate from memory addresses — it is a memory-mapped I/O architecture.
## Memory Regions ## Memory Regions
The 16MB address space of Sentinel 65X is divided into regions as follows: The 16MB address space of Sentinel 65X is divided into regions as follows: