From c7eea7f30673844acd68a42706cc87ccc93a4525 Mon Sep 17 00:00:00 2001 From: Kyle Cardoza Date: Fri, 22 Mar 2024 01:22:30 -0400 Subject: [PATCH] Added sections --- Memory Management.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Memory Management.md b/Memory Management.md index 5a8cbc1..3c79e2b 100644 --- a/Memory Management.md +++ b/Memory Management.md @@ -1,12 +1,12 @@ -# Memory Management - -Sentinel 65X, having a [65816-compatible CPU](CPU.md), has a 24-bit address bus, which allows for up to 16MB of linear address space. This space must contain all RAM, ROM, and I/O devices on the system, as the 65816 bus has no distinct notion of I/O addresses separate from memory addresses — it is a memory-mapped I/O architecture. - --- gitea: none include_toc: true --- +# Memory Management + +Sentinel 65X, having a [65816-compatible CPU](CPU.md), has a 24-bit address bus, which allows for up to 16MB of linear address space. This space must contain all RAM, ROM, and I/O devices on the system, as the 65816 bus has no distinct notion of I/O addresses separate from memory addresses — it is a memory-mapped I/O architecture. + ## Memory Regions The 16MB address space of Sentinel 65X is divided into regions as follows: