David Anderson
930f9f7078
The PLL generates a 100MHz clock for GARY, 10MHz for the CPU and system bus, and 25MHz for VGA out. |
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.. | ||
PLL.bsv | ||
PLL.v |
David Anderson
930f9f7078
The PLL generates a 100MHz clock for GARY, 10MHz for the CPU and system bus, and 25MHz for VGA out. |
||
---|---|---|
.. | ||
PLL.bsv | ||
PLL.v |