David Anderson
7560199251
tasks: support running nextpnr with a generic ulx3s pin map
...
This is handy for quick experiments, rather than having to define a
bespoke pin map for each experiment.
2024-09-06 16:11:03 -07:00
David Anderson
2953106ec7
lib/ECP5_RAM: mark interfaces always_ready
...
Elides a couple of unnecessary signals from the design
2024-09-06 16:10:22 -07:00
David Anderson
efb5327f53
lib: clean up ECP5_RAM.v a bit
2024-08-31 00:00:41 -07:00
David Anderson
e57f7e05b0
lib/ECP5_RAM: fixups based on checking synth output
2024-08-23 00:22:48 -07:00
David Anderson
b73a211ec4
lib/ECP5_RAM: clean up old core, fix error in module docstring
2024-08-20 19:25:04 -07:00
David Anderson
1ccd1b0072
lib/DelayLine: add a bit more documentation
2024-08-20 09:15:52 -07:00
David Anderson
5df41d4b94
lib: use DelayLine in ECP5_RAM
...
Cleans up the code nicely, and still produces the correct logic.
2024-08-20 00:54:50 -07:00
David Anderson
f1e705fd31
lib: add more documentation
2024-08-20 00:29:32 -07:00
David Anderson
85e27554ec
lib: add a DelayLine module
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A delay line takes a write and echoes it back N cycles later,
with N fixed at compile time. It's a handy primitive to have
when wrapping Verilog blackbox modules because the blackbox
often specifies something like having 2 cycles of latency,
and so you need to bubble the fact that a write occurred 2
cycles ago through to the output so that you can wire up the
right implicit conditions.
2024-08-19 23:00:15 -07:00
David Anderson
da6ea4cf42
lib: flesh out the ECP5 EBR modules, write copious documentation
2024-08-18 16:12:57 -07:00
David Anderson
a23661a449
lib: default clocks and resets to the ambient ones from context
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Callers can still specify whacky cross-domain RAMs in the cfg, but the
default is what you usually want: a dual-port RAM with both ports in the
caller's clock/reset domain.
2024-08-17 16:39:45 -07:00
David Anderson
e64b990f80
lib: fix port B reset wiring for ECP5_RAM
2024-08-17 16:38:52 -07:00
David Anderson
8d2261e245
lib: initial implementation of an ECP5 EBR primitive
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Only the core unconditioned primitive right now, and still needs refining.
2024-08-17 15:43:36 -07:00
David Anderson
39e17f8e42
lib: add test helpers for timeouts and sequential test running
2024-08-14 09:39:42 -07:00
David Anderson