vram: fix up documentation for MemoryArbiterWriter

This commit is contained in:
David Anderson 2024-08-31 13:25:04 -07:00
parent e0d156cdd1
commit 71f422b8c1
1 changed files with 4 additions and 5 deletions

View File

@ -7,9 +7,9 @@ export MemoryArbiterReader(..);
export MemoryArbiter(..); export MemoryArbiter(..);
export mkMemoryArbiter; export mkMemoryArbiter;
// A MemoryArbiterWriter can request use of a memory port to write to // A MemoryArbiterWriter can request use of a memory port to read or
// an address. When a request is feasible, grant() returns True in the // write to an address. When a request is feasible, grant() returns
// same cycle. // True in the same cycle.
(* always_ready *) (* always_ready *)
interface MemoryArbiterWriter#(type addr); interface MemoryArbiterWriter#(type addr);
method Action request(Bool write, addr address); method Action request(Bool write, addr address);
@ -26,8 +26,7 @@ interface MemoryArbiterReader#(type addr);
endinterface endinterface
// A MemoryArbiter manages concurrent access to memory ports. It // A MemoryArbiter manages concurrent access to memory ports. It
// mediates access between 2 writers and 4 readers, which are // mediates access between 2 writers and 4 readers.
// statically allocated to one of 2 internal memory ports.
interface MemoryArbiter#(type addr); interface MemoryArbiter#(type addr);
// Assigned to port A. // Assigned to port A.
interface MemoryArbiterWriter#(addr) cpu; interface MemoryArbiterWriter#(addr) cpu;