vram: fix up documentation for MemoryArbiterWriter
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@ -7,9 +7,9 @@ export MemoryArbiterReader(..);
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export MemoryArbiter(..);
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export MemoryArbiter(..);
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export mkMemoryArbiter;
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export mkMemoryArbiter;
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// A MemoryArbiterWriter can request use of a memory port to write to
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// A MemoryArbiterWriter can request use of a memory port to read or
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// an address. When a request is feasible, grant() returns True in the
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// write to an address. When a request is feasible, grant() returns
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// same cycle.
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// True in the same cycle.
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(* always_ready *)
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(* always_ready *)
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interface MemoryArbiterWriter#(type addr);
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interface MemoryArbiterWriter#(type addr);
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method Action request(Bool write, addr address);
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method Action request(Bool write, addr address);
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@ -26,8 +26,7 @@ interface MemoryArbiterReader#(type addr);
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endinterface
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endinterface
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// A MemoryArbiter manages concurrent access to memory ports. It
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// A MemoryArbiter manages concurrent access to memory ports. It
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// mediates access between 2 writers and 4 readers, which are
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// mediates access between 2 writers and 4 readers.
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// statically allocated to one of 2 internal memory ports.
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interface MemoryArbiter#(type addr);
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interface MemoryArbiter#(type addr);
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// Assigned to port A.
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// Assigned to port A.
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interface MemoryArbiterWriter#(addr) cpu;
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interface MemoryArbiterWriter#(addr) cpu;
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