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Fixed SRAM select logic and /RD timing bug in PLD

This commit is contained in:
Kyle J Cardoza 2024-07-14 18:44:45 -04:00
parent fda2598e06
commit 9e6c1915ee
5 changed files with 8 additions and 7 deletions
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0
PLD/Prototype 4/Sentinel 65X Prototype 4.chp Normal file → Executable file
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4
PLD/Prototype 4/Sentinel 65X Prototype 4.fus Normal file → Executable file
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@ -16,8 +16,8 @@ Pin 23 = /WR S0 = 0 S1 = 1
Pin 22 = /RD S0 = 0 S1 = 1 Pin 22 = /RD S0 = 0 S1 = 1
10 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 10 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
11 x--- x--- ---- ---- ---- ---- ---- ---- ---- ---- ---- 11 ---- x--- ---- ---- ---- ---- ---- ---- ---- ---- ----
12 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx 12 ---- -x-- ---- ---- ---- ---- ---- ---- ---- ---- ----
13 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx 13 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx
14 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx 14 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx
15 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx 15 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx

7
PLD/Prototype 4/Sentinel 65X Prototype 4.jed Normal file → Executable file
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@ -8,7 +8,8 @@ Device: GAL22V10
*L0044 11111111111111111111111111111111111111111111 *L0044 11111111111111111111111111111111111111111111
*L0088 01111011111111111111111111111111111111111111 *L0088 01111011111111111111111111111111111111111111
*L0440 11111111111111111111111111111111111111111111 *L0440 11111111111111111111111111111111111111111111
*L0484 01110111111111111111111111111111111111111111 *L0484 11110111111111111111111111111111111111111111
*L0528 11111011111111111111111111111111111111111111
*L0924 11111111111111111111111111111111111111111111 *L0924 11111111111111111111111111111111111111111111
*L0968 11111111101111111111111111111111111111111111 *L0968 11111111101111111111111111111111111111111111
*L1012 11111111111111111111101110111011011101111111 *L1012 11111111111111111111101110111011011101111111
@ -22,6 +23,6 @@ Device: GAL22V10
*L3124 11111111111110111111111111111111111101111111 *L3124 11111111111110111111111111111111111101111111
*L5808 01010100010100000000 *L5808 01010100010100000000
*L5828 0101001101000101010011100101010001001001010011100100010101001100 *L5828 0101001101000101010011100101010001001001010011100100010101001100
*C53d6 *C58d0
* *
b9c8 c3a2

0
PLD/Prototype 4/Sentinel 65X Prototype 4.pin Normal file → Executable file
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4
PLD/Prototype 4/Sentinel 65X Prototype 4.pld Normal file → Executable file
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@ -6,7 +6,7 @@ NC NC NC NC NC /RAM1 /RAM0 /ROM1 /ROM0 /RD /WR VCC
WR = PHI2 * /RW WR = PHI2 * /RW
RD = PHI2 * RW RD = RW + /RW
RAM0 = CS5 * /A19 * /A20 * /A21 * /A22 * /A23 RAM0 = CS5 * /A19 * /A20 * /A21 * /A22 * /A23
@ -22,4 +22,4 @@ ROM0 = CS4 +
DESCRIPTION DESCRIPTION
PLD Logic for the Sentinel 65X PLD PLD Logic for the Sentinel 65X PLD