commit cafbf52f2f3e946361ff5d3ba354f8c5f9b023b9 Author: Rebecca Buckingham Date: Mon Jul 22 20:48:34 2024 -0400 First commit. diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..b215c99 --- /dev/null +++ b/.gitignore @@ -0,0 +1,61 @@ +# Prerequisites +*.d + +# Object files +*.o +*.ko +*.obj +*.elf + +# Linker output +*.ilk +*.map +*.exp + +# Precompiled Headers +*.gch +*.pch + +# Libraries +*.lib +*.a +*.la +*.lo + +# Shared objects (inc. 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If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + Copyright (C) + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..3454926 --- /dev/null +++ b/Makefile @@ -0,0 +1,26 @@ +# Variables +CC = gcc +CFLAGS = -Wall -Wextra -std=c11 -I/usr/local/include/SDL2 +LDFLAGS = -L/usr/local/lib -lSDL2 +SRC_DIR = src +SOURCES = $(wildcard $(SRC_DIR)/*.c) +OBJECTS = $(SOURCES:$(SRC_DIR)/%.c=%.o) +TARGET = bsx + +# Default target +all: $(TARGET) + +# Linking +$(TARGET): $(OBJECTS) + $(CC) $(LDFLAGS) -o $@ $^ + +# Compiling +%.o: $(SRC_DIR)/%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# Clean up +clean: + rm -f $(OBJECTS) $(TARGET) + +# Phony targets +.PHONY: all clean diff --git a/README.org b/README.org new file mode 100644 index 0000000..ee4bcb8 --- /dev/null +++ b/README.org @@ -0,0 +1,34 @@ +#+TITLE: Bsx : Sentinel 65X System Emulator + +(C)opyright 2024, Rebecca Buckingham. + +* License + - lib65816 code is licensed GPL3. + - VERA emulation is licensed 2-clause BSD. + - All other code is licensed GPL3. + +* Requirements + - SDL2 development libraries need to be installed. + +* Installation + - Run make, then copy the bsx executable whereever you want it. + +* Usage + - bsx path_to_rom_file + +* Status +** What's done + 1) 65C816 emulation via lib65816. + 2) Selected 65C265 features. (Can be disabled by undefining CPU65265 in opcodes.h.) + - 65C265 Vectors are implemented. (COP, ABORT, NMI, IRQ) + - Added some 65C265-specific IRQ sources and vectors: IRQT5, IRNE64. + 3) VERA emulation via code extracted from X16 emulator. + 4) Loading of selected BIOS ROM. +** What's not done (i.e. TODO List) + 1) System timing. Emulation always runs flat out instead at stable 8 Mhz. + 2) Clean up dispatch loop in dispatch.c for easier maintenance. + 3) Keyboard emulation. + 4) Timer emulation. (Start with timer #5) + 5) SD Card emulation. + 6) Audio emulation. + 7) SNES controller emulation. diff --git a/bsxmac.xcodeproj/project.pbxproj b/bsxmac.xcodeproj/project.pbxproj new file mode 100644 index 0000000..2c40a38 --- /dev/null +++ b/bsxmac.xcodeproj/project.pbxproj @@ -0,0 +1,297 @@ +// !$*UTF8*$! +{ + archiveVersion = 1; + classes = { + }; + objectVersion = 56; + objects = { + +/* Begin PBXFileReference section */ + B309DC412C489D4500A7FE20 /* sdl_events.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; path = sdl_events.h; sourceTree = ""; }; + B309DC422C489D4500A7FE20 /* sdl_events.c */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.c; path = sdl_events.c; sourceTree = ""; }; + B334DFC62C485851001B5E35 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; path = Makefile; sourceTree = ""; }; + B334DFC72C485851001B5E35 /* config.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; 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THIS FILE IS AUTOMATICALLY GENERATED. */ + +#define SIZEOF_LONG 8 +#define SIZEOF_INT 4 +#define SIZEOF_SHORT 2 +#define DEBUG 1 +#endif diff --git a/src/cpu.c b/src/cpu.c new file mode 100644 index 0000000..66b9661 --- /dev/null +++ b/src/cpu.c @@ -0,0 +1,92 @@ +/* + * lib65816/cpu.c Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (cpu.c) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +#include "config.h" +#include "cpu.h" + +int cpu_reset; +int cpu_abort; +int cpu_nmi; +word32 cpu_irq; +int cpu_stop; +int cpu_wait; +int cpu_trace; +int cpu_irne64; +int cpu_irqt5; + +word32 cpu_update_period; +#if defined( __sparc__ ) && defined( __GNUC__ ) +register word32 cpu_cycle_count asm ("g5"); +#else +word32 cpu_cycle_count; +#endif + +void CPU_setUpdatePeriod(word32 period) +{ + cpu_update_period = period; +} + +void CPU_setTrace(int mode) +{ + cpu_trace = mode; +} + +void CPU_reset(void) +{ + cpu_reset = 1; +} + +void CPU_abort(void) +{ + cpu_abort = 1; +} + +void CPU_nmi(void) +{ + cpu_nmi = 1; +} + +void CPU_addIRQ( word32 m ) +{ + cpu_irq |= m; +} + +void CPU_clearIRQ( word32 m ) +{ + cpu_irq &= ~m; +} + +void CPU_setRunAddress(word32 address) +{ + PC.W.PC = address & 0xffff; + PC.B.PB = (address >> 16) & 0xff; +} + +void CPU_addIrne64( word32 m ) +{ + cpu_irne64 |= m; +} + +void CPU_clearIrne64( word32 m ) +{ + cpu_irne64 &= ~m; +} + +void CPU_addIrqt5( word32 m ) +{ + cpu_irqt5 |= m; +} + +void CPU_clearIrqt5( word32 m) +{ + cpu_irqt5 &= ~m; +} diff --git a/src/cpu.h b/src/cpu.h new file mode 100644 index 0000000..cf28f89 --- /dev/null +++ b/src/cpu.h @@ -0,0 +1,230 @@ +#ifndef LIB65816_CPU_H +#define LIB65816_CPU_H + +/* + * lib65816/cpu.h Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (gscpu.h) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +#include "config.h" + + +/* Type definitions for convenience. These are not intended to be used + * outside the scope of lib65816, since it might conflict with other + * libraries type definitions. + */ + +typedef unsigned char byte; +typedef signed char sbyte; + +#if SIZEOF_LONG == 4 +typedef unsigned long word32; +typedef signed long sword32; +#elif SIZEOF_INT == 4 +typedef unsigned int word32; +typedef signed int sword32; +#endif + +#if SIZEOF_SHORT == 2 +typedef unsigned short word16; +typedef signed short sword16; +#elif SIZEOF_INT == 2 +typedef unsigned int word16; +typedef signed int sword16; +#endif + +typedef signed char offset_s; /* short offset */ +typedef signed short offset_l; /* long offset */ + + + +/* + * Union definition of a 16-bit value that can also be + * accessed as its component 8-bit values. Useful for + * registers, which change sized based on teh settings + * the M and X program status register bits. + */ + +typedef union { +#ifdef WORDS_BIGENDIAN + struct { byte H,L; } B; +#else + struct { byte L,H; } B; +#endif + word16 W; +} dualw; + +/* Same as above but for addresses. */ + +typedef union { +#ifdef WORDS_BIGENDIAN + struct { byte Z,B,H,L; } B; + struct { word16 H,L; } W; +#else + struct { byte L,H,B,Z; } B; + struct { word16 L,H; } W; +#endif + word32 A; +} duala; + + + +/* Definitions of the 65816 registers, in case you want + * to access these from your own routines (such as from + * a WDM opcode handler routine. + * + * ATTENTION: DO NOT DEPEND ON THESE -- THESE WILL EVENTUALLY BE REPLACED + * WITH A STRUCTURE THAT MAINTAINS ALL CPU STATE. + */ + +extern dualw A; /* Accumulator */ +extern dualw D; /* Direct Page Register */ +extern byte P; /* Processor Status Register */ +extern int E; /* Emulation Mode Flag */ +extern dualw S; /* Stack Pointer */ +extern dualw X; /* X Index Register */ +extern dualw Y; /* Y Index Register */ +extern byte DB; /* Data Bank Register */ + +#ifndef CPU_DISPATCH + +extern union { /* Program Counter */ +#ifdef WORDS_BIGENDIAN + struct { byte Z,PB,H,L; } B; + struct { word16 Z,PC; } W; +#else + struct { byte L,H,PB,Z; } B; + struct { word16 PC,Z; } W; +#endif + word32 A; +} PC; + +#endif + + + +/* Current cycle count */ + +#if defined ( __sparc__ ) && defined ( __GNUC__ ) +register word32 cpu_cycle_count asm ("g5"); +#else +extern word32 cpu_cycle_count; +#endif + + + +/* These are the core memory access macros used in the 65816 emulator. + * Set these to point to routines which handle your emulated machine's + * memory access (generally these routines will check for access to + * memory-mapped I/O and things of that nature.) + * + * The SYNC pin is useful to trap OS calls, whereas the VP pin is + * needed to emulate hardware which modifies the vector addresses. + */ + +#define EMUL_PIN_SYNC 1 // much more work to provide VPD and VPA +#define EMUL_PIN_VP 2 +#define M_READ(a) MEM_readMem(a, cpu_cycle_count, 0) +#define M_READ_OPCODE(a) MEM_readMem(a, cpu_cycle_count, EMUL_PIN_SYNC) +#define M_READ_VECTOR(a) MEM_readMem(a, cpu_cycle_count, EMUL_PIN_VP) +#define M_WRITE(a,v) MEM_writeMem((a),(v), cpu_cycle_count) + + +/* Set this macro to your emulator's "update" routine. Your update + * routine would probably do things like update hardware sprites, + * and check for user keypresses. CPU_run() calls this routine + * periodically to make sure the rest of your emulator gets time + * to run. + * + * v is the number of CPU clock cycles that have elapsed since the last + * call. + */ + +#define E_UPDATE(v) EMUL_hardwareUpdate(v) + + + +/* Set this macro to your emulator's routine for handling the WDM + * pseudo-opcode. Useful for trapping certain emulated machine + * functions and emulating them in fast C code. + * + * v is the operand byte immediately following the WDM opcode. + */ + +#define E_WDM(v) EMUL_handleWDM( (v), cpu_cycle_count ) + + + +/* Set the 65816 emulator's update period (the number of cycles + * elapsed between calls to the E_UPDATE routine.) + */ + +void CPU_setUpdatePeriod(word32 period); + +/* Set the 65816 emulator's trace mode to off (0) or on (nonzero) */ + +void CPU_setTrace(int mode); + +/* Send a reset to the 65816 emulator. You should do this at */ +/* startup before you call CPU_run(). */ + +void CPU_reset(void); + +/* Send an abort to the 65816 emulator. */ + +void CPU_abort(void); + +/* Send a non-maskable interrupt to the 65816 emulator */ + +void CPU_nmi(void); + +/* Send a standard (maskable) interrupt to the 65816 emulator. Up to 32 + * IRQ sources are supported. */ + +void CPU_addIRQ( word32 mask ); + +/* Clear a previously sent interrupt (if one is still pending) */ + +void CPU_clearIRQ( word32 mask ); + +/* This routine never returns; it sits in a loop processing opcodes */ +/* until the emulator exits. Periodic calls to the emulator update */ +/* macro are made to allow the rest of the emulator to function. */ + +void CPU_run(void); + +/* Internal routine called when the mode bits (e/m/x) change */ + +void CPU_modeSwitch(void); + +/* Internal routine to print the next instruction in trace mode */ + +void CPU_debug(void); + +void CPU_single_step_init(void); +void CPU_single_step(void); + +/* These are used by the various macros above, so make sure that we + * declare them for type safety purposes! Thanks to fabys for these on + * the 6502.org forum. + * + * Thanks to BigEd on 6502.org for implementing support for memory access + * modes -- see EMUL_* macros above, near MEM_READ_*, et. al. + */ + +void EMUL_handleWDM(byte opcode, word32 timestamp); +void EMUL_hardwareUpdate(word32 timestamp); +byte MEM_readMem(word32 address, word32 timestamp, word32 emulFlags); +void MEM_writeMem(word32 address, byte b, word32 timestamp); + +void CPU_setRunAddress(word32 address); + +#endif /* _CPU_H */ + diff --git a/src/cpuevent.c b/src/cpuevent.c new file mode 100644 index 0000000..3c886cc --- /dev/null +++ b/src/cpuevent.c @@ -0,0 +1,99 @@ +/* + * lib65816/cpuevent.c Release 1p2 + * See LICENSE for more details. + * + * Copyright 2007 by Samuel A. Falvo II + */ + +#include "cpuevent.h" +#include + +struct List +{ + CPUEvent * head; + void * null; + CPUEvent * tail; +}; + +static struct List eventList; + +void +CPUEvent_initialize( void ) +{ + eventList.head = (CPUEvent *)(&eventList.null); + eventList.null = 0; + eventList.tail = (CPUEvent *)(&eventList); +} + +void +CPUEvent_elapse( word32 cycles ) +{ + eventList.head -> counter -= cycles; + if( eventList.head -> counter < 0 ) + { + eventList.head -> counter = 0; + CPUEvent_dispatch(); + } +} + +void +CPUEvent_schedule( CPUEvent *thisEvent, word32 when, CPUHandler *proc ) +{ + CPUEvent *p, *q; + + thisEvent -> counter = when; + thisEvent -> handler = proc; + + p = (CPUEvent *)&eventList; + q = p -> next; + + while( ( thisEvent -> counter ) && ( q -> next ) ) + { + /* Newly scheduled event is before 'q', so insert it in front of + * q and compensate q's countdown accordingly. + */ + + if( thisEvent -> counter < q -> counter ) + { + p -> next = thisEvent; thisEvent -> next = q; + q -> previous = thisEvent; thisEvent -> previous = p; + + q -> counter -= thisEvent -> counter; + return; + } + + /* Otherwise, q occurs before thisEvent, so we compensate thisEvent's counter + * as we continue to find the ideal insertion point. + */ + + thisEvent -> counter -= q -> counter; + if( thisEvent -> counter < 0 ) thisEvent -> counter = 0; + p = q; + q = q -> next; + } + + p -> next = thisEvent; thisEvent -> next = q; + q -> previous = thisEvent; thisEvent -> previous = p; +} + +void +CPUEvent_dispatch( void ) +{ + CPUEvent *p, *nextEvent, *thisEvent; + + thisEvent = eventList.head; + while( thisEvent -> next ) + { + if( thisEvent -> counter != 0 ) return; + + /* We need to dequeue the node FIRST, because the called + * handler may attempt to reschedule the event. + */ + + p = thisEvent -> previous; nextEvent = thisEvent -> next; + p -> next = nextEvent; nextEvent -> previous = p; + + thisEvent -> handler( 0 ); thisEvent = nextEvent; + } +} + diff --git a/src/cpuevent.h b/src/cpuevent.h new file mode 100644 index 0000000..10b4433 --- /dev/null +++ b/src/cpuevent.h @@ -0,0 +1,28 @@ +#ifndef LIB65816_CPUEVENT_H +#define LIB65816_CPUEVENT_H + +/* CPUtrel 2 Emulator Release 1p2 + * Copyright (c) 2007 Samuel A. Falvo II + * See LICENSE file for more information. + */ + +#include "cpu.h" + +typedef struct CPUEvent CPUEvent; +typedef void CPUHandler( word32 timestamp ); + +struct CPUEvent +{ + CPUEvent * next; + CPUEvent * previous; + long counter; + CPUHandler * handler; +}; + +void CPUEvent_elapse( word32 delta ); +void CPUEvent_dispatch( void ); +void CPUEvent_initialize( void ); +void CPUEvent_schedule( CPUEvent *, word32, CPUHandler * ); + +#endif + diff --git a/src/cpumacro.h b/src/cpumacro.h new file mode 100644 index 0000000..712b2a7 --- /dev/null +++ b/src/cpumacro.h @@ -0,0 +1,435 @@ +/* + * lib65816/cpumacro.h Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (cpumacro.h) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +/* This file contains the macros which are affected by the E, M, or X */ +/* bits (as opposed to the macros in micros.h, which aren't affected). */ + +/* First some #undef's to prevent a lot of annoying compiler warnings. */ + +#undef C_LDA +#undef C_LDX +#undef C_LDY +#undef C_STA +#undef C_STX +#undef C_STY +#undef C_STZ +#undef C_INC +#undef C_DEC +#undef C_ASL +#undef C_LSR +#undef C_ROL +#undef C_ROR +#undef C_TSB +#undef C_TRB +#undef C_AND +#undef C_ORA +#undef C_EOR +#undef C_BIT +#undef C_ADC +#undef C_SBC +#undef C_CMP +#undef C_CPX +#undef C_CPY +#undef S_PUSH +#undef S_PULL +#undef O_i8 +#undef O_i16 +#undef O_a +#undef O_al +#undef O_d +#undef O_dix +#undef O_dixl +#undef O_dxi +#undef O_dxx +#undef O_dxy +#undef O_axx +#undef O_axy +#undef O_alxx +#undef O_pcr +#undef O_pcrl +#undef O_ai +#undef O_ail +#undef O_di +#undef O_dil +#undef O_axi +#undef O_sr +#undef O_srix + +/*------- Routines that operate on a memory address -------*/ + +#ifdef SHORT_M +#define C_LDA(a) otmp.B.L = M_READ(a.A); \ + C_LDA8(otmp.B.L) +#else +#define C_LDA(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_LDA16(otmp.W) +#endif + +#ifdef SHORT_X +#define C_LDX(a) otmp.B.L = M_READ(a.A); \ + C_LDX8(otmp.B.L) +#else +#define C_LDX(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_LDX16(otmp.W) +#endif + +#ifdef SHORT_X +#define C_LDY(a) otmp.B.L = M_READ(a.A); \ + C_LDY8(otmp.B.L) +#else +#define C_LDY(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_LDY16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_STA(a) M_WRITE(a.A,A.B.L) +#else +#define C_STA(a) M_WRITE(a.A,A.B.L); \ + M_WRITE(a.A+1,A.B.H) +#endif + +#ifdef SHORT_X +#define C_STX(a) M_WRITE(a.A,X.B.L) +#else +#define C_STX(a) M_WRITE(a.A,X.B.L); \ + M_WRITE(a.A+1,X.B.H) +#endif + +#ifdef SHORT_X +#define C_STY(a) M_WRITE(a.A,Y.B.L) +#else +#define C_STY(a) M_WRITE(a.A,Y.B.L); \ + M_WRITE(a.A+1,Y.B.H) +#endif + +#ifdef SHORT_M +#define C_STZ(a) M_WRITE(a.A,0) +#else +#define C_STZ(a) M_WRITE(a.A,0); \ + M_WRITE(a.A+1,0) +#endif + +#ifdef SHORT_M +#define C_INC(a) otmp.B.L = M_READ(a.A); \ + C_INC8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_INC(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_INC16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_DEC(a) otmp.B.L = M_READ(a.A); \ + C_DEC8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_DEC(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_DEC16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_ASL(a) otmp.B.L = M_READ(a.A); \ + C_ASL8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_ASL(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_ASL16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_LSR(a) otmp.B.L = M_READ(a.A); \ + C_LSR8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_LSR(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_LSR16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_ROL(a) otmp.B.L = M_READ(a.A); \ + C_ROL8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_ROL(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_ROL16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_ROR(a) otmp.B.L = M_READ(a.A); \ + C_ROR8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_ROR(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_ROR16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_TSB(a) otmp.B.L = M_READ(a.A); \ + C_TSB8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_TSB(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_TSB16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_TRB(a) otmp.B.L = M_READ(a.A); \ + C_TRB8(otmp.B.L); \ + M_WRITE(a.A,otmp.B.L) +#else +#define C_TRB(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_TRB16(otmp.W); \ + M_WRITE(a.A,otmp.B.L); \ + M_WRITE(a.A+1,otmp.B.H) +#endif + +#ifdef SHORT_M +#define C_AND(a) otmp.B.L = M_READ(a.A); \ + C_AND8(otmp.B.L) +#else +#define C_AND(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_AND16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_ORA(a) otmp.B.L = M_READ(a.A); \ + C_ORA8(otmp.B.L) +#else +#define C_ORA(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_ORA16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_EOR(a) otmp.B.L = M_READ(a.A); \ + C_EOR8(otmp.B.L) +#else +#define C_EOR(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_EOR16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_BIT(a) otmp.B.L = M_READ(a.A); \ + C_BIT8(otmp.B.L) +#else +#define C_BIT(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_BIT16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_ADC(a) otmp.B.L = M_READ(a.A); \ + C_ADC8(otmp.B.L) +#else +#define C_ADC(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_ADC16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_SBC(a) otmp.B.L = M_READ(a.A); \ + C_SBC8(otmp.B.L) +#else +#define C_SBC(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_SBC16(otmp.W) +#endif + +#ifdef SHORT_M +#define C_CMP(a) otmp.B.L = M_READ(a.A); \ + C_CMP8(otmp.B.L) +#else +#define C_CMP(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_CMP16(otmp.W) +#endif + +#ifdef SHORT_X +#define C_CPX(a) otmp.B.L = M_READ(a.A); \ + C_CPX8(otmp.B.L) +#else +#define C_CPX(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_CPX16(otmp.W) +#endif + +#ifdef SHORT_X +#define C_CPY(a) otmp.B.L = M_READ(a.A); \ + C_CPY8(otmp.B.L) +#else +#define C_CPY(a) otmp.B.L = M_READ(a.A); \ + otmp.B.H = M_READ(a.A+1); \ + C_CPY16(otmp.W) +#endif + +/* Macros for pushing or pulling bytes on the 65816 stack */ + +#ifdef NATIVE_MODE +#define S_PUSH(v) M_WRITE(S.W,v); S.W-- +#define S_PULL(v) ++S.W; v = M_READ(S.W) +#else +#define S_PUSH(v) M_WRITE(S.W,v); S.B.L-- +#define S_PULL(v) S.B.L++; v = M_READ(S.W) +#endif + +/* Macros to retrieve an 8 or 16-bit operand. They take as their parameter */ +/* a "dualw" union variable, which they set to the operand. */ + +#define O_i8(v) v.B.L = M_READ(PC.A); v.B.H = 0; PC.W.PC++ + +#define O_i16(v) v.B.L = M_READ(PC.A); v.B.H = M_READ(PC.A+1); PC.W.PC += 2 + +/* Macros to retrieve the operand address. These take as their parameter */ +/* a "duala" union variable, which they set to the operand address. */ + +#define O_a(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; PC.W.PC += 2; + +#define O_al(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = M_READ(PC.A+2); PC.W.PC += 3 + +#define O_d(a) if (D.B.L) cpu_cycle_count++; \ + a.A = D.W + M_READ(PC.A); a.B.B = 0; PC.W.PC++ + +#ifdef SHORT_X + +#define O_dix(a) if (D.B.L) cpu_cycle_count++; \ + atmp.A = D.W + M_READ(PC.A); atmp.B.B = 0; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB; \ + atmp.A = a.A; \ + a.A += Y.W; \ + if (atmp.B.H != a.B.H) cpu_cycle_count++; + +#else + +#define O_dix(a) if (D.B.L) cpu_cycle_count++; \ + atmp.A = D.W + M_READ(PC.A); atmp.B.B = 0; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB; \ + a.A += Y.W; + +#endif + +#define O_dixl(a) if (D.B.L) cpu_cycle_count++; \ + atmp.A = D.W + M_READ(PC.A); atmp.B.B = 0; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = M_READ(atmp.A+2); \ + a.A += Y.W + +#define O_dxi(a) if (D.B.L) cpu_cycle_count++; \ + atmp.A = D.W + M_READ(PC.A) + X.W; atmp.B.B = 0; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB + +#ifdef NATIVE_MODE + +#define O_dxx(a) if (D.B.L) cpu_cycle_count++; \ + a.W.L = (M_READ(PC.A) + D.W + X.W); a.B.B = 0; PC.W.PC++ + +#define O_dxy(a) if (D.B.L) cpu_cycle_count++; \ + a.W.L = (M_READ(PC.A) + D.W + Y.W); a.B.B = 0; PC.W.PC++ + +#ifdef SHORT_X + +#define O_axx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \ + atmp.A = a.A; a.A += X.W; \ + if (atmp.B.H != a.B.H) cpu_cycle_count++; \ + PC.W.PC+=2 + +#define O_axy(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \ + atmp.A = a.A; a.A += Y.W; \ + if (atmp.B.H != a.B.H) cpu_cycle_count++; \ + PC.W.PC+=2 +#else + +#define O_axx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \ + a.A += X.W; \ + PC.W.PC+=2 + +#define O_axy(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \ + a.A += Y.W; \ + PC.W.PC+=2 +#endif + +#else + +#define O_dxx(a) if (D.B.L) cpu_cycle_count++; \ + a.W.L = (M_READ(PC.A) + D.W + X.W); a.B.H = 0; a.B.B = 0; PC.W.PC++; + +#define O_dxy(a) if (D.B.L) cpu_cycle_count++; \ + a.W.L = (M_READ(PC.A) + D.W + Y.W); a.B.H = 0; a.B.B = 0; PC.W.PC++; + +#define O_axx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \ + atmp.A = a.A; a.W.L += X.W; \ + if (atmp.B.H != a.B.H) cpu_cycle_count++; \ + PC.W.PC+=2 + +#define O_axy(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \ + atmp.A = a.A; a.W.L += Y.W; \ + if (atmp.B.H != a.B.H) cpu_cycle_count++; \ + PC.W.PC+=2 + +#endif + +#define O_alxx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = M_READ(PC.A+2); a.A += X.W; \ + PC.W.PC += 3; + +#define O_pcr(a) wtmp.B.L = M_READ(PC.A); PC.W.PC++; \ + a.W.L = PC.W.PC + (offset_s) wtmp.B.L; a.B.B = PC.B.PB; + +#define O_pcrl(a) wtmp.B.L = M_READ(PC.A); wtmp.B.H = M_READ(PC.A+1); PC.W.PC += 2; \ + a.W.L = PC.W.PC + (offset_l) wtmp.W; a.B.B = PC.B.PB; + +#define O_ai(a) atmp.B.L = M_READ(PC.A); atmp.B.H = M_READ(PC.A+1); atmp.B.B = 0; PC.W.PC += 2; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = 0; + +#define O_ail(a) atmp.B.L = M_READ(PC.A); atmp.B.H = M_READ(PC.A+1); atmp.B.B = 0; PC.W.PC += 2; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = M_READ(atmp.A+2) + +#define O_di(a) if (D.B.L) cpu_cycle_count++; \ + atmp.A = M_READ(PC.A) + D.W; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB + +#define O_dil(a) if (D.B.L) cpu_cycle_count++; \ + atmp.A = M_READ(PC.A) + D.W; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = M_READ(atmp.A+2) + +#define O_axi(a) atmp.B.L = M_READ(PC.A); atmp.B.H = M_READ(PC.A+1); \ + atmp.A += X.W; atmp.B.B = PC.B.PB; \ + PC.W.PC += 2; a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = PC.B.PB + +#define O_sr(a) a.W.L = M_READ(PC.A) + S.W; a.B.B = 0; PC.W.PC++ + +#define O_srix(a) atmp.W.L = M_READ(PC.A) + S.W; atmp.B.B = 0; PC.W.PC++; \ + a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB; a.A += Y.W diff --git a/src/cpumicro.h b/src/cpumicro.h new file mode 100644 index 0000000..f692b08 --- /dev/null +++ b/src/cpumicro.h @@ -0,0 +1,305 @@ +/* + * lib65816/cpumicro.h Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (cpumicro.h) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +/* This file defines "micro operation" macros; that is, very low-level */ +/* operations that are independent of the state of the E, M, or X bits. */ + +/* Macros for setting/clearing program status register bits */ + +#define F_setN(v) if (v) P |= 0x80; else P &= ~0x80 +#define F_setV(v) if (v) P |= 0x40; else P &= ~0x40 +#define F_setM(v) if (v) P |= 0x20; else P &= ~0x20 +#define F_setX(v) if (v) P |= 0x10; else P &= ~0x10 +#define F_setB(v) if (v) P |= 0x10; else P &= ~0x10 +#define F_setD(v) if (v) P |= 0x08; else P &= ~0x08 +#define F_setI(v) if (v) P |= 0x04; else P &= ~0x04 +#define F_setZ(v) if (v) P |= 0x02; else P &= ~0x02 +#define F_setC(v) if (v) P |= 0x01; else P &= ~0x01 + +/* Macros for testing program status register bits */ + +#define F_getN ((P & 0x80)? 1:0) +#define F_getV ((P & 0x40)? 1:0) +#define F_getM ((P & 0x20)? 1:0) +#define F_getX ((P & 0x10)? 1:0) +#define F_getD ((P & 0x08)? 1:0) +#define F_getI ((P & 0x04)? 1:0) +#define F_getZ ((P & 0x02)? 1:0) +#define F_getC ((P & 0x01)? 1:0) + +/*------- Routines that operate on an 8/16-bit value -------*/ + +#define C_SETF8(v) F_setN(v & 0x80); \ + F_setZ(!v) + +#define C_SETF16(v) F_setN(v & 0x8000); \ + F_setZ(!v) + +#define C_LDA8(v) A.B.L = v; \ + C_SETF8(v) + +#define C_LDA16(v) A.W = v; \ + C_SETF16(v) + +#define C_LDX8(v) X.B.L = v; \ + C_SETF8(v) + +#define C_LDX16(v) X.W = v; \ + C_SETF16(v) + +#define C_LDY8(v) Y.B.L = v; \ + C_SETF8(v) + +#define C_LDY16(v) Y.W = v; \ + C_SETF16(v) + +#define C_INC8(v) v++; \ + C_SETF8(v) + +#define C_INC16(v) v++; \ + C_SETF16(v) + +#define C_DEC8(v) v--; \ + C_SETF8(v) + +#define C_DEC16(v) v--; \ + C_SETF16(v) + +#define C_ASL8(v) F_setC(v & 0x80); \ + v = v << 1; \ + C_SETF8(v) + +#define C_ASL16(v) F_setC(v & 0x8000); \ + v = v << 1; \ + C_SETF16(v) + +#define C_LSR8(v) F_setC(v & 0x01); \ + v = v >> 1; \ + C_SETF8(v) + +#define C_LSR16(v) F_setC(v & 0x0001); \ + v = v >> 1; \ + C_SETF16(v) + +#define C_ROL8(v) wtmp.B.L = P & 0x01; \ + F_setC(v & 0x80); \ + v = (v << 1) | wtmp.B.L; \ + C_SETF8(v) + +#define C_ROL16(v) wtmp.W = P & 0x01; \ + F_setC(v & 0x8000); \ + v = (v << 1) | wtmp.W; \ + C_SETF16(v) + +#define C_ROR8(v) wtmp.B.L = (P & 0x01) << 7; \ + F_setC(v & 0x01); \ + v = (v >> 1) | wtmp.B.L; \ + C_SETF8(v) + +#define C_ROR16(v) wtmp.W = (P & 0x01) << 15; \ + F_setC(v & 0x0001); \ + v = (v >> 1) | wtmp.W; \ + C_SETF16(v) + +#define C_TSB8(v) F_setZ(!(v & A.B.L)); \ + v |= A.B.L; + +#define C_TSB16(v) F_setZ(!(v & A.W)); \ + v |= A.W; + +#define C_TRB8(v) F_setZ(!(v & A.B.L)); \ + v &= ~A.B.L; + +#define C_TRB16(v) F_setZ(!(v & A.W)); \ + v &= ~A.W; + +#define C_AND8(v) A.B.L &= v; \ + C_SETF8(A.B.L) + +#define C_AND16(v) A.W &= v; \ + C_SETF16(A.W) + +#define C_ORA8(v) A.B.L |= v; \ + C_SETF8(A.B.L) + +#define C_ORA16(v) A.W |= v; \ + C_SETF16(A.W) + +#define C_EOR8(v) A.B.L ^= v; \ + C_SETF8(A.B.L) + +#define C_EOR16(v) A.W ^= v; \ + C_SETF16(A.W) + +#define C_BIT8(v) F_setN(v & 0x80); \ + F_setV(v & 0x40); \ + F_setZ(!(v & A.B.L)); \ + +#define C_BIT16(v) F_setN(v & 0x8000); \ + F_setV(v & 0x4000); \ + F_setZ(!(v & A.W)); \ + +#define C_ADC8(v) if (F_getD) { \ + a1 = A.B.L & 0x0F; \ + a2 = (A.B.L >> 4) & 0x0F; \ + o1 = v & 0x0F; \ + o2 = (v >> 4) & 0x0F; \ + a1 += (o1 + F_getC); \ + a2 += o2; \ + if (a1>9) { \ + a1 -= 10; \ + a2++; \ + } \ + if (a2>9) { \ + a2 -= 10; \ + F_setC(1); \ + } else { \ + F_setC(0); \ + } \ + wtmp.W = (a2 << 4) | a1; \ + } else { \ + wtmp.W = A.B.L + v + F_getC; \ + F_setC(wtmp.B.H); \ + } \ + F_setV(~(A.B.L ^ v) & (A.B.L ^ wtmp.B.L) & 0x80); \ + A.B.L = wtmp.B.L; \ + C_SETF8(A.B.L); + +#define C_ADC16(v) if (F_getD) { \ + a1 = A.W & 0x0F; \ + a2 = (A.W >> 4) & 0x0F; \ + a3 = (A.W >> 8) & 0x0F; \ + a4 = (A.W >> 12) & 0x0F; \ + o1 = v & 0x0F; \ + o2 = (v >> 4) & 0x0F; \ + o3 = (v >> 8) & 0x0F; \ + o4 = (v >> 12) & 0x0F; \ + a1 += (o1 + F_getC); \ + a2 += o2; \ + a3 += o3; \ + a4 += o4; \ + if (a1>9) { \ + a1 -= 10; \ + a2++; \ + } \ + if (a2>9) { \ + a2 -= 10; \ + a3++; \ + } \ + if (a3>9) { \ + a3 -= 10; \ + a4++; \ + } \ + if (a4>9) { \ + a4 -= 10; \ + F_setC(1); \ + } else { \ + F_setC(0); \ + } \ + atmp.A = (a4 << 12) | (a3 << 8) | (a2 << 4) | a1; \ + } else { \ + atmp.A = A.W + v + F_getC; \ + F_setC(atmp.W.H); \ + } \ + F_setV(~(A.W ^ v) & (A.W ^ atmp.W.L) & 0x8000); \ + A.W = atmp.W.L; \ + C_SETF16(A.W); + +#define C_SBC8(v) if (F_getD) { \ + a1 = A.B.L & 0x0F; \ + a2 = (A.B.L >> 4) & 0x0F; \ + o1 = v & 0x0F; \ + o2 = (v >> 4) & 0x0F; \ + a1 -= (o1 + !F_getC); \ + a2 -= o2; \ + if (a1<0) { \ + a1 += 10; \ + a2--; \ + } \ + if (a2<0) { \ + a2 += 10; \ + F_setC(0); \ + } else { \ + F_setC(1); \ + } \ + wtmp.W = (a2 << 4) | a1; \ + } else { \ + wtmp.W = (A.B.L - v) - !F_getC; \ + F_setC(!wtmp.B.H); \ + } \ + F_setV((A.B.L ^ v) & (A.B.L ^ wtmp.B.L) & 0x80); \ + A.B.L = wtmp.B.L; \ + C_SETF8(A.B.L); + +#define C_SBC16(v) if (F_getD) { \ + a1 = A.W & 0x0F; \ + a2 = (A.W >> 4) & 0x0F; \ + a3 = (A.W >> 8) & 0x0F; \ + a4 = (A.W >> 12) & 0x0F; \ + o1 = v & 0x0F; \ + o2 = (v >> 4) & 0x0F; \ + o3 = (v >> 8) & 0x0F; \ + o4 = (v >> 12) & 0x0F; \ + a1 -= (o1 + !F_getC); \ + a2 -= o2; \ + a3 -= o3; \ + a4 -= o4; \ + if (a1<0) { \ + a1 += 10; \ + a2--; \ + } \ + if (a2<0) { \ + a2 += 10; \ + a3--; \ + } \ + if (a3<0) { \ + a3 += 10; \ + a4--; \ + } \ + if (a4<0) { \ + a4 += 10; \ + F_setC(0); \ + } else { \ + F_setC(1); \ + } \ + atmp.A = (a4 << 12) | (a3 << 8) | (a2 << 4) | a1; \ + } else { \ + atmp.A = (A.W - v) - !F_getC; \ + F_setC(!atmp.W.H); \ + } \ + A.W = atmp.W.L; \ + F_setV((A.W ^ v) & (A.W ^ atmp.W.L) & 0x8000); \ + C_SETF16(A.W); + +#define C_CMP8(v) wtmp.W = A.B.L - v; \ + F_setC(!wtmp.B.H); \ + C_SETF8(wtmp.B.L) + +#define C_CMP16(v) atmp.A = A.W - v; \ + F_setC(!atmp.W.H); \ + C_SETF16(atmp.W.L) + +#define C_CPX8(v) wtmp.W = X.B.L - v; \ + F_setC(!wtmp.B.H); \ + C_SETF8(wtmp.B.L) + +#define C_CPX16(v) atmp.A = X.W - v; \ + F_setC(!atmp.W.H); \ + C_SETF16(atmp.W.L) + +#define C_CPY8(v) wtmp.W = Y.B.L - v; \ + F_setC(!wtmp.B.H); \ + C_SETF8(wtmp.B.L) + +#define C_CPY16(v) atmp.A = Y.W - v; \ + F_setC(!atmp.W.H); \ + C_SETF16(atmp.W.L) diff --git a/src/cputable.h b/src/cputable.h new file mode 100644 index 0000000..e7ccf34 --- /dev/null +++ b/src/cputable.h @@ -0,0 +1,1326 @@ +#ifndef _CPU_TABLE_H_ +#define _CPU_TABLE_H_ + +/* + * lib65816/cputable.h Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (cputable.h) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +extern void e0m1x1_opcode_0x00(void); +extern void e0m1x1_opcode_0x01(void); +extern void e0m1x1_opcode_0x02(void); +extern void e0m1x1_opcode_0x03(void); +extern void e0m1x1_opcode_0x04(void); +extern void e0m1x1_opcode_0x05(void); +extern void e0m1x1_opcode_0x06(void); +extern void e0m1x1_opcode_0x07(void); +extern void e0m1x1_opcode_0x08(void); +extern void e0m1x1_opcode_0x09(void); +extern void e0m1x1_opcode_0x0A(void); +extern void e0m1x1_opcode_0x0B(void); +extern void e0m1x1_opcode_0x0C(void); +extern void e0m1x1_opcode_0x0D(void); +extern void e0m1x1_opcode_0x0E(void); +extern void e0m1x1_opcode_0x0F(void); +extern void e0m1x1_opcode_0x10(void); +extern void e0m1x1_opcode_0x11(void); +extern void e0m1x1_opcode_0x12(void); +extern void e0m1x1_opcode_0x13(void); +extern void e0m1x1_opcode_0x14(void); +extern void e0m1x1_opcode_0x15(void); +extern void e0m1x1_opcode_0x16(void); +extern void e0m1x1_opcode_0x17(void); +extern void e0m1x1_opcode_0x18(void); +extern void e0m1x1_opcode_0x19(void); +extern void e0m1x1_opcode_0x1A(void); +extern void e0m1x1_opcode_0x1B(void); +extern void e0m1x1_opcode_0x1C(void); +extern void e0m1x1_opcode_0x1D(void); +extern void e0m1x1_opcode_0x1E(void); +extern void e0m1x1_opcode_0x1F(void); +extern void e0m1x1_opcode_0x20(void); +extern void e0m1x1_opcode_0x21(void); +extern void e0m1x1_opcode_0x22(void); +extern void e0m1x1_opcode_0x23(void); +extern void e0m1x1_opcode_0x24(void); +extern void e0m1x1_opcode_0x25(void); +extern void e0m1x1_opcode_0x26(void); +extern void e0m1x1_opcode_0x27(void); +extern void e0m1x1_opcode_0x28(void); +extern void e0m1x1_opcode_0x29(void); +extern void e0m1x1_opcode_0x2A(void); +extern void e0m1x1_opcode_0x2B(void); +extern void e0m1x1_opcode_0x2C(void); +extern void e0m1x1_opcode_0x2D(void); +extern void e0m1x1_opcode_0x2E(void); +extern void e0m1x1_opcode_0x2F(void); +extern void e0m1x1_opcode_0x30(void); +extern void e0m1x1_opcode_0x31(void); +extern void e0m1x1_opcode_0x32(void); +extern void e0m1x1_opcode_0x33(void); +extern void e0m1x1_opcode_0x34(void); +extern void e0m1x1_opcode_0x35(void); +extern void e0m1x1_opcode_0x36(void); +extern void e0m1x1_opcode_0x37(void); +extern void e0m1x1_opcode_0x38(void); +extern void e0m1x1_opcode_0x39(void); +extern void e0m1x1_opcode_0x3A(void); +extern void e0m1x1_opcode_0x3B(void); +extern void e0m1x1_opcode_0x3C(void); +extern void e0m1x1_opcode_0x3D(void); +extern void e0m1x1_opcode_0x3E(void); +extern void e0m1x1_opcode_0x3F(void); +extern void e0m1x1_opcode_0x40(void); +extern void e0m1x1_opcode_0x41(void); +extern void e0m1x1_opcode_0x42(void); +extern void e0m1x1_opcode_0x43(void); +extern void e0m1x1_opcode_0x44(void); +extern void e0m1x1_opcode_0x45(void); +extern void e0m1x1_opcode_0x46(void); +extern void e0m1x1_opcode_0x47(void); +extern void e0m1x1_opcode_0x48(void); +extern void e0m1x1_opcode_0x49(void); +extern void e0m1x1_opcode_0x4A(void); +extern void e0m1x1_opcode_0x4B(void); +extern void e0m1x1_opcode_0x4C(void); +extern void e0m1x1_opcode_0x4D(void); +extern void e0m1x1_opcode_0x4E(void); +extern void e0m1x1_opcode_0x4F(void); +extern void e0m1x1_opcode_0x50(void); +extern void e0m1x1_opcode_0x51(void); +extern void e0m1x1_opcode_0x52(void); +extern void e0m1x1_opcode_0x53(void); +extern void e0m1x1_opcode_0x54(void); +extern void e0m1x1_opcode_0x55(void); +extern void e0m1x1_opcode_0x56(void); +extern void e0m1x1_opcode_0x57(void); +extern void e0m1x1_opcode_0x58(void); +extern void e0m1x1_opcode_0x59(void); +extern void e0m1x1_opcode_0x5A(void); +extern void e0m1x1_opcode_0x5B(void); +extern void e0m1x1_opcode_0x5C(void); +extern void e0m1x1_opcode_0x5D(void); +extern void e0m1x1_opcode_0x5E(void); +extern void e0m1x1_opcode_0x5F(void); +extern void e0m1x1_opcode_0x60(void); +extern void e0m1x1_opcode_0x61(void); +extern void e0m1x1_opcode_0x62(void); +extern void e0m1x1_opcode_0x63(void); +extern void e0m1x1_opcode_0x64(void); +extern void e0m1x1_opcode_0x65(void); +extern void e0m1x1_opcode_0x66(void); +extern void e0m1x1_opcode_0x67(void); +extern void e0m1x1_opcode_0x68(void); +extern void e0m1x1_opcode_0x69(void); +extern void e0m1x1_opcode_0x6A(void); +extern void e0m1x1_opcode_0x6B(void); +extern void e0m1x1_opcode_0x6C(void); +extern void e0m1x1_opcode_0x6D(void); +extern void e0m1x1_opcode_0x6E(void); +extern void e0m1x1_opcode_0x6F(void); +extern void e0m1x1_opcode_0x70(void); +extern void e0m1x1_opcode_0x71(void); +extern void e0m1x1_opcode_0x72(void); +extern void e0m1x1_opcode_0x73(void); +extern void e0m1x1_opcode_0x74(void); +extern void e0m1x1_opcode_0x75(void); +extern void e0m1x1_opcode_0x76(void); +extern void e0m1x1_opcode_0x77(void); +extern void e0m1x1_opcode_0x78(void); +extern void e0m1x1_opcode_0x79(void); +extern void e0m1x1_opcode_0x7A(void); +extern void e0m1x1_opcode_0x7B(void); +extern void e0m1x1_opcode_0x7C(void); +extern void e0m1x1_opcode_0x7D(void); +extern void e0m1x1_opcode_0x7E(void); +extern void e0m1x1_opcode_0x7F(void); +extern void e0m1x1_opcode_0x80(void); +extern void e0m1x1_opcode_0x81(void); +extern void e0m1x1_opcode_0x82(void); +extern void e0m1x1_opcode_0x83(void); +extern void e0m1x1_opcode_0x84(void); +extern void e0m1x1_opcode_0x85(void); +extern void e0m1x1_opcode_0x86(void); +extern void e0m1x1_opcode_0x87(void); +extern void e0m1x1_opcode_0x88(void); +extern void e0m1x1_opcode_0x89(void); +extern void e0m1x1_opcode_0x8A(void); +extern void e0m1x1_opcode_0x8B(void); +extern void e0m1x1_opcode_0x8C(void); +extern void e0m1x1_opcode_0x8D(void); +extern void e0m1x1_opcode_0x8E(void); +extern void e0m1x1_opcode_0x8F(void); +extern void e0m1x1_opcode_0x90(void); +extern void e0m1x1_opcode_0x91(void); +extern void e0m1x1_opcode_0x92(void); +extern void e0m1x1_opcode_0x93(void); +extern void e0m1x1_opcode_0x94(void); +extern void e0m1x1_opcode_0x95(void); +extern void e0m1x1_opcode_0x96(void); +extern void e0m1x1_opcode_0x97(void); +extern void e0m1x1_opcode_0x98(void); +extern void e0m1x1_opcode_0x99(void); +extern void e0m1x1_opcode_0x9A(void); +extern void e0m1x1_opcode_0x9B(void); +extern void e0m1x1_opcode_0x9C(void); +extern void e0m1x1_opcode_0x9D(void); +extern void e0m1x1_opcode_0x9E(void); +extern void e0m1x1_opcode_0x9F(void); +extern void e0m1x1_opcode_0xA0(void); +extern void e0m1x1_opcode_0xA1(void); +extern void e0m1x1_opcode_0xA2(void); +extern void e0m1x1_opcode_0xA3(void); +extern void e0m1x1_opcode_0xA4(void); +extern void e0m1x1_opcode_0xA5(void); +extern void e0m1x1_opcode_0xA6(void); +extern void e0m1x1_opcode_0xA7(void); +extern void e0m1x1_opcode_0xA8(void); +extern void e0m1x1_opcode_0xA9(void); +extern void e0m1x1_opcode_0xAA(void); +extern void e0m1x1_opcode_0xAB(void); +extern void e0m1x1_opcode_0xAC(void); +extern void e0m1x1_opcode_0xAD(void); +extern void e0m1x1_opcode_0xAE(void); +extern void e0m1x1_opcode_0xAF(void); +extern void e0m1x1_opcode_0xB0(void); +extern void e0m1x1_opcode_0xB1(void); +extern void e0m1x1_opcode_0xB2(void); +extern void e0m1x1_opcode_0xB3(void); +extern void e0m1x1_opcode_0xB4(void); +extern void e0m1x1_opcode_0xB5(void); +extern void e0m1x1_opcode_0xB6(void); +extern void e0m1x1_opcode_0xB7(void); +extern void e0m1x1_opcode_0xB8(void); +extern void e0m1x1_opcode_0xB9(void); +extern void e0m1x1_opcode_0xBA(void); +extern void e0m1x1_opcode_0xBB(void); +extern void e0m1x1_opcode_0xBC(void); +extern void e0m1x1_opcode_0xBD(void); +extern void e0m1x1_opcode_0xBE(void); +extern void e0m1x1_opcode_0xBF(void); +extern void e0m1x1_opcode_0xC0(void); +extern void e0m1x1_opcode_0xC1(void); +extern void e0m1x1_opcode_0xC2(void); +extern void e0m1x1_opcode_0xC3(void); +extern void e0m1x1_opcode_0xC4(void); +extern void e0m1x1_opcode_0xC5(void); +extern void e0m1x1_opcode_0xC6(void); +extern void e0m1x1_opcode_0xC7(void); +extern void e0m1x1_opcode_0xC8(void); +extern void e0m1x1_opcode_0xC9(void); +extern void e0m1x1_opcode_0xCA(void); +extern void e0m1x1_opcode_0xCB(void); +extern void e0m1x1_opcode_0xCC(void); +extern void e0m1x1_opcode_0xCD(void); +extern void e0m1x1_opcode_0xCE(void); +extern void e0m1x1_opcode_0xCF(void); +extern void e0m1x1_opcode_0xD0(void); +extern void e0m1x1_opcode_0xD1(void); +extern void e0m1x1_opcode_0xD2(void); +extern void e0m1x1_opcode_0xD3(void); +extern void e0m1x1_opcode_0xD4(void); +extern void e0m1x1_opcode_0xD5(void); +extern void e0m1x1_opcode_0xD6(void); +extern void e0m1x1_opcode_0xD7(void); +extern void e0m1x1_opcode_0xD8(void); +extern void e0m1x1_opcode_0xD9(void); +extern void e0m1x1_opcode_0xDA(void); +extern void e0m1x1_opcode_0xDB(void); +extern void e0m1x1_opcode_0xDC(void); +extern void e0m1x1_opcode_0xDD(void); +extern void e0m1x1_opcode_0xDE(void); +extern void e0m1x1_opcode_0xDF(void); +extern void e0m1x1_opcode_0xE0(void); +extern void e0m1x1_opcode_0xE1(void); +extern void e0m1x1_opcode_0xE2(void); +extern void e0m1x1_opcode_0xE3(void); +extern void e0m1x1_opcode_0xE4(void); +extern void e0m1x1_opcode_0xE5(void); +extern void e0m1x1_opcode_0xE6(void); +extern void e0m1x1_opcode_0xE7(void); +extern void e0m1x1_opcode_0xE8(void); +extern void e0m1x1_opcode_0xE9(void); +extern void e0m1x1_opcode_0xEA(void); +extern void e0m1x1_opcode_0xEB(void); +extern void e0m1x1_opcode_0xEC(void); +extern void e0m1x1_opcode_0xED(void); +extern void e0m1x1_opcode_0xEE(void); +extern void e0m1x1_opcode_0xEF(void); +extern void e0m1x1_opcode_0xF0(void); +extern void e0m1x1_opcode_0xF1(void); +extern void e0m1x1_opcode_0xF2(void); +extern void e0m1x1_opcode_0xF3(void); +extern void e0m1x1_opcode_0xF4(void); +extern void e0m1x1_opcode_0xF5(void); +extern void e0m1x1_opcode_0xF6(void); +extern void e0m1x1_opcode_0xF7(void); +extern void e0m1x1_opcode_0xF8(void); +extern void e0m1x1_opcode_0xF9(void); +extern void e0m1x1_opcode_0xFA(void); +extern void e0m1x1_opcode_0xFB(void); +extern void e0m1x1_opcode_0xFC(void); +extern void e0m1x1_opcode_0xFD(void); +extern void e0m1x1_opcode_0xFE(void); +extern void e0m1x1_opcode_0xFF(void); +extern void e0m1x1_reset(void); +extern void e0m1x1_abort(void); +extern void e0m1x1_nmi(void); +extern void e0m1x1_irq(void); +extern void e0m1x1_irne64(void); +extern void e0m1x1_irqt5(void); +extern void e0m1x0_opcode_0x00(void); +extern void e0m1x0_opcode_0x01(void); +extern void e0m1x0_opcode_0x02(void); +extern void e0m1x0_opcode_0x03(void); +extern void e0m1x0_opcode_0x04(void); +extern void e0m1x0_opcode_0x05(void); +extern void e0m1x0_opcode_0x06(void); +extern void e0m1x0_opcode_0x07(void); +extern void e0m1x0_opcode_0x08(void); +extern void e0m1x0_opcode_0x09(void); +extern void e0m1x0_opcode_0x0A(void); +extern void e0m1x0_opcode_0x0B(void); +extern void e0m1x0_opcode_0x0C(void); +extern void e0m1x0_opcode_0x0D(void); +extern void e0m1x0_opcode_0x0E(void); +extern void e0m1x0_opcode_0x0F(void); +extern void e0m1x0_opcode_0x10(void); +extern void e0m1x0_opcode_0x11(void); +extern void e0m1x0_opcode_0x12(void); +extern void e0m1x0_opcode_0x13(void); +extern void e0m1x0_opcode_0x14(void); +extern void e0m1x0_opcode_0x15(void); +extern void e0m1x0_opcode_0x16(void); +extern void e0m1x0_opcode_0x17(void); +extern void e0m1x0_opcode_0x18(void); +extern void e0m1x0_opcode_0x19(void); +extern void e0m1x0_opcode_0x1A(void); +extern void e0m1x0_opcode_0x1B(void); +extern void e0m1x0_opcode_0x1C(void); +extern void e0m1x0_opcode_0x1D(void); +extern void e0m1x0_opcode_0x1E(void); +extern void e0m1x0_opcode_0x1F(void); +extern void e0m1x0_opcode_0x20(void); +extern void e0m1x0_opcode_0x21(void); +extern void e0m1x0_opcode_0x22(void); +extern void e0m1x0_opcode_0x23(void); +extern void e0m1x0_opcode_0x24(void); +extern void e0m1x0_opcode_0x25(void); +extern void e0m1x0_opcode_0x26(void); +extern void e0m1x0_opcode_0x27(void); +extern void e0m1x0_opcode_0x28(void); +extern void e0m1x0_opcode_0x29(void); +extern void e0m1x0_opcode_0x2A(void); +extern void e0m1x0_opcode_0x2B(void); +extern void e0m1x0_opcode_0x2C(void); +extern void e0m1x0_opcode_0x2D(void); +extern void e0m1x0_opcode_0x2E(void); +extern void e0m1x0_opcode_0x2F(void); +extern void e0m1x0_opcode_0x30(void); +extern void e0m1x0_opcode_0x31(void); +extern void e0m1x0_opcode_0x32(void); +extern void e0m1x0_opcode_0x33(void); +extern void e0m1x0_opcode_0x34(void); +extern void e0m1x0_opcode_0x35(void); +extern void e0m1x0_opcode_0x36(void); +extern void e0m1x0_opcode_0x37(void); +extern void e0m1x0_opcode_0x38(void); +extern void e0m1x0_opcode_0x39(void); +extern void e0m1x0_opcode_0x3A(void); +extern void e0m1x0_opcode_0x3B(void); +extern void e0m1x0_opcode_0x3C(void); +extern void e0m1x0_opcode_0x3D(void); +extern void e0m1x0_opcode_0x3E(void); +extern void e0m1x0_opcode_0x3F(void); +extern void e0m1x0_opcode_0x40(void); +extern void e0m1x0_opcode_0x41(void); +extern void e0m1x0_opcode_0x42(void); +extern void e0m1x0_opcode_0x43(void); +extern void e0m1x0_opcode_0x44(void); +extern void e0m1x0_opcode_0x45(void); +extern void e0m1x0_opcode_0x46(void); +extern void e0m1x0_opcode_0x47(void); +extern void e0m1x0_opcode_0x48(void); +extern void e0m1x0_opcode_0x49(void); +extern void e0m1x0_opcode_0x4A(void); +extern void e0m1x0_opcode_0x4B(void); +extern void e0m1x0_opcode_0x4C(void); +extern void e0m1x0_opcode_0x4D(void); +extern void e0m1x0_opcode_0x4E(void); +extern void e0m1x0_opcode_0x4F(void); +extern void e0m1x0_opcode_0x50(void); +extern void e0m1x0_opcode_0x51(void); +extern void e0m1x0_opcode_0x52(void); +extern void e0m1x0_opcode_0x53(void); +extern void e0m1x0_opcode_0x54(void); +extern void e0m1x0_opcode_0x55(void); +extern void e0m1x0_opcode_0x56(void); +extern void e0m1x0_opcode_0x57(void); +extern void e0m1x0_opcode_0x58(void); +extern void e0m1x0_opcode_0x59(void); +extern void e0m1x0_opcode_0x5A(void); +extern void e0m1x0_opcode_0x5B(void); +extern void e0m1x0_opcode_0x5C(void); +extern void e0m1x0_opcode_0x5D(void); +extern void e0m1x0_opcode_0x5E(void); +extern void e0m1x0_opcode_0x5F(void); +extern void e0m1x0_opcode_0x60(void); +extern void e0m1x0_opcode_0x61(void); +extern void e0m1x0_opcode_0x62(void); +extern void e0m1x0_opcode_0x63(void); +extern void e0m1x0_opcode_0x64(void); +extern void e0m1x0_opcode_0x65(void); +extern void e0m1x0_opcode_0x66(void); +extern void e0m1x0_opcode_0x67(void); +extern void e0m1x0_opcode_0x68(void); +extern void e0m1x0_opcode_0x69(void); +extern void e0m1x0_opcode_0x6A(void); +extern void e0m1x0_opcode_0x6B(void); +extern void e0m1x0_opcode_0x6C(void); +extern void e0m1x0_opcode_0x6D(void); +extern void e0m1x0_opcode_0x6E(void); +extern void e0m1x0_opcode_0x6F(void); +extern void e0m1x0_opcode_0x70(void); +extern void e0m1x0_opcode_0x71(void); +extern void e0m1x0_opcode_0x72(void); +extern void e0m1x0_opcode_0x73(void); +extern void e0m1x0_opcode_0x74(void); +extern void e0m1x0_opcode_0x75(void); +extern void e0m1x0_opcode_0x76(void); +extern void e0m1x0_opcode_0x77(void); +extern void e0m1x0_opcode_0x78(void); +extern void e0m1x0_opcode_0x79(void); +extern void e0m1x0_opcode_0x7A(void); +extern void e0m1x0_opcode_0x7B(void); +extern void e0m1x0_opcode_0x7C(void); +extern void e0m1x0_opcode_0x7D(void); +extern void e0m1x0_opcode_0x7E(void); +extern void e0m1x0_opcode_0x7F(void); +extern void e0m1x0_opcode_0x80(void); +extern void e0m1x0_opcode_0x81(void); +extern void e0m1x0_opcode_0x82(void); +extern void e0m1x0_opcode_0x83(void); +extern void e0m1x0_opcode_0x84(void); +extern void e0m1x0_opcode_0x85(void); +extern void e0m1x0_opcode_0x86(void); +extern void e0m1x0_opcode_0x87(void); +extern void e0m1x0_opcode_0x88(void); +extern void e0m1x0_opcode_0x89(void); +extern void e0m1x0_opcode_0x8A(void); +extern void e0m1x0_opcode_0x8B(void); +extern void e0m1x0_opcode_0x8C(void); +extern void e0m1x0_opcode_0x8D(void); +extern void e0m1x0_opcode_0x8E(void); +extern void e0m1x0_opcode_0x8F(void); +extern void e0m1x0_opcode_0x90(void); +extern void e0m1x0_opcode_0x91(void); +extern void e0m1x0_opcode_0x92(void); +extern void e0m1x0_opcode_0x93(void); +extern void e0m1x0_opcode_0x94(void); +extern void e0m1x0_opcode_0x95(void); +extern void e0m1x0_opcode_0x96(void); +extern void e0m1x0_opcode_0x97(void); +extern void e0m1x0_opcode_0x98(void); +extern void e0m1x0_opcode_0x99(void); +extern void e0m1x0_opcode_0x9A(void); +extern void e0m1x0_opcode_0x9B(void); +extern void e0m1x0_opcode_0x9C(void); +extern void e0m1x0_opcode_0x9D(void); +extern void e0m1x0_opcode_0x9E(void); +extern void e0m1x0_opcode_0x9F(void); +extern void e0m1x0_opcode_0xA0(void); +extern void e0m1x0_opcode_0xA1(void); +extern void e0m1x0_opcode_0xA2(void); +extern void e0m1x0_opcode_0xA3(void); +extern void e0m1x0_opcode_0xA4(void); +extern void e0m1x0_opcode_0xA5(void); +extern void e0m1x0_opcode_0xA6(void); +extern void e0m1x0_opcode_0xA7(void); +extern void e0m1x0_opcode_0xA8(void); +extern void e0m1x0_opcode_0xA9(void); +extern void e0m1x0_opcode_0xAA(void); +extern void e0m1x0_opcode_0xAB(void); +extern void e0m1x0_opcode_0xAC(void); +extern void e0m1x0_opcode_0xAD(void); +extern void e0m1x0_opcode_0xAE(void); +extern void e0m1x0_opcode_0xAF(void); +extern void e0m1x0_opcode_0xB0(void); +extern void e0m1x0_opcode_0xB1(void); +extern void e0m1x0_opcode_0xB2(void); +extern void e0m1x0_opcode_0xB3(void); +extern void e0m1x0_opcode_0xB4(void); +extern void e0m1x0_opcode_0xB5(void); +extern void e0m1x0_opcode_0xB6(void); +extern void e0m1x0_opcode_0xB7(void); +extern void e0m1x0_opcode_0xB8(void); +extern void e0m1x0_opcode_0xB9(void); +extern void e0m1x0_opcode_0xBA(void); +extern void e0m1x0_opcode_0xBB(void); +extern void e0m1x0_opcode_0xBC(void); +extern void e0m1x0_opcode_0xBD(void); +extern void e0m1x0_opcode_0xBE(void); +extern void e0m1x0_opcode_0xBF(void); +extern void e0m1x0_opcode_0xC0(void); +extern void e0m1x0_opcode_0xC1(void); +extern void e0m1x0_opcode_0xC2(void); +extern void e0m1x0_opcode_0xC3(void); +extern void e0m1x0_opcode_0xC4(void); +extern void e0m1x0_opcode_0xC5(void); +extern void e0m1x0_opcode_0xC6(void); +extern void e0m1x0_opcode_0xC7(void); +extern void e0m1x0_opcode_0xC8(void); +extern void e0m1x0_opcode_0xC9(void); +extern void e0m1x0_opcode_0xCA(void); +extern void e0m1x0_opcode_0xCB(void); +extern void e0m1x0_opcode_0xCC(void); +extern void e0m1x0_opcode_0xCD(void); +extern void e0m1x0_opcode_0xCE(void); +extern void e0m1x0_opcode_0xCF(void); +extern void e0m1x0_opcode_0xD0(void); +extern void e0m1x0_opcode_0xD1(void); +extern void e0m1x0_opcode_0xD2(void); +extern void e0m1x0_opcode_0xD3(void); +extern void e0m1x0_opcode_0xD4(void); +extern void e0m1x0_opcode_0xD5(void); +extern void e0m1x0_opcode_0xD6(void); +extern void e0m1x0_opcode_0xD7(void); +extern void e0m1x0_opcode_0xD8(void); +extern void e0m1x0_opcode_0xD9(void); +extern void e0m1x0_opcode_0xDA(void); +extern void e0m1x0_opcode_0xDB(void); +extern void e0m1x0_opcode_0xDC(void); +extern void e0m1x0_opcode_0xDD(void); +extern void e0m1x0_opcode_0xDE(void); +extern void e0m1x0_opcode_0xDF(void); +extern void e0m1x0_opcode_0xE0(void); +extern void e0m1x0_opcode_0xE1(void); +extern void e0m1x0_opcode_0xE2(void); +extern void e0m1x0_opcode_0xE3(void); +extern void e0m1x0_opcode_0xE4(void); +extern void e0m1x0_opcode_0xE5(void); +extern void e0m1x0_opcode_0xE6(void); +extern void e0m1x0_opcode_0xE7(void); +extern void e0m1x0_opcode_0xE8(void); +extern void e0m1x0_opcode_0xE9(void); +extern void e0m1x0_opcode_0xEA(void); +extern void e0m1x0_opcode_0xEB(void); +extern void e0m1x0_opcode_0xEC(void); +extern void e0m1x0_opcode_0xED(void); +extern void e0m1x0_opcode_0xEE(void); +extern void e0m1x0_opcode_0xEF(void); +extern void e0m1x0_opcode_0xF0(void); +extern void e0m1x0_opcode_0xF1(void); +extern void e0m1x0_opcode_0xF2(void); +extern void e0m1x0_opcode_0xF3(void); +extern void e0m1x0_opcode_0xF4(void); +extern void e0m1x0_opcode_0xF5(void); +extern void e0m1x0_opcode_0xF6(void); +extern void e0m1x0_opcode_0xF7(void); +extern void e0m1x0_opcode_0xF8(void); +extern void e0m1x0_opcode_0xF9(void); +extern void e0m1x0_opcode_0xFA(void); +extern void e0m1x0_opcode_0xFB(void); +extern void e0m1x0_opcode_0xFC(void); +extern void e0m1x0_opcode_0xFD(void); +extern void e0m1x0_opcode_0xFE(void); +extern void e0m1x0_opcode_0xFF(void); +extern void e0m1x0_reset(void); +extern void e0m1x0_abort(void); +extern void e0m1x0_nmi(void); +extern void e0m1x0_irq(void); +extern void e0m1x0_irne64(void); +extern void e0m1x0_irqt5(void); +extern void e0m0x1_opcode_0x00(void); +extern void e0m0x1_opcode_0x01(void); +extern void e0m0x1_opcode_0x02(void); +extern void e0m0x1_opcode_0x03(void); +extern void e0m0x1_opcode_0x04(void); +extern void e0m0x1_opcode_0x05(void); +extern void e0m0x1_opcode_0x06(void); +extern void e0m0x1_opcode_0x07(void); +extern void e0m0x1_opcode_0x08(void); +extern void e0m0x1_opcode_0x09(void); +extern void e0m0x1_opcode_0x0A(void); +extern void e0m0x1_opcode_0x0B(void); +extern void e0m0x1_opcode_0x0C(void); +extern void e0m0x1_opcode_0x0D(void); +extern void e0m0x1_opcode_0x0E(void); +extern void e0m0x1_opcode_0x0F(void); +extern void e0m0x1_opcode_0x10(void); +extern void e0m0x1_opcode_0x11(void); +extern void e0m0x1_opcode_0x12(void); +extern void e0m0x1_opcode_0x13(void); +extern void e0m0x1_opcode_0x14(void); +extern void e0m0x1_opcode_0x15(void); +extern void e0m0x1_opcode_0x16(void); +extern void e0m0x1_opcode_0x17(void); +extern void e0m0x1_opcode_0x18(void); +extern void e0m0x1_opcode_0x19(void); +extern void e0m0x1_opcode_0x1A(void); +extern void e0m0x1_opcode_0x1B(void); +extern void e0m0x1_opcode_0x1C(void); +extern void e0m0x1_opcode_0x1D(void); +extern void e0m0x1_opcode_0x1E(void); +extern void e0m0x1_opcode_0x1F(void); +extern void e0m0x1_opcode_0x20(void); +extern void e0m0x1_opcode_0x21(void); +extern void e0m0x1_opcode_0x22(void); +extern void e0m0x1_opcode_0x23(void); +extern void e0m0x1_opcode_0x24(void); +extern void e0m0x1_opcode_0x25(void); +extern void e0m0x1_opcode_0x26(void); +extern void e0m0x1_opcode_0x27(void); +extern void e0m0x1_opcode_0x28(void); +extern void e0m0x1_opcode_0x29(void); +extern void e0m0x1_opcode_0x2A(void); +extern void e0m0x1_opcode_0x2B(void); +extern void e0m0x1_opcode_0x2C(void); +extern void e0m0x1_opcode_0x2D(void); +extern void e0m0x1_opcode_0x2E(void); +extern void e0m0x1_opcode_0x2F(void); +extern void e0m0x1_opcode_0x30(void); +extern void e0m0x1_opcode_0x31(void); +extern void e0m0x1_opcode_0x32(void); +extern void e0m0x1_opcode_0x33(void); +extern void e0m0x1_opcode_0x34(void); +extern void e0m0x1_opcode_0x35(void); +extern void e0m0x1_opcode_0x36(void); +extern void e0m0x1_opcode_0x37(void); +extern void e0m0x1_opcode_0x38(void); +extern void e0m0x1_opcode_0x39(void); +extern void e0m0x1_opcode_0x3A(void); +extern void e0m0x1_opcode_0x3B(void); +extern void e0m0x1_opcode_0x3C(void); +extern void e0m0x1_opcode_0x3D(void); +extern void e0m0x1_opcode_0x3E(void); +extern void e0m0x1_opcode_0x3F(void); +extern void e0m0x1_opcode_0x40(void); +extern void e0m0x1_opcode_0x41(void); +extern void e0m0x1_opcode_0x42(void); +extern void e0m0x1_opcode_0x43(void); +extern void e0m0x1_opcode_0x44(void); +extern void e0m0x1_opcode_0x45(void); +extern void e0m0x1_opcode_0x46(void); +extern void e0m0x1_opcode_0x47(void); +extern void e0m0x1_opcode_0x48(void); +extern void e0m0x1_opcode_0x49(void); +extern void e0m0x1_opcode_0x4A(void); +extern void e0m0x1_opcode_0x4B(void); +extern void e0m0x1_opcode_0x4C(void); +extern void e0m0x1_opcode_0x4D(void); +extern void e0m0x1_opcode_0x4E(void); +extern void e0m0x1_opcode_0x4F(void); +extern void e0m0x1_opcode_0x50(void); +extern void e0m0x1_opcode_0x51(void); +extern void e0m0x1_opcode_0x52(void); +extern void e0m0x1_opcode_0x53(void); +extern void e0m0x1_opcode_0x54(void); +extern void e0m0x1_opcode_0x55(void); +extern void e0m0x1_opcode_0x56(void); +extern void e0m0x1_opcode_0x57(void); +extern void e0m0x1_opcode_0x58(void); +extern void e0m0x1_opcode_0x59(void); +extern void e0m0x1_opcode_0x5A(void); +extern void e0m0x1_opcode_0x5B(void); +extern void e0m0x1_opcode_0x5C(void); +extern void e0m0x1_opcode_0x5D(void); +extern void e0m0x1_opcode_0x5E(void); +extern void e0m0x1_opcode_0x5F(void); +extern void e0m0x1_opcode_0x60(void); +extern void e0m0x1_opcode_0x61(void); +extern void e0m0x1_opcode_0x62(void); +extern void e0m0x1_opcode_0x63(void); +extern void e0m0x1_opcode_0x64(void); +extern void e0m0x1_opcode_0x65(void); +extern void e0m0x1_opcode_0x66(void); +extern void e0m0x1_opcode_0x67(void); +extern void e0m0x1_opcode_0x68(void); +extern void e0m0x1_opcode_0x69(void); +extern void e0m0x1_opcode_0x6A(void); +extern void e0m0x1_opcode_0x6B(void); +extern void e0m0x1_opcode_0x6C(void); +extern void e0m0x1_opcode_0x6D(void); +extern void e0m0x1_opcode_0x6E(void); +extern void e0m0x1_opcode_0x6F(void); +extern void e0m0x1_opcode_0x70(void); +extern void e0m0x1_opcode_0x71(void); +extern void e0m0x1_opcode_0x72(void); +extern void e0m0x1_opcode_0x73(void); +extern void e0m0x1_opcode_0x74(void); +extern void e0m0x1_opcode_0x75(void); +extern void e0m0x1_opcode_0x76(void); +extern void e0m0x1_opcode_0x77(void); +extern void e0m0x1_opcode_0x78(void); +extern void e0m0x1_opcode_0x79(void); +extern void e0m0x1_opcode_0x7A(void); +extern void e0m0x1_opcode_0x7B(void); +extern void e0m0x1_opcode_0x7C(void); +extern void e0m0x1_opcode_0x7D(void); +extern void e0m0x1_opcode_0x7E(void); +extern void e0m0x1_opcode_0x7F(void); +extern void e0m0x1_opcode_0x80(void); +extern void e0m0x1_opcode_0x81(void); +extern void e0m0x1_opcode_0x82(void); +extern void e0m0x1_opcode_0x83(void); +extern void e0m0x1_opcode_0x84(void); +extern void e0m0x1_opcode_0x85(void); +extern void e0m0x1_opcode_0x86(void); +extern void e0m0x1_opcode_0x87(void); +extern void e0m0x1_opcode_0x88(void); +extern void e0m0x1_opcode_0x89(void); +extern void e0m0x1_opcode_0x8A(void); +extern void e0m0x1_opcode_0x8B(void); +extern void e0m0x1_opcode_0x8C(void); +extern void e0m0x1_opcode_0x8D(void); +extern void e0m0x1_opcode_0x8E(void); +extern void e0m0x1_opcode_0x8F(void); +extern void e0m0x1_opcode_0x90(void); +extern void e0m0x1_opcode_0x91(void); +extern void e0m0x1_opcode_0x92(void); +extern void e0m0x1_opcode_0x93(void); +extern void e0m0x1_opcode_0x94(void); +extern void e0m0x1_opcode_0x95(void); +extern void e0m0x1_opcode_0x96(void); +extern void e0m0x1_opcode_0x97(void); +extern void e0m0x1_opcode_0x98(void); +extern void e0m0x1_opcode_0x99(void); +extern void e0m0x1_opcode_0x9A(void); +extern void e0m0x1_opcode_0x9B(void); +extern void e0m0x1_opcode_0x9C(void); +extern void e0m0x1_opcode_0x9D(void); +extern void e0m0x1_opcode_0x9E(void); +extern void e0m0x1_opcode_0x9F(void); +extern void e0m0x1_opcode_0xA0(void); +extern void e0m0x1_opcode_0xA1(void); +extern void e0m0x1_opcode_0xA2(void); +extern void e0m0x1_opcode_0xA3(void); +extern void e0m0x1_opcode_0xA4(void); +extern void e0m0x1_opcode_0xA5(void); +extern void e0m0x1_opcode_0xA6(void); +extern void e0m0x1_opcode_0xA7(void); +extern void e0m0x1_opcode_0xA8(void); +extern void e0m0x1_opcode_0xA9(void); +extern void e0m0x1_opcode_0xAA(void); +extern void e0m0x1_opcode_0xAB(void); +extern void e0m0x1_opcode_0xAC(void); +extern void e0m0x1_opcode_0xAD(void); +extern void e0m0x1_opcode_0xAE(void); +extern void e0m0x1_opcode_0xAF(void); +extern void e0m0x1_opcode_0xB0(void); +extern void e0m0x1_opcode_0xB1(void); +extern void e0m0x1_opcode_0xB2(void); +extern void e0m0x1_opcode_0xB3(void); +extern void e0m0x1_opcode_0xB4(void); +extern void e0m0x1_opcode_0xB5(void); +extern void e0m0x1_opcode_0xB6(void); +extern void e0m0x1_opcode_0xB7(void); +extern void e0m0x1_opcode_0xB8(void); +extern void e0m0x1_opcode_0xB9(void); +extern void e0m0x1_opcode_0xBA(void); +extern void e0m0x1_opcode_0xBB(void); +extern void e0m0x1_opcode_0xBC(void); +extern void e0m0x1_opcode_0xBD(void); +extern void e0m0x1_opcode_0xBE(void); +extern void e0m0x1_opcode_0xBF(void); +extern void e0m0x1_opcode_0xC0(void); +extern void e0m0x1_opcode_0xC1(void); +extern void e0m0x1_opcode_0xC2(void); +extern void e0m0x1_opcode_0xC3(void); +extern void e0m0x1_opcode_0xC4(void); +extern void e0m0x1_opcode_0xC5(void); +extern void e0m0x1_opcode_0xC6(void); +extern void e0m0x1_opcode_0xC7(void); +extern void e0m0x1_opcode_0xC8(void); +extern void e0m0x1_opcode_0xC9(void); +extern void e0m0x1_opcode_0xCA(void); +extern void e0m0x1_opcode_0xCB(void); +extern void e0m0x1_opcode_0xCC(void); +extern void e0m0x1_opcode_0xCD(void); +extern void e0m0x1_opcode_0xCE(void); +extern void e0m0x1_opcode_0xCF(void); +extern void e0m0x1_opcode_0xD0(void); +extern void e0m0x1_opcode_0xD1(void); +extern void e0m0x1_opcode_0xD2(void); +extern void e0m0x1_opcode_0xD3(void); +extern void e0m0x1_opcode_0xD4(void); +extern void e0m0x1_opcode_0xD5(void); +extern void e0m0x1_opcode_0xD6(void); +extern void e0m0x1_opcode_0xD7(void); +extern void e0m0x1_opcode_0xD8(void); +extern void e0m0x1_opcode_0xD9(void); +extern void e0m0x1_opcode_0xDA(void); +extern void e0m0x1_opcode_0xDB(void); +extern void e0m0x1_opcode_0xDC(void); +extern void e0m0x1_opcode_0xDD(void); +extern void e0m0x1_opcode_0xDE(void); +extern void e0m0x1_opcode_0xDF(void); +extern void e0m0x1_opcode_0xE0(void); +extern void e0m0x1_opcode_0xE1(void); +extern void e0m0x1_opcode_0xE2(void); +extern void e0m0x1_opcode_0xE3(void); +extern void e0m0x1_opcode_0xE4(void); +extern void e0m0x1_opcode_0xE5(void); +extern void e0m0x1_opcode_0xE6(void); +extern void e0m0x1_opcode_0xE7(void); +extern void e0m0x1_opcode_0xE8(void); +extern void e0m0x1_opcode_0xE9(void); +extern void e0m0x1_opcode_0xEA(void); +extern void e0m0x1_opcode_0xEB(void); +extern void e0m0x1_opcode_0xEC(void); +extern void e0m0x1_opcode_0xED(void); +extern void e0m0x1_opcode_0xEE(void); +extern void e0m0x1_opcode_0xEF(void); +extern void e0m0x1_opcode_0xF0(void); +extern void e0m0x1_opcode_0xF1(void); +extern void e0m0x1_opcode_0xF2(void); +extern void e0m0x1_opcode_0xF3(void); +extern void e0m0x1_opcode_0xF4(void); +extern void e0m0x1_opcode_0xF5(void); +extern void e0m0x1_opcode_0xF6(void); +extern void e0m0x1_opcode_0xF7(void); +extern void e0m0x1_opcode_0xF8(void); +extern void e0m0x1_opcode_0xF9(void); +extern void e0m0x1_opcode_0xFA(void); +extern void e0m0x1_opcode_0xFB(void); +extern void e0m0x1_opcode_0xFC(void); +extern void e0m0x1_opcode_0xFD(void); +extern void e0m0x1_opcode_0xFE(void); +extern void e0m0x1_opcode_0xFF(void); +extern void e0m0x1_reset(void); +extern void e0m0x1_abort(void); +extern void e0m0x1_nmi(void); +extern void e0m0x1_irq(void); +extern void e0m0x1_irne64(void); +extern void e0m0x1_irqt5(void); +extern void e0m0x0_opcode_0x00(void); +extern void e0m0x0_opcode_0x01(void); +extern void e0m0x0_opcode_0x02(void); +extern void e0m0x0_opcode_0x03(void); +extern void e0m0x0_opcode_0x04(void); +extern void e0m0x0_opcode_0x05(void); +extern void e0m0x0_opcode_0x06(void); +extern void e0m0x0_opcode_0x07(void); +extern void e0m0x0_opcode_0x08(void); +extern void e0m0x0_opcode_0x09(void); +extern void e0m0x0_opcode_0x0A(void); +extern void e0m0x0_opcode_0x0B(void); +extern void e0m0x0_opcode_0x0C(void); +extern void e0m0x0_opcode_0x0D(void); +extern void e0m0x0_opcode_0x0E(void); +extern void e0m0x0_opcode_0x0F(void); +extern void e0m0x0_opcode_0x10(void); +extern void e0m0x0_opcode_0x11(void); +extern void e0m0x0_opcode_0x12(void); +extern void e0m0x0_opcode_0x13(void); +extern void e0m0x0_opcode_0x14(void); +extern void e0m0x0_opcode_0x15(void); +extern void e0m0x0_opcode_0x16(void); +extern void e0m0x0_opcode_0x17(void); +extern void e0m0x0_opcode_0x18(void); +extern void e0m0x0_opcode_0x19(void); +extern void e0m0x0_opcode_0x1A(void); +extern void e0m0x0_opcode_0x1B(void); +extern void e0m0x0_opcode_0x1C(void); +extern void e0m0x0_opcode_0x1D(void); +extern void e0m0x0_opcode_0x1E(void); +extern void e0m0x0_opcode_0x1F(void); +extern void e0m0x0_opcode_0x20(void); +extern void e0m0x0_opcode_0x21(void); +extern void e0m0x0_opcode_0x22(void); +extern void e0m0x0_opcode_0x23(void); +extern void e0m0x0_opcode_0x24(void); +extern void e0m0x0_opcode_0x25(void); +extern void e0m0x0_opcode_0x26(void); +extern void e0m0x0_opcode_0x27(void); +extern void e0m0x0_opcode_0x28(void); +extern void e0m0x0_opcode_0x29(void); +extern void e0m0x0_opcode_0x2A(void); +extern void e0m0x0_opcode_0x2B(void); +extern void e0m0x0_opcode_0x2C(void); +extern void e0m0x0_opcode_0x2D(void); +extern void e0m0x0_opcode_0x2E(void); +extern void e0m0x0_opcode_0x2F(void); +extern void e0m0x0_opcode_0x30(void); +extern void e0m0x0_opcode_0x31(void); +extern void e0m0x0_opcode_0x32(void); +extern void e0m0x0_opcode_0x33(void); +extern void e0m0x0_opcode_0x34(void); +extern void e0m0x0_opcode_0x35(void); +extern void e0m0x0_opcode_0x36(void); +extern void e0m0x0_opcode_0x37(void); +extern void e0m0x0_opcode_0x38(void); +extern void e0m0x0_opcode_0x39(void); +extern void e0m0x0_opcode_0x3A(void); +extern void e0m0x0_opcode_0x3B(void); +extern void e0m0x0_opcode_0x3C(void); +extern void e0m0x0_opcode_0x3D(void); +extern void e0m0x0_opcode_0x3E(void); +extern void e0m0x0_opcode_0x3F(void); +extern void e0m0x0_opcode_0x40(void); +extern void e0m0x0_opcode_0x41(void); +extern void e0m0x0_opcode_0x42(void); +extern void e0m0x0_opcode_0x43(void); +extern void e0m0x0_opcode_0x44(void); +extern void e0m0x0_opcode_0x45(void); +extern void e0m0x0_opcode_0x46(void); +extern void e0m0x0_opcode_0x47(void); +extern void e0m0x0_opcode_0x48(void); +extern void e0m0x0_opcode_0x49(void); +extern void e0m0x0_opcode_0x4A(void); +extern void e0m0x0_opcode_0x4B(void); +extern void e0m0x0_opcode_0x4C(void); +extern void e0m0x0_opcode_0x4D(void); +extern void e0m0x0_opcode_0x4E(void); +extern void e0m0x0_opcode_0x4F(void); +extern void e0m0x0_opcode_0x50(void); +extern void e0m0x0_opcode_0x51(void); +extern void e0m0x0_opcode_0x52(void); +extern void e0m0x0_opcode_0x53(void); +extern void e0m0x0_opcode_0x54(void); +extern void e0m0x0_opcode_0x55(void); +extern void e0m0x0_opcode_0x56(void); +extern void e0m0x0_opcode_0x57(void); +extern void e0m0x0_opcode_0x58(void); +extern void e0m0x0_opcode_0x59(void); +extern void e0m0x0_opcode_0x5A(void); +extern void e0m0x0_opcode_0x5B(void); +extern void e0m0x0_opcode_0x5C(void); +extern void e0m0x0_opcode_0x5D(void); +extern void e0m0x0_opcode_0x5E(void); +extern void e0m0x0_opcode_0x5F(void); +extern void e0m0x0_opcode_0x60(void); +extern void e0m0x0_opcode_0x61(void); +extern void e0m0x0_opcode_0x62(void); +extern void e0m0x0_opcode_0x63(void); +extern void e0m0x0_opcode_0x64(void); +extern void e0m0x0_opcode_0x65(void); +extern void e0m0x0_opcode_0x66(void); +extern void e0m0x0_opcode_0x67(void); +extern void e0m0x0_opcode_0x68(void); +extern void e0m0x0_opcode_0x69(void); +extern void e0m0x0_opcode_0x6A(void); +extern void e0m0x0_opcode_0x6B(void); +extern void e0m0x0_opcode_0x6C(void); +extern void e0m0x0_opcode_0x6D(void); +extern void e0m0x0_opcode_0x6E(void); +extern void e0m0x0_opcode_0x6F(void); +extern void e0m0x0_opcode_0x70(void); +extern void e0m0x0_opcode_0x71(void); +extern void e0m0x0_opcode_0x72(void); +extern void e0m0x0_opcode_0x73(void); +extern void e0m0x0_opcode_0x74(void); +extern void e0m0x0_opcode_0x75(void); +extern void e0m0x0_opcode_0x76(void); +extern void e0m0x0_opcode_0x77(void); +extern void e0m0x0_opcode_0x78(void); +extern void e0m0x0_opcode_0x79(void); +extern void e0m0x0_opcode_0x7A(void); +extern void e0m0x0_opcode_0x7B(void); +extern void e0m0x0_opcode_0x7C(void); +extern void e0m0x0_opcode_0x7D(void); +extern void e0m0x0_opcode_0x7E(void); +extern void e0m0x0_opcode_0x7F(void); +extern void e0m0x0_opcode_0x80(void); +extern void e0m0x0_opcode_0x81(void); +extern void e0m0x0_opcode_0x82(void); +extern void e0m0x0_opcode_0x83(void); +extern void e0m0x0_opcode_0x84(void); +extern void e0m0x0_opcode_0x85(void); +extern void e0m0x0_opcode_0x86(void); +extern void e0m0x0_opcode_0x87(void); +extern void e0m0x0_opcode_0x88(void); +extern void e0m0x0_opcode_0x89(void); +extern void e0m0x0_opcode_0x8A(void); +extern void e0m0x0_opcode_0x8B(void); +extern void e0m0x0_opcode_0x8C(void); +extern void e0m0x0_opcode_0x8D(void); +extern void e0m0x0_opcode_0x8E(void); +extern void e0m0x0_opcode_0x8F(void); +extern void e0m0x0_opcode_0x90(void); +extern void e0m0x0_opcode_0x91(void); +extern void e0m0x0_opcode_0x92(void); +extern void e0m0x0_opcode_0x93(void); +extern void e0m0x0_opcode_0x94(void); +extern void e0m0x0_opcode_0x95(void); +extern void e0m0x0_opcode_0x96(void); +extern void e0m0x0_opcode_0x97(void); +extern void e0m0x0_opcode_0x98(void); +extern void e0m0x0_opcode_0x99(void); +extern void e0m0x0_opcode_0x9A(void); +extern void e0m0x0_opcode_0x9B(void); +extern void e0m0x0_opcode_0x9C(void); +extern void e0m0x0_opcode_0x9D(void); +extern void e0m0x0_opcode_0x9E(void); +extern void e0m0x0_opcode_0x9F(void); +extern void e0m0x0_opcode_0xA0(void); +extern void e0m0x0_opcode_0xA1(void); +extern void e0m0x0_opcode_0xA2(void); +extern void e0m0x0_opcode_0xA3(void); +extern void e0m0x0_opcode_0xA4(void); +extern void e0m0x0_opcode_0xA5(void); +extern void e0m0x0_opcode_0xA6(void); +extern void e0m0x0_opcode_0xA7(void); +extern void e0m0x0_opcode_0xA8(void); +extern void e0m0x0_opcode_0xA9(void); +extern void e0m0x0_opcode_0xAA(void); +extern void e0m0x0_opcode_0xAB(void); +extern void e0m0x0_opcode_0xAC(void); +extern void e0m0x0_opcode_0xAD(void); +extern void e0m0x0_opcode_0xAE(void); +extern void e0m0x0_opcode_0xAF(void); +extern void e0m0x0_opcode_0xB0(void); +extern void e0m0x0_opcode_0xB1(void); +extern void e0m0x0_opcode_0xB2(void); +extern void e0m0x0_opcode_0xB3(void); +extern void e0m0x0_opcode_0xB4(void); +extern void e0m0x0_opcode_0xB5(void); +extern void e0m0x0_opcode_0xB6(void); +extern void e0m0x0_opcode_0xB7(void); +extern void e0m0x0_opcode_0xB8(void); +extern void e0m0x0_opcode_0xB9(void); +extern void e0m0x0_opcode_0xBA(void); +extern void e0m0x0_opcode_0xBB(void); +extern void e0m0x0_opcode_0xBC(void); +extern void e0m0x0_opcode_0xBD(void); +extern void e0m0x0_opcode_0xBE(void); +extern void e0m0x0_opcode_0xBF(void); +extern void e0m0x0_opcode_0xC0(void); +extern void e0m0x0_opcode_0xC1(void); +extern void e0m0x0_opcode_0xC2(void); +extern void e0m0x0_opcode_0xC3(void); +extern void e0m0x0_opcode_0xC4(void); +extern void e0m0x0_opcode_0xC5(void); +extern void e0m0x0_opcode_0xC6(void); +extern void e0m0x0_opcode_0xC7(void); +extern void e0m0x0_opcode_0xC8(void); +extern void e0m0x0_opcode_0xC9(void); +extern void e0m0x0_opcode_0xCA(void); +extern void e0m0x0_opcode_0xCB(void); +extern void e0m0x0_opcode_0xCC(void); +extern void e0m0x0_opcode_0xCD(void); +extern void e0m0x0_opcode_0xCE(void); +extern void e0m0x0_opcode_0xCF(void); +extern void e0m0x0_opcode_0xD0(void); +extern void e0m0x0_opcode_0xD1(void); +extern void e0m0x0_opcode_0xD2(void); +extern void e0m0x0_opcode_0xD3(void); +extern void e0m0x0_opcode_0xD4(void); +extern void e0m0x0_opcode_0xD5(void); +extern void e0m0x0_opcode_0xD6(void); +extern void e0m0x0_opcode_0xD7(void); +extern void e0m0x0_opcode_0xD8(void); +extern void e0m0x0_opcode_0xD9(void); +extern void e0m0x0_opcode_0xDA(void); +extern void e0m0x0_opcode_0xDB(void); +extern void e0m0x0_opcode_0xDC(void); +extern void e0m0x0_opcode_0xDD(void); +extern void e0m0x0_opcode_0xDE(void); +extern void e0m0x0_opcode_0xDF(void); +extern void e0m0x0_opcode_0xE0(void); +extern void e0m0x0_opcode_0xE1(void); +extern void e0m0x0_opcode_0xE2(void); +extern void e0m0x0_opcode_0xE3(void); +extern void e0m0x0_opcode_0xE4(void); +extern void e0m0x0_opcode_0xE5(void); +extern void e0m0x0_opcode_0xE6(void); +extern void e0m0x0_opcode_0xE7(void); +extern void e0m0x0_opcode_0xE8(void); +extern void e0m0x0_opcode_0xE9(void); +extern void e0m0x0_opcode_0xEA(void); +extern void e0m0x0_opcode_0xEB(void); +extern void e0m0x0_opcode_0xEC(void); +extern void e0m0x0_opcode_0xED(void); +extern void e0m0x0_opcode_0xEE(void); +extern void e0m0x0_opcode_0xEF(void); +extern void e0m0x0_opcode_0xF0(void); +extern void e0m0x0_opcode_0xF1(void); +extern void e0m0x0_opcode_0xF2(void); +extern void e0m0x0_opcode_0xF3(void); +extern void e0m0x0_opcode_0xF4(void); +extern void e0m0x0_opcode_0xF5(void); +extern void e0m0x0_opcode_0xF6(void); +extern void e0m0x0_opcode_0xF7(void); +extern void e0m0x0_opcode_0xF8(void); +extern void e0m0x0_opcode_0xF9(void); +extern void e0m0x0_opcode_0xFA(void); +extern void e0m0x0_opcode_0xFB(void); +extern void e0m0x0_opcode_0xFC(void); +extern void e0m0x0_opcode_0xFD(void); +extern void e0m0x0_opcode_0xFE(void); +extern void e0m0x0_opcode_0xFF(void); +extern void e0m0x0_reset(void); +extern void e0m0x0_abort(void); +extern void e0m0x0_nmi(void); +extern void e0m0x0_irq(void); +extern void e0m0x0_irne64(void); +extern void e0m0x0_irqt5(void); +extern void e1m1x1_opcode_0x00(void); +extern void e1m1x1_opcode_0x01(void); +extern void e1m1x1_opcode_0x02(void); +extern void e1m1x1_opcode_0x03(void); +extern void e1m1x1_opcode_0x04(void); +extern void e1m1x1_opcode_0x05(void); +extern void e1m1x1_opcode_0x06(void); +extern void e1m1x1_opcode_0x07(void); +extern void e1m1x1_opcode_0x08(void); +extern void e1m1x1_opcode_0x09(void); +extern void e1m1x1_opcode_0x0A(void); +extern void e1m1x1_opcode_0x0B(void); +extern void e1m1x1_opcode_0x0C(void); +extern void e1m1x1_opcode_0x0D(void); +extern void e1m1x1_opcode_0x0E(void); +extern void e1m1x1_opcode_0x0F(void); +extern void e1m1x1_opcode_0x10(void); +extern void e1m1x1_opcode_0x11(void); +extern void e1m1x1_opcode_0x12(void); +extern void e1m1x1_opcode_0x13(void); +extern void e1m1x1_opcode_0x14(void); +extern void e1m1x1_opcode_0x15(void); +extern void e1m1x1_opcode_0x16(void); +extern void e1m1x1_opcode_0x17(void); +extern void e1m1x1_opcode_0x18(void); +extern void e1m1x1_opcode_0x19(void); +extern void e1m1x1_opcode_0x1A(void); +extern void e1m1x1_opcode_0x1B(void); +extern void e1m1x1_opcode_0x1C(void); +extern void e1m1x1_opcode_0x1D(void); +extern void e1m1x1_opcode_0x1E(void); +extern void e1m1x1_opcode_0x1F(void); +extern void e1m1x1_opcode_0x20(void); +extern void e1m1x1_opcode_0x21(void); +extern void e1m1x1_opcode_0x22(void); +extern void e1m1x1_opcode_0x23(void); +extern void e1m1x1_opcode_0x24(void); +extern void e1m1x1_opcode_0x25(void); +extern void e1m1x1_opcode_0x26(void); +extern void e1m1x1_opcode_0x27(void); +extern void e1m1x1_opcode_0x28(void); +extern void e1m1x1_opcode_0x29(void); +extern void e1m1x1_opcode_0x2A(void); +extern void e1m1x1_opcode_0x2B(void); +extern void e1m1x1_opcode_0x2C(void); +extern void e1m1x1_opcode_0x2D(void); +extern void e1m1x1_opcode_0x2E(void); +extern void e1m1x1_opcode_0x2F(void); +extern void e1m1x1_opcode_0x30(void); +extern void e1m1x1_opcode_0x31(void); +extern void e1m1x1_opcode_0x32(void); +extern void e1m1x1_opcode_0x33(void); +extern void e1m1x1_opcode_0x34(void); +extern void e1m1x1_opcode_0x35(void); +extern void e1m1x1_opcode_0x36(void); +extern void e1m1x1_opcode_0x37(void); +extern void e1m1x1_opcode_0x38(void); +extern void e1m1x1_opcode_0x39(void); +extern void e1m1x1_opcode_0x3A(void); +extern void e1m1x1_opcode_0x3B(void); +extern void e1m1x1_opcode_0x3C(void); +extern void e1m1x1_opcode_0x3D(void); +extern void e1m1x1_opcode_0x3E(void); +extern void e1m1x1_opcode_0x3F(void); +extern void e1m1x1_opcode_0x40(void); +extern void e1m1x1_opcode_0x41(void); +extern void e1m1x1_opcode_0x42(void); +extern void e1m1x1_opcode_0x43(void); +extern void e1m1x1_opcode_0x44(void); +extern void e1m1x1_opcode_0x45(void); +extern void e1m1x1_opcode_0x46(void); +extern void e1m1x1_opcode_0x47(void); +extern void e1m1x1_opcode_0x48(void); +extern void e1m1x1_opcode_0x49(void); +extern void e1m1x1_opcode_0x4A(void); +extern void e1m1x1_opcode_0x4B(void); +extern void e1m1x1_opcode_0x4C(void); +extern void e1m1x1_opcode_0x4D(void); +extern void e1m1x1_opcode_0x4E(void); +extern void e1m1x1_opcode_0x4F(void); +extern void e1m1x1_opcode_0x50(void); +extern void e1m1x1_opcode_0x51(void); +extern void e1m1x1_opcode_0x52(void); +extern void e1m1x1_opcode_0x53(void); +extern void e1m1x1_opcode_0x54(void); +extern void e1m1x1_opcode_0x55(void); +extern void e1m1x1_opcode_0x56(void); +extern void e1m1x1_opcode_0x57(void); +extern void e1m1x1_opcode_0x58(void); +extern void e1m1x1_opcode_0x59(void); +extern void e1m1x1_opcode_0x5A(void); +extern void e1m1x1_opcode_0x5B(void); +extern void e1m1x1_opcode_0x5C(void); +extern void e1m1x1_opcode_0x5D(void); +extern void e1m1x1_opcode_0x5E(void); +extern void e1m1x1_opcode_0x5F(void); +extern void e1m1x1_opcode_0x60(void); +extern void e1m1x1_opcode_0x61(void); +extern void e1m1x1_opcode_0x62(void); +extern void e1m1x1_opcode_0x63(void); +extern void e1m1x1_opcode_0x64(void); +extern void e1m1x1_opcode_0x65(void); +extern void e1m1x1_opcode_0x66(void); +extern void e1m1x1_opcode_0x67(void); +extern void e1m1x1_opcode_0x68(void); +extern void e1m1x1_opcode_0x69(void); +extern void e1m1x1_opcode_0x6A(void); +extern void e1m1x1_opcode_0x6B(void); +extern void e1m1x1_opcode_0x6C(void); +extern void e1m1x1_opcode_0x6D(void); +extern void e1m1x1_opcode_0x6E(void); +extern void e1m1x1_opcode_0x6F(void); +extern void e1m1x1_opcode_0x70(void); +extern void e1m1x1_opcode_0x71(void); +extern void e1m1x1_opcode_0x72(void); +extern void e1m1x1_opcode_0x73(void); +extern void e1m1x1_opcode_0x74(void); +extern void e1m1x1_opcode_0x75(void); +extern void e1m1x1_opcode_0x76(void); +extern void e1m1x1_opcode_0x77(void); +extern void e1m1x1_opcode_0x78(void); +extern void e1m1x1_opcode_0x79(void); +extern void e1m1x1_opcode_0x7A(void); +extern void e1m1x1_opcode_0x7B(void); +extern void e1m1x1_opcode_0x7C(void); +extern void e1m1x1_opcode_0x7D(void); +extern void e1m1x1_opcode_0x7E(void); +extern void e1m1x1_opcode_0x7F(void); +extern void e1m1x1_opcode_0x80(void); +extern void e1m1x1_opcode_0x81(void); +extern void e1m1x1_opcode_0x82(void); +extern void e1m1x1_opcode_0x83(void); +extern void e1m1x1_opcode_0x84(void); +extern void e1m1x1_opcode_0x85(void); +extern void e1m1x1_opcode_0x86(void); +extern void e1m1x1_opcode_0x87(void); +extern void e1m1x1_opcode_0x88(void); +extern void e1m1x1_opcode_0x89(void); +extern void e1m1x1_opcode_0x8A(void); +extern void e1m1x1_opcode_0x8B(void); +extern void e1m1x1_opcode_0x8C(void); +extern void e1m1x1_opcode_0x8D(void); +extern void e1m1x1_opcode_0x8E(void); +extern void e1m1x1_opcode_0x8F(void); +extern void e1m1x1_opcode_0x90(void); +extern void e1m1x1_opcode_0x91(void); +extern void e1m1x1_opcode_0x92(void); +extern void e1m1x1_opcode_0x93(void); +extern void e1m1x1_opcode_0x94(void); +extern void e1m1x1_opcode_0x95(void); +extern void e1m1x1_opcode_0x96(void); +extern void e1m1x1_opcode_0x97(void); +extern void e1m1x1_opcode_0x98(void); +extern void e1m1x1_opcode_0x99(void); +extern void e1m1x1_opcode_0x9A(void); +extern void e1m1x1_opcode_0x9B(void); +extern void e1m1x1_opcode_0x9C(void); +extern void e1m1x1_opcode_0x9D(void); +extern void e1m1x1_opcode_0x9E(void); +extern void e1m1x1_opcode_0x9F(void); +extern void e1m1x1_opcode_0xA0(void); +extern void e1m1x1_opcode_0xA1(void); +extern void e1m1x1_opcode_0xA2(void); +extern void e1m1x1_opcode_0xA3(void); +extern void e1m1x1_opcode_0xA4(void); +extern void e1m1x1_opcode_0xA5(void); +extern void e1m1x1_opcode_0xA6(void); +extern void e1m1x1_opcode_0xA7(void); +extern void e1m1x1_opcode_0xA8(void); +extern void e1m1x1_opcode_0xA9(void); +extern void e1m1x1_opcode_0xAA(void); +extern void e1m1x1_opcode_0xAB(void); +extern void e1m1x1_opcode_0xAC(void); +extern void e1m1x1_opcode_0xAD(void); +extern void e1m1x1_opcode_0xAE(void); +extern void e1m1x1_opcode_0xAF(void); +extern void e1m1x1_opcode_0xB0(void); +extern void e1m1x1_opcode_0xB1(void); +extern void e1m1x1_opcode_0xB2(void); +extern void e1m1x1_opcode_0xB3(void); +extern void e1m1x1_opcode_0xB4(void); +extern void e1m1x1_opcode_0xB5(void); +extern void e1m1x1_opcode_0xB6(void); +extern void e1m1x1_opcode_0xB7(void); +extern void e1m1x1_opcode_0xB8(void); +extern void e1m1x1_opcode_0xB9(void); +extern void e1m1x1_opcode_0xBA(void); +extern void e1m1x1_opcode_0xBB(void); +extern void e1m1x1_opcode_0xBC(void); +extern void e1m1x1_opcode_0xBD(void); +extern void e1m1x1_opcode_0xBE(void); +extern void e1m1x1_opcode_0xBF(void); +extern void e1m1x1_opcode_0xC0(void); +extern void e1m1x1_opcode_0xC1(void); +extern void e1m1x1_opcode_0xC2(void); +extern void e1m1x1_opcode_0xC3(void); +extern void e1m1x1_opcode_0xC4(void); +extern void e1m1x1_opcode_0xC5(void); +extern void e1m1x1_opcode_0xC6(void); +extern void e1m1x1_opcode_0xC7(void); +extern void e1m1x1_opcode_0xC8(void); +extern void e1m1x1_opcode_0xC9(void); +extern void e1m1x1_opcode_0xCA(void); +extern void e1m1x1_opcode_0xCB(void); +extern void e1m1x1_opcode_0xCC(void); +extern void e1m1x1_opcode_0xCD(void); +extern void e1m1x1_opcode_0xCE(void); +extern void e1m1x1_opcode_0xCF(void); +extern void e1m1x1_opcode_0xD0(void); +extern void e1m1x1_opcode_0xD1(void); +extern void e1m1x1_opcode_0xD2(void); +extern void e1m1x1_opcode_0xD3(void); +extern void e1m1x1_opcode_0xD4(void); +extern void e1m1x1_opcode_0xD5(void); +extern void e1m1x1_opcode_0xD6(void); +extern void e1m1x1_opcode_0xD7(void); +extern void e1m1x1_opcode_0xD8(void); +extern void e1m1x1_opcode_0xD9(void); +extern void e1m1x1_opcode_0xDA(void); +extern void e1m1x1_opcode_0xDB(void); +extern void e1m1x1_opcode_0xDC(void); +extern void e1m1x1_opcode_0xDD(void); +extern void e1m1x1_opcode_0xDE(void); +extern void e1m1x1_opcode_0xDF(void); +extern void e1m1x1_opcode_0xE0(void); +extern void e1m1x1_opcode_0xE1(void); +extern void e1m1x1_opcode_0xE2(void); +extern void e1m1x1_opcode_0xE3(void); +extern void e1m1x1_opcode_0xE4(void); +extern void e1m1x1_opcode_0xE5(void); +extern void e1m1x1_opcode_0xE6(void); +extern void e1m1x1_opcode_0xE7(void); +extern void e1m1x1_opcode_0xE8(void); +extern void e1m1x1_opcode_0xE9(void); +extern void e1m1x1_opcode_0xEA(void); +extern void e1m1x1_opcode_0xEB(void); +extern void e1m1x1_opcode_0xEC(void); +extern void e1m1x1_opcode_0xED(void); +extern void e1m1x1_opcode_0xEE(void); +extern void e1m1x1_opcode_0xEF(void); +extern void e1m1x1_opcode_0xF0(void); +extern void e1m1x1_opcode_0xF1(void); +extern void e1m1x1_opcode_0xF2(void); +extern void e1m1x1_opcode_0xF3(void); +extern void e1m1x1_opcode_0xF4(void); +extern void e1m1x1_opcode_0xF5(void); +extern void e1m1x1_opcode_0xF6(void); +extern void e1m1x1_opcode_0xF7(void); +extern void e1m1x1_opcode_0xF8(void); +extern void e1m1x1_opcode_0xF9(void); +extern void e1m1x1_opcode_0xFA(void); +extern void e1m1x1_opcode_0xFB(void); +extern void e1m1x1_opcode_0xFC(void); +extern void e1m1x1_opcode_0xFD(void); +extern void e1m1x1_opcode_0xFE(void); +extern void e1m1x1_opcode_0xFF(void); +extern void e1m1x1_reset(void); +extern void e1m1x1_abort(void); +extern void e1m1x1_nmi(void); +extern void e1m1x1_irq(void); +extern void e1m1x1_irne64(void); +extern void e1m1x1_irqt5(void); +#endif /* _CPU_TABLE_H */ diff --git a/src/cycles.h b/src/cycles.h new file mode 100644 index 0000000..8093aa0 --- /dev/null +++ b/src/cycles.h @@ -0,0 +1,1324 @@ +/* + * lib65816/cycles.h Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (cycles.h) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +#define e0m1x1_opcode_0x00_cycles 8 +#define e0m1x1_opcode_0x01_cycles 6 +#define e0m1x1_opcode_0x02_cycles 8 +#define e0m1x1_opcode_0x03_cycles 4 +#define e0m1x1_opcode_0x04_cycles 5 +#define e0m1x1_opcode_0x05_cycles 3 +#define e0m1x1_opcode_0x06_cycles 5 +#define e0m1x1_opcode_0x07_cycles 6 +#define e0m1x1_opcode_0x08_cycles 3 +#define e0m1x1_opcode_0x09_cycles 2 +#define e0m1x1_opcode_0x0A_cycles 2 +#define e0m1x1_opcode_0x0B_cycles 4 +#define e0m1x1_opcode_0x0C_cycles 6 +#define e0m1x1_opcode_0x0D_cycles 4 +#define e0m1x1_opcode_0x0E_cycles 6 +#define e0m1x1_opcode_0x0F_cycles 5 +#define e0m1x1_opcode_0x10_cycles 2 +#define e0m1x1_opcode_0x11_cycles 5 +#define e0m1x1_opcode_0x12_cycles 5 +#define e0m1x1_opcode_0x13_cycles 7 +#define e0m1x1_opcode_0x14_cycles 5 +#define e0m1x1_opcode_0x15_cycles 4 +#define e0m1x1_opcode_0x16_cycles 6 +#define e0m1x1_opcode_0x17_cycles 6 +#define e0m1x1_opcode_0x18_cycles 2 +#define e0m1x1_opcode_0x19_cycles 4 +#define e0m1x1_opcode_0x1A_cycles 2 +#define e0m1x1_opcode_0x1B_cycles 2 +#define e0m1x1_opcode_0x1C_cycles 6 +#define e0m1x1_opcode_0x1D_cycles 4 +#define e0m1x1_opcode_0x1E_cycles 7 +#define e0m1x1_opcode_0x1F_cycles 5 +#define e0m1x1_opcode_0x20_cycles 6 +#define e0m1x1_opcode_0x21_cycles 6 +#define e0m1x1_opcode_0x22_cycles 8 +#define e0m1x1_opcode_0x23_cycles 4 +#define e0m1x1_opcode_0x24_cycles 3 +#define e0m1x1_opcode_0x25_cycles 3 +#define e0m1x1_opcode_0x26_cycles 5 +#define e0m1x1_opcode_0x27_cycles 6 +#define e0m1x1_opcode_0x28_cycles 4 +#define e0m1x1_opcode_0x29_cycles 2 +#define e0m1x1_opcode_0x2A_cycles 2 +#define e0m1x1_opcode_0x2B_cycles 5 +#define e0m1x1_opcode_0x2C_cycles 4 +#define e0m1x1_opcode_0x2D_cycles 4 +#define e0m1x1_opcode_0x2E_cycles 6 +#define e0m1x1_opcode_0x2F_cycles 5 +#define e0m1x1_opcode_0x30_cycles 2 +#define e0m1x1_opcode_0x31_cycles 5 +#define e0m1x1_opcode_0x32_cycles 5 +#define e0m1x1_opcode_0x33_cycles 7 +#define e0m1x1_opcode_0x34_cycles 4 +#define e0m1x1_opcode_0x35_cycles 4 +#define e0m1x1_opcode_0x36_cycles 6 +#define e0m1x1_opcode_0x37_cycles 6 +#define e0m1x1_opcode_0x38_cycles 2 +#define e0m1x1_opcode_0x39_cycles 4 +#define e0m1x1_opcode_0x3A_cycles 2 +#define e0m1x1_opcode_0x3B_cycles 2 +#define e0m1x1_opcode_0x3C_cycles 4 +#define e0m1x1_opcode_0x3D_cycles 4 +#define e0m1x1_opcode_0x3E_cycles 7 +#define e0m1x1_opcode_0x3F_cycles 5 +#define e0m1x1_opcode_0x40_cycles 7 +#define e0m1x1_opcode_0x41_cycles 6 +#define e0m1x1_opcode_0x42_cycles 2 +#define e0m1x1_opcode_0x43_cycles 4 +#define e0m1x1_opcode_0x44_cycles 7 +#define e0m1x1_opcode_0x45_cycles 3 +#define e0m1x1_opcode_0x46_cycles 5 +#define e0m1x1_opcode_0x47_cycles 6 +#define e0m1x1_opcode_0x48_cycles 3 +#define e0m1x1_opcode_0x49_cycles 2 +#define e0m1x1_opcode_0x4A_cycles 2 +#define e0m1x1_opcode_0x4B_cycles 3 +#define e0m1x1_opcode_0x4C_cycles 3 +#define e0m1x1_opcode_0x4D_cycles 4 +#define e0m1x1_opcode_0x4E_cycles 6 +#define e0m1x1_opcode_0x4F_cycles 5 +#define e0m1x1_opcode_0x50_cycles 2 +#define e0m1x1_opcode_0x51_cycles 5 +#define e0m1x1_opcode_0x52_cycles 5 +#define e0m1x1_opcode_0x53_cycles 7 +#define e0m1x1_opcode_0x54_cycles 7 +#define e0m1x1_opcode_0x55_cycles 4 +#define e0m1x1_opcode_0x56_cycles 6 +#define e0m1x1_opcode_0x57_cycles 6 +#define e0m1x1_opcode_0x58_cycles 2 +#define e0m1x1_opcode_0x59_cycles 4 +#define e0m1x1_opcode_0x5A_cycles 3 +#define e0m1x1_opcode_0x5B_cycles 2 +#define e0m1x1_opcode_0x5C_cycles 4 +#define e0m1x1_opcode_0x5D_cycles 4 +#define e0m1x1_opcode_0x5E_cycles 7 +#define e0m1x1_opcode_0x5F_cycles 5 +#define e0m1x1_opcode_0x60_cycles 6 +#define e0m1x1_opcode_0x61_cycles 6 +#define e0m1x1_opcode_0x62_cycles 6 +#define e0m1x1_opcode_0x63_cycles 4 +#define e0m1x1_opcode_0x64_cycles 3 +#define e0m1x1_opcode_0x65_cycles 3 +#define e0m1x1_opcode_0x66_cycles 5 +#define e0m1x1_opcode_0x67_cycles 6 +#define e0m1x1_opcode_0x68_cycles 4 +#define e0m1x1_opcode_0x69_cycles 2 +#define e0m1x1_opcode_0x6A_cycles 2 +#define e0m1x1_opcode_0x6B_cycles 6 +#define e0m1x1_opcode_0x6C_cycles 5 +#define e0m1x1_opcode_0x6D_cycles 4 +#define e0m1x1_opcode_0x6E_cycles 6 +#define e0m1x1_opcode_0x6F_cycles 5 +#define e0m1x1_opcode_0x70_cycles 2 +#define e0m1x1_opcode_0x71_cycles 5 +#define e0m1x1_opcode_0x72_cycles 5 +#define e0m1x1_opcode_0x73_cycles 7 +#define e0m1x1_opcode_0x74_cycles 4 +#define e0m1x1_opcode_0x75_cycles 4 +#define e0m1x1_opcode_0x76_cycles 6 +#define e0m1x1_opcode_0x77_cycles 6 +#define e0m1x1_opcode_0x78_cycles 2 +#define e0m1x1_opcode_0x79_cycles 4 +#define e0m1x1_opcode_0x7A_cycles 4 +#define e0m1x1_opcode_0x7B_cycles 2 +#define e0m1x1_opcode_0x7C_cycles 6 +#define e0m1x1_opcode_0x7D_cycles 4 +#define e0m1x1_opcode_0x7E_cycles 7 +#define e0m1x1_opcode_0x7F_cycles 5 +#define e0m1x1_opcode_0x80_cycles 2 +#define e0m1x1_opcode_0x81_cycles 6 +#define e0m1x1_opcode_0x82_cycles 3 +#define e0m1x1_opcode_0x83_cycles 4 +#define e0m1x1_opcode_0x84_cycles 3 +#define e0m1x1_opcode_0x85_cycles 3 +#define e0m1x1_opcode_0x86_cycles 3 +#define e0m1x1_opcode_0x87_cycles 6 +#define e0m1x1_opcode_0x88_cycles 2 +#define e0m1x1_opcode_0x89_cycles 2 +#define e0m1x1_opcode_0x8A_cycles 2 +#define e0m1x1_opcode_0x8B_cycles 3 +#define e0m1x1_opcode_0x8C_cycles 4 +#define e0m1x1_opcode_0x8D_cycles 4 +#define e0m1x1_opcode_0x8E_cycles 4 +#define e0m1x1_opcode_0x8F_cycles 5 +#define e0m1x1_opcode_0x90_cycles 2 +#define e0m1x1_opcode_0x91_cycles 6 +#define e0m1x1_opcode_0x92_cycles 5 +#define e0m1x1_opcode_0x93_cycles 7 +#define e0m1x1_opcode_0x94_cycles 4 +#define e0m1x1_opcode_0x95_cycles 4 +#define e0m1x1_opcode_0x96_cycles 4 +#define e0m1x1_opcode_0x97_cycles 6 +#define e0m1x1_opcode_0x98_cycles 2 +#define e0m1x1_opcode_0x99_cycles 5 +#define e0m1x1_opcode_0x9A_cycles 2 +#define e0m1x1_opcode_0x9B_cycles 2 +#define e0m1x1_opcode_0x9C_cycles 4 +#define e0m1x1_opcode_0x9D_cycles 5 +#define e0m1x1_opcode_0x9E_cycles 5 +#define e0m1x1_opcode_0x9F_cycles 5 +#define e0m1x1_opcode_0xA0_cycles 2 +#define e0m1x1_opcode_0xA1_cycles 6 +#define e0m1x1_opcode_0xA2_cycles 2 +#define e0m1x1_opcode_0xA3_cycles 4 +#define e0m1x1_opcode_0xA4_cycles 3 +#define e0m1x1_opcode_0xA5_cycles 3 +#define e0m1x1_opcode_0xA6_cycles 3 +#define e0m1x1_opcode_0xA7_cycles 6 +#define e0m1x1_opcode_0xA8_cycles 2 +#define e0m1x1_opcode_0xA9_cycles 2 +#define e0m1x1_opcode_0xAA_cycles 2 +#define e0m1x1_opcode_0xAB_cycles 4 +#define e0m1x1_opcode_0xAC_cycles 4 +#define e0m1x1_opcode_0xAD_cycles 4 +#define e0m1x1_opcode_0xAE_cycles 4 +#define e0m1x1_opcode_0xAF_cycles 5 +#define e0m1x1_opcode_0xB0_cycles 2 +#define e0m1x1_opcode_0xB1_cycles 5 +#define e0m1x1_opcode_0xB2_cycles 5 +#define e0m1x1_opcode_0xB3_cycles 7 +#define e0m1x1_opcode_0xB4_cycles 4 +#define e0m1x1_opcode_0xB5_cycles 4 +#define e0m1x1_opcode_0xB6_cycles 4 +#define e0m1x1_opcode_0xB7_cycles 6 +#define e0m1x1_opcode_0xB8_cycles 2 +#define e0m1x1_opcode_0xB9_cycles 4 +#define e0m1x1_opcode_0xBA_cycles 2 +#define e0m1x1_opcode_0xBB_cycles 2 +#define e0m1x1_opcode_0xBC_cycles 4 +#define e0m1x1_opcode_0xBD_cycles 4 +#define e0m1x1_opcode_0xBE_cycles 4 +#define e0m1x1_opcode_0xBF_cycles 5 +#define e0m1x1_opcode_0xC0_cycles 2 +#define e0m1x1_opcode_0xC1_cycles 6 +#define e0m1x1_opcode_0xC2_cycles 3 +#define e0m1x1_opcode_0xC3_cycles 4 +#define e0m1x1_opcode_0xC4_cycles 3 +#define e0m1x1_opcode_0xC5_cycles 3 +#define e0m1x1_opcode_0xC6_cycles 5 +#define e0m1x1_opcode_0xC7_cycles 6 +#define e0m1x1_opcode_0xC8_cycles 2 +#define e0m1x1_opcode_0xC9_cycles 2 +#define e0m1x1_opcode_0xCA_cycles 2 +#define e0m1x1_opcode_0xCB_cycles 3 +#define e0m1x1_opcode_0xCC_cycles 4 +#define e0m1x1_opcode_0xCD_cycles 4 +#define e0m1x1_opcode_0xCE_cycles 4 +#define e0m1x1_opcode_0xCF_cycles 5 +#define e0m1x1_opcode_0xD0_cycles 2 +#define e0m1x1_opcode_0xD1_cycles 5 +#define e0m1x1_opcode_0xD2_cycles 5 +#define e0m1x1_opcode_0xD3_cycles 7 +#define e0m1x1_opcode_0xD4_cycles 6 +#define e0m1x1_opcode_0xD5_cycles 4 +#define e0m1x1_opcode_0xD6_cycles 6 +#define e0m1x1_opcode_0xD7_cycles 6 +#define e0m1x1_opcode_0xD8_cycles 2 +#define e0m1x1_opcode_0xD9_cycles 4 +#define e0m1x1_opcode_0xDA_cycles 3 +#define e0m1x1_opcode_0xDB_cycles 3 +#define e0m1x1_opcode_0xDC_cycles 6 +#define e0m1x1_opcode_0xDD_cycles 4 +#define e0m1x1_opcode_0xDE_cycles 7 +#define e0m1x1_opcode_0xDF_cycles 5 +#define e0m1x1_opcode_0xE0_cycles 2 +#define e0m1x1_opcode_0xE1_cycles 6 +#define e0m1x1_opcode_0xE2_cycles 3 +#define e0m1x1_opcode_0xE3_cycles 4 +#define e0m1x1_opcode_0xE4_cycles 3 +#define e0m1x1_opcode_0xE5_cycles 3 +#define e0m1x1_opcode_0xE6_cycles 5 +#define e0m1x1_opcode_0xE7_cycles 6 +#define e0m1x1_opcode_0xE8_cycles 2 +#define e0m1x1_opcode_0xE9_cycles 2 +#define e0m1x1_opcode_0xEA_cycles 2 +#define e0m1x1_opcode_0xEB_cycles 3 +#define e0m1x1_opcode_0xEC_cycles 4 +#define e0m1x1_opcode_0xED_cycles 4 +#define e0m1x1_opcode_0xEE_cycles 6 +#define e0m1x1_opcode_0xEF_cycles 5 +#define e0m1x1_opcode_0xF0_cycles 2 +#define e0m1x1_opcode_0xF1_cycles 5 +#define e0m1x1_opcode_0xF2_cycles 5 +#define e0m1x1_opcode_0xF3_cycles 7 +#define e0m1x1_opcode_0xF4_cycles 5 +#define e0m1x1_opcode_0xF5_cycles 4 +#define e0m1x1_opcode_0xF6_cycles 6 +#define e0m1x1_opcode_0xF7_cycles 6 +#define e0m1x1_opcode_0xF8_cycles 2 +#define e0m1x1_opcode_0xF9_cycles 4 +#define e0m1x1_opcode_0xFA_cycles 4 +#define e0m1x1_opcode_0xFB_cycles 2 +#define e0m1x1_opcode_0xFC_cycles 6 +#define e0m1x1_opcode_0xFD_cycles 4 +#define e0m1x1_opcode_0xFE_cycles 7 +#define e0m1x1_opcode_0xFF_cycles 5 +#define e0m1x1_reset_cycles 0 +#define e0m1x1_abort_cycles 0 +#define e0m1x1_nmi_cycles 0 +#define e0m1x1_irq_cycles 0 +#define e0m1x0_opcode_0x00_cycles 8 +#define e0m1x0_opcode_0x01_cycles 6 +#define e0m1x0_opcode_0x02_cycles 8 +#define e0m1x0_opcode_0x03_cycles 4 +#define e0m1x0_opcode_0x04_cycles 5 +#define e0m1x0_opcode_0x05_cycles 3 +#define e0m1x0_opcode_0x06_cycles 5 +#define e0m1x0_opcode_0x07_cycles 6 +#define e0m1x0_opcode_0x08_cycles 3 +#define e0m1x0_opcode_0x09_cycles 2 +#define e0m1x0_opcode_0x0A_cycles 2 +#define e0m1x0_opcode_0x0B_cycles 4 +#define e0m1x0_opcode_0x0C_cycles 6 +#define e0m1x0_opcode_0x0D_cycles 4 +#define e0m1x0_opcode_0x0E_cycles 6 +#define e0m1x0_opcode_0x0F_cycles 5 +#define e0m1x0_opcode_0x10_cycles 2 +#define e0m1x0_opcode_0x11_cycles 6 +#define e0m1x0_opcode_0x12_cycles 5 +#define e0m1x0_opcode_0x13_cycles 7 +#define e0m1x0_opcode_0x14_cycles 5 +#define e0m1x0_opcode_0x15_cycles 4 +#define e0m1x0_opcode_0x16_cycles 6 +#define e0m1x0_opcode_0x17_cycles 6 +#define e0m1x0_opcode_0x18_cycles 2 +#define e0m1x0_opcode_0x19_cycles 5 +#define e0m1x0_opcode_0x1A_cycles 2 +#define e0m1x0_opcode_0x1B_cycles 2 +#define e0m1x0_opcode_0x1C_cycles 6 +#define e0m1x0_opcode_0x1D_cycles 5 +#define e0m1x0_opcode_0x1E_cycles 7 +#define e0m1x0_opcode_0x1F_cycles 5 +#define e0m1x0_opcode_0x20_cycles 6 +#define e0m1x0_opcode_0x21_cycles 6 +#define e0m1x0_opcode_0x22_cycles 8 +#define e0m1x0_opcode_0x23_cycles 4 +#define e0m1x0_opcode_0x24_cycles 3 +#define e0m1x0_opcode_0x25_cycles 3 +#define e0m1x0_opcode_0x26_cycles 5 +#define e0m1x0_opcode_0x27_cycles 6 +#define e0m1x0_opcode_0x28_cycles 4 +#define e0m1x0_opcode_0x29_cycles 2 +#define e0m1x0_opcode_0x2A_cycles 2 +#define e0m1x0_opcode_0x2B_cycles 5 +#define e0m1x0_opcode_0x2C_cycles 4 +#define e0m1x0_opcode_0x2D_cycles 4 +#define e0m1x0_opcode_0x2E_cycles 6 +#define e0m1x0_opcode_0x2F_cycles 5 +#define e0m1x0_opcode_0x30_cycles 2 +#define e0m1x0_opcode_0x31_cycles 6 +#define e0m1x0_opcode_0x32_cycles 5 +#define e0m1x0_opcode_0x33_cycles 7 +#define e0m1x0_opcode_0x34_cycles 4 +#define e0m1x0_opcode_0x35_cycles 4 +#define e0m1x0_opcode_0x36_cycles 6 +#define e0m1x0_opcode_0x37_cycles 6 +#define e0m1x0_opcode_0x38_cycles 2 +#define e0m1x0_opcode_0x39_cycles 5 +#define e0m1x0_opcode_0x3A_cycles 2 +#define e0m1x0_opcode_0x3B_cycles 2 +#define e0m1x0_opcode_0x3C_cycles 5 +#define e0m1x0_opcode_0x3D_cycles 5 +#define e0m1x0_opcode_0x3E_cycles 7 +#define e0m1x0_opcode_0x3F_cycles 5 +#define e0m1x0_opcode_0x40_cycles 7 +#define e0m1x0_opcode_0x41_cycles 6 +#define e0m1x0_opcode_0x42_cycles 2 +#define e0m1x0_opcode_0x43_cycles 4 +#define e0m1x0_opcode_0x44_cycles 0 +#define e0m1x0_opcode_0x45_cycles 3 +#define e0m1x0_opcode_0x46_cycles 5 +#define e0m1x0_opcode_0x47_cycles 6 +#define e0m1x0_opcode_0x48_cycles 4 +#define e0m1x0_opcode_0x49_cycles 2 +#define e0m1x0_opcode_0x4A_cycles 2 +#define e0m1x0_opcode_0x4B_cycles 3 +#define e0m1x0_opcode_0x4C_cycles 3 +#define e0m1x0_opcode_0x4D_cycles 4 +#define e0m1x0_opcode_0x4E_cycles 6 +#define e0m1x0_opcode_0x4F_cycles 5 +#define e0m1x0_opcode_0x50_cycles 2 +#define e0m1x0_opcode_0x51_cycles 6 +#define e0m1x0_opcode_0x52_cycles 5 +#define e0m1x0_opcode_0x53_cycles 7 +#define e0m1x0_opcode_0x54_cycles 7 +#define e0m1x0_opcode_0x55_cycles 4 +#define e0m1x0_opcode_0x56_cycles 6 +#define e0m1x0_opcode_0x57_cycles 6 +#define e0m1x0_opcode_0x58_cycles 2 +#define e0m1x0_opcode_0x59_cycles 5 +#define e0m1x0_opcode_0x5A_cycles 4 +#define e0m1x0_opcode_0x5B_cycles 2 +#define e0m1x0_opcode_0x5C_cycles 4 +#define e0m1x0_opcode_0x5D_cycles 5 +#define e0m1x0_opcode_0x5E_cycles 7 +#define e0m1x0_opcode_0x5F_cycles 5 +#define e0m1x0_opcode_0x60_cycles 6 +#define e0m1x0_opcode_0x61_cycles 6 +#define e0m1x0_opcode_0x62_cycles 6 +#define e0m1x0_opcode_0x63_cycles 4 +#define e0m1x0_opcode_0x64_cycles 3 +#define e0m1x0_opcode_0x65_cycles 3 +#define e0m1x0_opcode_0x66_cycles 5 +#define e0m1x0_opcode_0x67_cycles 6 +#define e0m1x0_opcode_0x68_cycles 5 +#define e0m1x0_opcode_0x69_cycles 2 +#define e0m1x0_opcode_0x6A_cycles 2 +#define e0m1x0_opcode_0x6B_cycles 6 +#define e0m1x0_opcode_0x6C_cycles 5 +#define e0m1x0_opcode_0x6D_cycles 4 +#define e0m1x0_opcode_0x6E_cycles 6 +#define e0m1x0_opcode_0x6F_cycles 5 +#define e0m1x0_opcode_0x70_cycles 2 +#define e0m1x0_opcode_0x71_cycles 6 +#define e0m1x0_opcode_0x72_cycles 5 +#define e0m1x0_opcode_0x73_cycles 7 +#define e0m1x0_opcode_0x74_cycles 4 +#define e0m1x0_opcode_0x75_cycles 4 +#define e0m1x0_opcode_0x76_cycles 6 +#define e0m1x0_opcode_0x77_cycles 6 +#define e0m1x0_opcode_0x78_cycles 2 +#define e0m1x0_opcode_0x79_cycles 5 +#define e0m1x0_opcode_0x7A_cycles 5 +#define e0m1x0_opcode_0x7B_cycles 2 +#define e0m1x0_opcode_0x7C_cycles 6 +#define e0m1x0_opcode_0x7D_cycles 5 +#define e0m1x0_opcode_0x7E_cycles 7 +#define e0m1x0_opcode_0x7F_cycles 5 +#define e0m1x0_opcode_0x80_cycles 2 +#define e0m1x0_opcode_0x81_cycles 6 +#define e0m1x0_opcode_0x82_cycles 3 +#define e0m1x0_opcode_0x83_cycles 4 +#define e0m1x0_opcode_0x84_cycles 4 +#define e0m1x0_opcode_0x85_cycles 3 +#define e0m1x0_opcode_0x86_cycles 4 +#define e0m1x0_opcode_0x87_cycles 6 +#define e0m1x0_opcode_0x88_cycles 2 +#define e0m1x0_opcode_0x89_cycles 2 +#define e0m1x0_opcode_0x8A_cycles 2 +#define e0m1x0_opcode_0x8B_cycles 3 +#define e0m1x0_opcode_0x8C_cycles 5 +#define e0m1x0_opcode_0x8D_cycles 4 +#define e0m1x0_opcode_0x8E_cycles 5 +#define e0m1x0_opcode_0x8F_cycles 5 +#define e0m1x0_opcode_0x90_cycles 2 +#define e0m1x0_opcode_0x91_cycles 6 +#define e0m1x0_opcode_0x92_cycles 5 +#define e0m1x0_opcode_0x93_cycles 7 +#define e0m1x0_opcode_0x94_cycles 5 +#define e0m1x0_opcode_0x95_cycles 4 +#define e0m1x0_opcode_0x96_cycles 5 +#define e0m1x0_opcode_0x97_cycles 6 +#define e0m1x0_opcode_0x98_cycles 2 +#define e0m1x0_opcode_0x99_cycles 5 +#define e0m1x0_opcode_0x9A_cycles 2 +#define e0m1x0_opcode_0x9B_cycles 2 +#define e0m1x0_opcode_0x9C_cycles 4 +#define e0m1x0_opcode_0x9D_cycles 5 +#define e0m1x0_opcode_0x9E_cycles 5 +#define e0m1x0_opcode_0x9F_cycles 5 +#define e0m1x0_opcode_0xA0_cycles 3 +#define e0m1x0_opcode_0xA1_cycles 6 +#define e0m1x0_opcode_0xA2_cycles 3 +#define e0m1x0_opcode_0xA3_cycles 4 +#define e0m1x0_opcode_0xA4_cycles 4 +#define e0m1x0_opcode_0xA5_cycles 3 +#define e0m1x0_opcode_0xA6_cycles 4 +#define e0m1x0_opcode_0xA7_cycles 6 +#define e0m1x0_opcode_0xA8_cycles 2 +#define e0m1x0_opcode_0xA9_cycles 2 +#define e0m1x0_opcode_0xAA_cycles 2 +#define e0m1x0_opcode_0xAB_cycles 4 +#define e0m1x0_opcode_0xAC_cycles 5 +#define e0m1x0_opcode_0xAD_cycles 4 +#define e0m1x0_opcode_0xAE_cycles 5 +#define e0m1x0_opcode_0xAF_cycles 5 +#define e0m1x0_opcode_0xB0_cycles 2 +#define e0m1x0_opcode_0xB1_cycles 6 +#define e0m1x0_opcode_0xB2_cycles 5 +#define e0m1x0_opcode_0xB3_cycles 7 +#define e0m1x0_opcode_0xB4_cycles 5 +#define e0m1x0_opcode_0xB5_cycles 4 +#define e0m1x0_opcode_0xB6_cycles 5 +#define e0m1x0_opcode_0xB7_cycles 6 +#define e0m1x0_opcode_0xB8_cycles 2 +#define e0m1x0_opcode_0xB9_cycles 5 +#define e0m1x0_opcode_0xBA_cycles 2 +#define e0m1x0_opcode_0xBB_cycles 2 +#define e0m1x0_opcode_0xBC_cycles 5 +#define e0m1x0_opcode_0xBD_cycles 5 +#define e0m1x0_opcode_0xBE_cycles 5 +#define e0m1x0_opcode_0xBF_cycles 5 +#define e0m1x0_opcode_0xC0_cycles 3 +#define e0m1x0_opcode_0xC1_cycles 6 +#define e0m1x0_opcode_0xC2_cycles 3 +#define e0m1x0_opcode_0xC3_cycles 4 +#define e0m1x0_opcode_0xC4_cycles 4 +#define e0m1x0_opcode_0xC5_cycles 3 +#define e0m1x0_opcode_0xC6_cycles 6 +#define e0m1x0_opcode_0xC7_cycles 6 +#define e0m1x0_opcode_0xC8_cycles 2 +#define e0m1x0_opcode_0xC9_cycles 2 +#define e0m1x0_opcode_0xCA_cycles 2 +#define e0m1x0_opcode_0xCB_cycles 3 +#define e0m1x0_opcode_0xCC_cycles 5 +#define e0m1x0_opcode_0xCD_cycles 4 +#define e0m1x0_opcode_0xCE_cycles 6 +#define e0m1x0_opcode_0xCF_cycles 5 +#define e0m1x0_opcode_0xD0_cycles 2 +#define e0m1x0_opcode_0xD1_cycles 6 +#define e0m1x0_opcode_0xD2_cycles 5 +#define e0m1x0_opcode_0xD3_cycles 7 +#define e0m1x0_opcode_0xD4_cycles 6 +#define e0m1x0_opcode_0xD5_cycles 4 +#define e0m1x0_opcode_0xD6_cycles 8 +#define e0m1x0_opcode_0xD7_cycles 6 +#define e0m1x0_opcode_0xD8_cycles 2 +#define e0m1x0_opcode_0xD9_cycles 5 +#define e0m1x0_opcode_0xDA_cycles 4 +#define e0m1x0_opcode_0xDB_cycles 3 +#define e0m1x0_opcode_0xDC_cycles 6 +#define e0m1x0_opcode_0xDD_cycles 5 +#define e0m1x0_opcode_0xDE_cycles 7 +#define e0m1x0_opcode_0xDF_cycles 5 +#define e0m1x0_opcode_0xE0_cycles 3 +#define e0m1x0_opcode_0xE1_cycles 6 +#define e0m1x0_opcode_0xE2_cycles 3 +#define e0m1x0_opcode_0xE3_cycles 4 +#define e0m1x0_opcode_0xE4_cycles 4 +#define e0m1x0_opcode_0xE5_cycles 3 +#define e0m1x0_opcode_0xE6_cycles 6 +#define e0m1x0_opcode_0xE7_cycles 6 +#define e0m1x0_opcode_0xE8_cycles 2 +#define e0m1x0_opcode_0xE9_cycles 2 +#define e0m1x0_opcode_0xEA_cycles 2 +#define e0m1x0_opcode_0xEB_cycles 3 +#define e0m1x0_opcode_0xEC_cycles 5 +#define e0m1x0_opcode_0xED_cycles 4 +#define e0m1x0_opcode_0xEE_cycles 6 +#define e0m1x0_opcode_0xEF_cycles 5 +#define e0m1x0_opcode_0xF0_cycles 2 +#define e0m1x0_opcode_0xF1_cycles 6 +#define e0m1x0_opcode_0xF2_cycles 5 +#define e0m1x0_opcode_0xF3_cycles 7 +#define e0m1x0_opcode_0xF4_cycles 5 +#define e0m1x0_opcode_0xF5_cycles 4 +#define e0m1x0_opcode_0xF6_cycles 8 +#define e0m1x0_opcode_0xF7_cycles 6 +#define e0m1x0_opcode_0xF8_cycles 2 +#define e0m1x0_opcode_0xF9_cycles 5 +#define e0m1x0_opcode_0xFA_cycles 5 +#define e0m1x0_opcode_0xFB_cycles 2 +#define e0m1x0_opcode_0xFC_cycles 6 +#define e0m1x0_opcode_0xFD_cycles 5 +#define e0m1x0_opcode_0xFE_cycles 7 +#define e0m1x0_opcode_0xFF_cycles 5 +#define e0m1x0_reset_cycles 0 +#define e0m1x0_abort_cycles 0 +#define e0m1x0_nmi_cycles 0 +#define e0m1x0_irq_cycles 0 +#define e0m0x1_opcode_0x00_cycles 8 +#define e0m0x1_opcode_0x01_cycles 7 +#define e0m0x1_opcode_0x02_cycles 8 +#define e0m0x1_opcode_0x03_cycles 5 +#define e0m0x1_opcode_0x04_cycles 7 +#define e0m0x1_opcode_0x05_cycles 4 +#define e0m0x1_opcode_0x06_cycles 7 +#define e0m0x1_opcode_0x07_cycles 7 +#define e0m0x1_opcode_0x08_cycles 3 +#define e0m0x1_opcode_0x09_cycles 3 +#define e0m0x1_opcode_0x0A_cycles 2 +#define e0m0x1_opcode_0x0B_cycles 4 +#define e0m0x1_opcode_0x0C_cycles 8 +#define e0m0x1_opcode_0x0D_cycles 5 +#define e0m0x1_opcode_0x0E_cycles 8 +#define e0m0x1_opcode_0x0F_cycles 6 +#define e0m0x1_opcode_0x10_cycles 2 +#define e0m0x1_opcode_0x11_cycles 6 +#define e0m0x1_opcode_0x12_cycles 6 +#define e0m0x1_opcode_0x13_cycles 8 +#define e0m0x1_opcode_0x14_cycles 7 +#define e0m0x1_opcode_0x15_cycles 5 +#define e0m0x1_opcode_0x16_cycles 8 +#define e0m0x1_opcode_0x17_cycles 7 +#define e0m0x1_opcode_0x18_cycles 2 +#define e0m0x1_opcode_0x19_cycles 5 +#define e0m0x1_opcode_0x1A_cycles 2 +#define e0m0x1_opcode_0x1B_cycles 2 +#define e0m0x1_opcode_0x1C_cycles 8 +#define e0m0x1_opcode_0x1D_cycles 5 +#define e0m0x1_opcode_0x1E_cycles 9 +#define e0m0x1_opcode_0x1F_cycles 6 +#define e0m0x1_opcode_0x20_cycles 6 +#define e0m0x1_opcode_0x21_cycles 7 +#define e0m0x1_opcode_0x22_cycles 8 +#define e0m0x1_opcode_0x23_cycles 5 +#define e0m0x1_opcode_0x24_cycles 4 +#define e0m0x1_opcode_0x25_cycles 4 +#define e0m0x1_opcode_0x26_cycles 7 +#define e0m0x1_opcode_0x27_cycles 7 +#define e0m0x1_opcode_0x28_cycles 4 +#define e0m0x1_opcode_0x29_cycles 3 +#define e0m0x1_opcode_0x2A_cycles 2 +#define e0m0x1_opcode_0x2B_cycles 5 +#define e0m0x1_opcode_0x2C_cycles 5 +#define e0m0x1_opcode_0x2D_cycles 5 +#define e0m0x1_opcode_0x2E_cycles 8 +#define e0m0x1_opcode_0x2F_cycles 6 +#define e0m0x1_opcode_0x30_cycles 2 +#define e0m0x1_opcode_0x31_cycles 6 +#define e0m0x1_opcode_0x32_cycles 6 +#define e0m0x1_opcode_0x33_cycles 8 +#define e0m0x1_opcode_0x34_cycles 5 +#define e0m0x1_opcode_0x35_cycles 5 +#define e0m0x1_opcode_0x36_cycles 8 +#define e0m0x1_opcode_0x37_cycles 7 +#define e0m0x1_opcode_0x38_cycles 2 +#define e0m0x1_opcode_0x39_cycles 5 +#define e0m0x1_opcode_0x3A_cycles 2 +#define e0m0x1_opcode_0x3B_cycles 2 +#define e0m0x1_opcode_0x3C_cycles 5 +#define e0m0x1_opcode_0x3D_cycles 5 +#define e0m0x1_opcode_0x3E_cycles 9 +#define e0m0x1_opcode_0x3F_cycles 6 +#define e0m0x1_opcode_0x40_cycles 7 +#define e0m0x1_opcode_0x41_cycles 7 +#define e0m0x1_opcode_0x42_cycles 2 +#define e0m0x1_opcode_0x43_cycles 5 +#define e0m0x1_opcode_0x44_cycles 0 +#define e0m0x1_opcode_0x45_cycles 4 +#define e0m0x1_opcode_0x46_cycles 7 +#define e0m0x1_opcode_0x47_cycles 7 +#define e0m0x1_opcode_0x48_cycles 4 +#define e0m0x1_opcode_0x49_cycles 3 +#define e0m0x1_opcode_0x4A_cycles 2 +#define e0m0x1_opcode_0x4B_cycles 3 +#define e0m0x1_opcode_0x4C_cycles 3 +#define e0m0x1_opcode_0x4D_cycles 5 +#define e0m0x1_opcode_0x4E_cycles 8 +#define e0m0x1_opcode_0x4F_cycles 6 +#define e0m0x1_opcode_0x50_cycles 2 +#define e0m0x1_opcode_0x51_cycles 6 +#define e0m0x1_opcode_0x52_cycles 6 +#define e0m0x1_opcode_0x53_cycles 8 +#define e0m0x1_opcode_0x54_cycles 8 +#define e0m0x1_opcode_0x55_cycles 5 +#define e0m0x1_opcode_0x56_cycles 8 +#define e0m0x1_opcode_0x57_cycles 7 +#define e0m0x1_opcode_0x58_cycles 2 +#define e0m0x1_opcode_0x59_cycles 5 +#define e0m0x1_opcode_0x5A_cycles 3 +#define e0m0x1_opcode_0x5B_cycles 2 +#define e0m0x1_opcode_0x5C_cycles 4 +#define e0m0x1_opcode_0x5D_cycles 5 +#define e0m0x1_opcode_0x5E_cycles 9 +#define e0m0x1_opcode_0x5F_cycles 6 +#define e0m0x1_opcode_0x60_cycles 6 +#define e0m0x1_opcode_0x61_cycles 7 +#define e0m0x1_opcode_0x62_cycles 6 +#define e0m0x1_opcode_0x63_cycles 5 +#define e0m0x1_opcode_0x64_cycles 4 +#define e0m0x1_opcode_0x65_cycles 4 +#define e0m0x1_opcode_0x66_cycles 7 +#define e0m0x1_opcode_0x67_cycles 7 +#define e0m0x1_opcode_0x68_cycles 5 +#define e0m0x1_opcode_0x69_cycles 3 +#define e0m0x1_opcode_0x6A_cycles 2 +#define e0m0x1_opcode_0x6B_cycles 6 +#define e0m0x1_opcode_0x6C_cycles 5 +#define e0m0x1_opcode_0x6D_cycles 5 +#define e0m0x1_opcode_0x6E_cycles 8 +#define e0m0x1_opcode_0x6F_cycles 6 +#define e0m0x1_opcode_0x70_cycles 2 +#define e0m0x1_opcode_0x71_cycles 6 +#define e0m0x1_opcode_0x72_cycles 6 +#define e0m0x1_opcode_0x73_cycles 8 +#define e0m0x1_opcode_0x74_cycles 5 +#define e0m0x1_opcode_0x75_cycles 5 +#define e0m0x1_opcode_0x76_cycles 8 +#define e0m0x1_opcode_0x77_cycles 7 +#define e0m0x1_opcode_0x78_cycles 2 +#define e0m0x1_opcode_0x79_cycles 5 +#define e0m0x1_opcode_0x7A_cycles 4 +#define e0m0x1_opcode_0x7B_cycles 2 +#define e0m0x1_opcode_0x7C_cycles 6 +#define e0m0x1_opcode_0x7D_cycles 5 +#define e0m0x1_opcode_0x7E_cycles 9 +#define e0m0x1_opcode_0x7F_cycles 6 +#define e0m0x1_opcode_0x80_cycles 2 +#define e0m0x1_opcode_0x81_cycles 7 +#define e0m0x1_opcode_0x82_cycles 3 +#define e0m0x1_opcode_0x83_cycles 5 +#define e0m0x1_opcode_0x84_cycles 3 +#define e0m0x1_opcode_0x85_cycles 4 +#define e0m0x1_opcode_0x86_cycles 3 +#define e0m0x1_opcode_0x87_cycles 7 +#define e0m0x1_opcode_0x88_cycles 2 +#define e0m0x1_opcode_0x89_cycles 3 +#define e0m0x1_opcode_0x8A_cycles 2 +#define e0m0x1_opcode_0x8B_cycles 3 +#define e0m0x1_opcode_0x8C_cycles 4 +#define e0m0x1_opcode_0x8D_cycles 5 +#define e0m0x1_opcode_0x8E_cycles 4 +#define e0m0x1_opcode_0x8F_cycles 6 +#define e0m0x1_opcode_0x90_cycles 2 +#define e0m0x1_opcode_0x91_cycles 6 +#define e0m0x1_opcode_0x92_cycles 6 +#define e0m0x1_opcode_0x93_cycles 8 +#define e0m0x1_opcode_0x94_cycles 4 +#define e0m0x1_opcode_0x95_cycles 5 +#define e0m0x1_opcode_0x96_cycles 4 +#define e0m0x1_opcode_0x97_cycles 7 +#define e0m0x1_opcode_0x98_cycles 2 +#define e0m0x1_opcode_0x99_cycles 5 +#define e0m0x1_opcode_0x9A_cycles 2 +#define e0m0x1_opcode_0x9B_cycles 2 +#define e0m0x1_opcode_0x9C_cycles 5 +#define e0m0x1_opcode_0x9D_cycles 5 +#define e0m0x1_opcode_0x9E_cycles 5 +#define e0m0x1_opcode_0x9F_cycles 6 +#define e0m0x1_opcode_0xA0_cycles 2 +#define e0m0x1_opcode_0xA1_cycles 7 +#define e0m0x1_opcode_0xA2_cycles 2 +#define e0m0x1_opcode_0xA3_cycles 5 +#define e0m0x1_opcode_0xA4_cycles 3 +#define e0m0x1_opcode_0xA5_cycles 4 +#define e0m0x1_opcode_0xA6_cycles 3 +#define e0m0x1_opcode_0xA7_cycles 7 +#define e0m0x1_opcode_0xA8_cycles 2 +#define e0m0x1_opcode_0xA9_cycles 3 +#define e0m0x1_opcode_0xAA_cycles 2 +#define e0m0x1_opcode_0xAB_cycles 4 +#define e0m0x1_opcode_0xAC_cycles 4 +#define e0m0x1_opcode_0xAD_cycles 5 +#define e0m0x1_opcode_0xAE_cycles 4 +#define e0m0x1_opcode_0xAF_cycles 6 +#define e0m0x1_opcode_0xB0_cycles 2 +#define e0m0x1_opcode_0xB1_cycles 6 +#define e0m0x1_opcode_0xB2_cycles 6 +#define e0m0x1_opcode_0xB3_cycles 8 +#define e0m0x1_opcode_0xB4_cycles 4 +#define e0m0x1_opcode_0xB5_cycles 5 +#define e0m0x1_opcode_0xB6_cycles 4 +#define e0m0x1_opcode_0xB7_cycles 7 +#define e0m0x1_opcode_0xB8_cycles 2 +#define e0m0x1_opcode_0xB9_cycles 5 +#define e0m0x1_opcode_0xBA_cycles 2 +#define e0m0x1_opcode_0xBB_cycles 2 +#define e0m0x1_opcode_0xBC_cycles 4 +#define e0m0x1_opcode_0xBD_cycles 5 +#define e0m0x1_opcode_0xBE_cycles 4 +#define e0m0x1_opcode_0xBF_cycles 6 +#define e0m0x1_opcode_0xC0_cycles 2 +#define e0m0x1_opcode_0xC1_cycles 7 +#define e0m0x1_opcode_0xC2_cycles 3 +#define e0m0x1_opcode_0xC3_cycles 5 +#define e0m0x1_opcode_0xC4_cycles 3 +#define e0m0x1_opcode_0xC5_cycles 4 +#define e0m0x1_opcode_0xC6_cycles 7 +#define e0m0x1_opcode_0xC7_cycles 7 +#define e0m0x1_opcode_0xC8_cycles 2 +#define e0m0x1_opcode_0xC9_cycles 3 +#define e0m0x1_opcode_0xCA_cycles 2 +#define e0m0x1_opcode_0xCB_cycles 3 +#define e0m0x1_opcode_0xCC_cycles 4 +#define e0m0x1_opcode_0xCD_cycles 5 +#define e0m0x1_opcode_0xCE_cycles 8 +#define e0m0x1_opcode_0xCF_cycles 6 +#define e0m0x1_opcode_0xD0_cycles 2 +#define e0m0x1_opcode_0xD1_cycles 6 +#define e0m0x1_opcode_0xD2_cycles 6 +#define e0m0x1_opcode_0xD3_cycles 8 +#define e0m0x1_opcode_0xD4_cycles 6 +#define e0m0x1_opcode_0xD5_cycles 5 +#define e0m0x1_opcode_0xD6_cycles 8 +#define e0m0x1_opcode_0xD7_cycles 7 +#define e0m0x1_opcode_0xD8_cycles 2 +#define e0m0x1_opcode_0xD9_cycles 5 +#define e0m0x1_opcode_0xDA_cycles 3 +#define e0m0x1_opcode_0xDB_cycles 3 +#define e0m0x1_opcode_0xDC_cycles 6 +#define e0m0x1_opcode_0xDD_cycles 5 +#define e0m0x1_opcode_0xDE_cycles 9 +#define e0m0x1_opcode_0xDF_cycles 6 +#define e0m0x1_opcode_0xE0_cycles 2 +#define e0m0x1_opcode_0xE1_cycles 7 +#define e0m0x1_opcode_0xE2_cycles 3 +#define e0m0x1_opcode_0xE3_cycles 5 +#define e0m0x1_opcode_0xE4_cycles 3 +#define e0m0x1_opcode_0xE5_cycles 4 +#define e0m0x1_opcode_0xE6_cycles 7 +#define e0m0x1_opcode_0xE7_cycles 7 +#define e0m0x1_opcode_0xE8_cycles 2 +#define e0m0x1_opcode_0xE9_cycles 3 +#define e0m0x1_opcode_0xEA_cycles 2 +#define e0m0x1_opcode_0xEB_cycles 3 +#define e0m0x1_opcode_0xEC_cycles 4 +#define e0m0x1_opcode_0xED_cycles 5 +#define e0m0x1_opcode_0xEE_cycles 8 +#define e0m0x1_opcode_0xEF_cycles 6 +#define e0m0x1_opcode_0xF0_cycles 2 +#define e0m0x1_opcode_0xF1_cycles 6 +#define e0m0x1_opcode_0xF2_cycles 6 +#define e0m0x1_opcode_0xF3_cycles 8 +#define e0m0x1_opcode_0xF4_cycles 5 +#define e0m0x1_opcode_0xF5_cycles 5 +#define e0m0x1_opcode_0xF6_cycles 8 +#define e0m0x1_opcode_0xF7_cycles 7 +#define e0m0x1_opcode_0xF8_cycles 2 +#define e0m0x1_opcode_0xF9_cycles 5 +#define e0m0x1_opcode_0xFA_cycles 4 +#define e0m0x1_opcode_0xFB_cycles 2 +#define e0m0x1_opcode_0xFC_cycles 6 +#define e0m0x1_opcode_0xFD_cycles 5 +#define e0m0x1_opcode_0xFE_cycles 9 +#define e0m0x1_opcode_0xFF_cycles 6 +#define e0m0x1_reset_cycles 0 +#define e0m0x1_abort_cycles 0 +#define e0m0x1_nmi_cycles 0 +#define e0m0x1_irq_cycles 0 +#define e0m0x0_opcode_0x00_cycles 8 +#define e0m0x0_opcode_0x01_cycles 7 +#define e0m0x0_opcode_0x02_cycles 8 +#define e0m0x0_opcode_0x03_cycles 5 +#define e0m0x0_opcode_0x04_cycles 7 +#define e0m0x0_opcode_0x05_cycles 4 +#define e0m0x0_opcode_0x06_cycles 7 +#define e0m0x0_opcode_0x07_cycles 7 +#define e0m0x0_opcode_0x08_cycles 3 +#define e0m0x0_opcode_0x09_cycles 3 +#define e0m0x0_opcode_0x0A_cycles 2 +#define e0m0x0_opcode_0x0B_cycles 4 +#define e0m0x0_opcode_0x0C_cycles 8 +#define e0m0x0_opcode_0x0D_cycles 5 +#define e0m0x0_opcode_0x0E_cycles 8 +#define e0m0x0_opcode_0x0F_cycles 6 +#define e0m0x0_opcode_0x10_cycles 2 +#define e0m0x0_opcode_0x11_cycles 7 +#define e0m0x0_opcode_0x12_cycles 6 +#define e0m0x0_opcode_0x13_cycles 8 +#define e0m0x0_opcode_0x14_cycles 7 +#define e0m0x0_opcode_0x15_cycles 5 +#define e0m0x0_opcode_0x16_cycles 8 +#define e0m0x0_opcode_0x17_cycles 7 +#define e0m0x0_opcode_0x18_cycles 2 +#define e0m0x0_opcode_0x19_cycles 6 +#define e0m0x0_opcode_0x1A_cycles 2 +#define e0m0x0_opcode_0x1B_cycles 2 +#define e0m0x0_opcode_0x1C_cycles 8 +#define e0m0x0_opcode_0x1D_cycles 6 +#define e0m0x0_opcode_0x1E_cycles 9 +#define e0m0x0_opcode_0x1F_cycles 6 +#define e0m0x0_opcode_0x20_cycles 6 +#define e0m0x0_opcode_0x21_cycles 7 +#define e0m0x0_opcode_0x22_cycles 8 +#define e0m0x0_opcode_0x23_cycles 5 +#define e0m0x0_opcode_0x24_cycles 4 +#define e0m0x0_opcode_0x25_cycles 4 +#define e0m0x0_opcode_0x26_cycles 7 +#define e0m0x0_opcode_0x27_cycles 7 +#define e0m0x0_opcode_0x28_cycles 4 +#define e0m0x0_opcode_0x29_cycles 3 +#define e0m0x0_opcode_0x2A_cycles 2 +#define e0m0x0_opcode_0x2B_cycles 5 +#define e0m0x0_opcode_0x2C_cycles 5 +#define e0m0x0_opcode_0x2D_cycles 5 +#define e0m0x0_opcode_0x2E_cycles 8 +#define e0m0x0_opcode_0x2F_cycles 6 +#define e0m0x0_opcode_0x30_cycles 2 +#define e0m0x0_opcode_0x31_cycles 7 +#define e0m0x0_opcode_0x32_cycles 6 +#define e0m0x0_opcode_0x33_cycles 8 +#define e0m0x0_opcode_0x34_cycles 5 +#define e0m0x0_opcode_0x35_cycles 5 +#define e0m0x0_opcode_0x36_cycles 8 +#define e0m0x0_opcode_0x37_cycles 7 +#define e0m0x0_opcode_0x38_cycles 2 +#define e0m0x0_opcode_0x39_cycles 6 +#define e0m0x0_opcode_0x3A_cycles 2 +#define e0m0x0_opcode_0x3B_cycles 2 +#define e0m0x0_opcode_0x3C_cycles 6 +#define e0m0x0_opcode_0x3D_cycles 6 +#define e0m0x0_opcode_0x3E_cycles 9 +#define e0m0x0_opcode_0x3F_cycles 6 +#define e0m0x0_opcode_0x40_cycles 7 +#define e0m0x0_opcode_0x41_cycles 7 +#define e0m0x0_opcode_0x42_cycles 2 +#define e0m0x0_opcode_0x43_cycles 5 +#define e0m0x0_opcode_0x44_cycles 0 +#define e0m0x0_opcode_0x45_cycles 4 +#define e0m0x0_opcode_0x46_cycles 7 +#define e0m0x0_opcode_0x47_cycles 7 +#define e0m0x0_opcode_0x48_cycles 3 +#define e0m0x0_opcode_0x49_cycles 3 +#define e0m0x0_opcode_0x4A_cycles 2 +#define e0m0x0_opcode_0x4B_cycles 3 +#define e0m0x0_opcode_0x4C_cycles 3 +#define e0m0x0_opcode_0x4D_cycles 5 +#define e0m0x0_opcode_0x4E_cycles 8 +#define e0m0x0_opcode_0x4F_cycles 6 +#define e0m0x0_opcode_0x50_cycles 2 +#define e0m0x0_opcode_0x51_cycles 7 +#define e0m0x0_opcode_0x52_cycles 6 +#define e0m0x0_opcode_0x53_cycles 8 +#define e0m0x0_opcode_0x54_cycles 8 +#define e0m0x0_opcode_0x55_cycles 5 +#define e0m0x0_opcode_0x56_cycles 8 +#define e0m0x0_opcode_0x57_cycles 7 +#define e0m0x0_opcode_0x58_cycles 2 +#define e0m0x0_opcode_0x59_cycles 6 +#define e0m0x0_opcode_0x5A_cycles 4 +#define e0m0x0_opcode_0x5B_cycles 2 +#define e0m0x0_opcode_0x5C_cycles 4 +#define e0m0x0_opcode_0x5D_cycles 6 +#define e0m0x0_opcode_0x5E_cycles 9 +#define e0m0x0_opcode_0x5F_cycles 6 +#define e0m0x0_opcode_0x60_cycles 6 +#define e0m0x0_opcode_0x61_cycles 7 +#define e0m0x0_opcode_0x62_cycles 6 +#define e0m0x0_opcode_0x63_cycles 5 +#define e0m0x0_opcode_0x64_cycles 4 +#define e0m0x0_opcode_0x65_cycles 4 +#define e0m0x0_opcode_0x66_cycles 7 +#define e0m0x0_opcode_0x67_cycles 7 +#define e0m0x0_opcode_0x68_cycles 4 +#define e0m0x0_opcode_0x69_cycles 3 +#define e0m0x0_opcode_0x6A_cycles 2 +#define e0m0x0_opcode_0x6B_cycles 6 +#define e0m0x0_opcode_0x6C_cycles 5 +#define e0m0x0_opcode_0x6D_cycles 5 +#define e0m0x0_opcode_0x6E_cycles 8 +#define e0m0x0_opcode_0x6F_cycles 6 +#define e0m0x0_opcode_0x70_cycles 2 +#define e0m0x0_opcode_0x71_cycles 7 +#define e0m0x0_opcode_0x72_cycles 6 +#define e0m0x0_opcode_0x73_cycles 8 +#define e0m0x0_opcode_0x74_cycles 5 +#define e0m0x0_opcode_0x75_cycles 5 +#define e0m0x0_opcode_0x76_cycles 8 +#define e0m0x0_opcode_0x77_cycles 7 +#define e0m0x0_opcode_0x78_cycles 2 +#define e0m0x0_opcode_0x79_cycles 6 +#define e0m0x0_opcode_0x7A_cycles 5 +#define e0m0x0_opcode_0x7B_cycles 2 +#define e0m0x0_opcode_0x7C_cycles 6 +#define e0m0x0_opcode_0x7D_cycles 6 +#define e0m0x0_opcode_0x7E_cycles 9 +#define e0m0x0_opcode_0x7F_cycles 6 +#define e0m0x0_opcode_0x80_cycles 2 +#define e0m0x0_opcode_0x81_cycles 7 +#define e0m0x0_opcode_0x82_cycles 3 +#define e0m0x0_opcode_0x83_cycles 5 +#define e0m0x0_opcode_0x84_cycles 4 +#define e0m0x0_opcode_0x85_cycles 4 +#define e0m0x0_opcode_0x86_cycles 4 +#define e0m0x0_opcode_0x87_cycles 7 +#define e0m0x0_opcode_0x88_cycles 2 +#define e0m0x0_opcode_0x89_cycles 3 +#define e0m0x0_opcode_0x8A_cycles 2 +#define e0m0x0_opcode_0x8B_cycles 3 +#define e0m0x0_opcode_0x8C_cycles 5 +#define e0m0x0_opcode_0x8D_cycles 5 +#define e0m0x0_opcode_0x8E_cycles 5 +#define e0m0x0_opcode_0x8F_cycles 6 +#define e0m0x0_opcode_0x90_cycles 2 +#define e0m0x0_opcode_0x91_cycles 7 +#define e0m0x0_opcode_0x92_cycles 6 +#define e0m0x0_opcode_0x93_cycles 8 +#define e0m0x0_opcode_0x94_cycles 5 +#define e0m0x0_opcode_0x95_cycles 5 +#define e0m0x0_opcode_0x96_cycles 5 +#define e0m0x0_opcode_0x97_cycles 7 +#define e0m0x0_opcode_0x98_cycles 2 +#define e0m0x0_opcode_0x99_cycles 6 +#define e0m0x0_opcode_0x9A_cycles 2 +#define e0m0x0_opcode_0x9B_cycles 2 +#define e0m0x0_opcode_0x9C_cycles 5 +#define e0m0x0_opcode_0x9D_cycles 6 +#define e0m0x0_opcode_0x9E_cycles 6 +#define e0m0x0_opcode_0x9F_cycles 6 +#define e0m0x0_opcode_0xA0_cycles 3 +#define e0m0x0_opcode_0xA1_cycles 7 +#define e0m0x0_opcode_0xA2_cycles 3 +#define e0m0x0_opcode_0xA3_cycles 5 +#define e0m0x0_opcode_0xA4_cycles 4 +#define e0m0x0_opcode_0xA5_cycles 4 +#define e0m0x0_opcode_0xA6_cycles 4 +#define e0m0x0_opcode_0xA7_cycles 7 +#define e0m0x0_opcode_0xA8_cycles 2 +#define e0m0x0_opcode_0xA9_cycles 3 +#define e0m0x0_opcode_0xAA_cycles 2 +#define e0m0x0_opcode_0xAB_cycles 4 +#define e0m0x0_opcode_0xAC_cycles 5 +#define e0m0x0_opcode_0xAD_cycles 5 +#define e0m0x0_opcode_0xAE_cycles 5 +#define e0m0x0_opcode_0xAF_cycles 6 +#define e0m0x0_opcode_0xB0_cycles 2 +#define e0m0x0_opcode_0xB1_cycles 7 +#define e0m0x0_opcode_0xB2_cycles 6 +#define e0m0x0_opcode_0xB3_cycles 8 +#define e0m0x0_opcode_0xB4_cycles 5 +#define e0m0x0_opcode_0xB5_cycles 5 +#define e0m0x0_opcode_0xB6_cycles 5 +#define e0m0x0_opcode_0xB7_cycles 7 +#define e0m0x0_opcode_0xB8_cycles 2 +#define e0m0x0_opcode_0xB9_cycles 6 +#define e0m0x0_opcode_0xBA_cycles 2 +#define e0m0x0_opcode_0xBB_cycles 2 +#define e0m0x0_opcode_0xBC_cycles 5 +#define e0m0x0_opcode_0xBD_cycles 6 +#define e0m0x0_opcode_0xBE_cycles 5 +#define e0m0x0_opcode_0xBF_cycles 6 +#define e0m0x0_opcode_0xC0_cycles 3 +#define e0m0x0_opcode_0xC1_cycles 7 +#define e0m0x0_opcode_0xC2_cycles 3 +#define e0m0x0_opcode_0xC3_cycles 5 +#define e0m0x0_opcode_0xC4_cycles 4 +#define e0m0x0_opcode_0xC5_cycles 4 +#define e0m0x0_opcode_0xC6_cycles 7 +#define e0m0x0_opcode_0xC7_cycles 7 +#define e0m0x0_opcode_0xC8_cycles 2 +#define e0m0x0_opcode_0xC9_cycles 3 +#define e0m0x0_opcode_0xCA_cycles 2 +#define e0m0x0_opcode_0xCB_cycles 3 +#define e0m0x0_opcode_0xCC_cycles 5 +#define e0m0x0_opcode_0xCD_cycles 5 +#define e0m0x0_opcode_0xCE_cycles 8 +#define e0m0x0_opcode_0xCF_cycles 6 +#define e0m0x0_opcode_0xD0_cycles 2 +#define e0m0x0_opcode_0xD1_cycles 7 +#define e0m0x0_opcode_0xD2_cycles 6 +#define e0m0x0_opcode_0xD3_cycles 8 +#define e0m0x0_opcode_0xD4_cycles 6 +#define e0m0x0_opcode_0xD5_cycles 5 +#define e0m0x0_opcode_0xD6_cycles 8 +#define e0m0x0_opcode_0xD7_cycles 7 +#define e0m0x0_opcode_0xD8_cycles 2 +#define e0m0x0_opcode_0xD9_cycles 6 +#define e0m0x0_opcode_0xDA_cycles 4 +#define e0m0x0_opcode_0xDB_cycles 3 +#define e0m0x0_opcode_0xDC_cycles 6 +#define e0m0x0_opcode_0xDD_cycles 6 +#define e0m0x0_opcode_0xDE_cycles 9 +#define e0m0x0_opcode_0xDF_cycles 6 +#define e0m0x0_opcode_0xE0_cycles 3 +#define e0m0x0_opcode_0xE1_cycles 7 +#define e0m0x0_opcode_0xE2_cycles 3 +#define e0m0x0_opcode_0xE3_cycles 5 +#define e0m0x0_opcode_0xE4_cycles 4 +#define e0m0x0_opcode_0xE5_cycles 4 +#define e0m0x0_opcode_0xE6_cycles 7 +#define e0m0x0_opcode_0xE7_cycles 7 +#define e0m0x0_opcode_0xE8_cycles 2 +#define e0m0x0_opcode_0xE9_cycles 3 +#define e0m0x0_opcode_0xEA_cycles 2 +#define e0m0x0_opcode_0xEB_cycles 3 +#define e0m0x0_opcode_0xEC_cycles 5 +#define e0m0x0_opcode_0xED_cycles 5 +#define e0m0x0_opcode_0xEE_cycles 8 +#define e0m0x0_opcode_0xEF_cycles 6 +#define e0m0x0_opcode_0xF0_cycles 2 +#define e0m0x0_opcode_0xF1_cycles 7 +#define e0m0x0_opcode_0xF2_cycles 6 +#define e0m0x0_opcode_0xF3_cycles 8 +#define e0m0x0_opcode_0xF4_cycles 5 +#define e0m0x0_opcode_0xF5_cycles 5 +#define e0m0x0_opcode_0xF6_cycles 8 +#define e0m0x0_opcode_0xF7_cycles 7 +#define e0m0x0_opcode_0xF8_cycles 2 +#define e0m0x0_opcode_0xF9_cycles 6 +#define e0m0x0_opcode_0xFA_cycles 5 +#define e0m0x0_opcode_0xFB_cycles 2 +#define e0m0x0_opcode_0xFC_cycles 6 +#define e0m0x0_opcode_0xFD_cycles 6 +#define e0m0x0_opcode_0xFE_cycles 9 +#define e0m0x0_opcode_0xFF_cycles 6 +#define e0m0x0_reset_cycles 0 +#define e0m0x0_abort_cycles 0 +#define e0m0x0_nmi_cycles 0 +#define e0m0x0_irq_cycles 0 +#define e1m1x1_opcode_0x00_cycles 8 +#define e1m1x1_opcode_0x01_cycles 6 +#define e1m1x1_opcode_0x02_cycles 8 +#define e1m1x1_opcode_0x03_cycles 4 +#define e1m1x1_opcode_0x04_cycles 5 +#define e1m1x1_opcode_0x05_cycles 3 +#define e1m1x1_opcode_0x06_cycles 5 +#define e1m1x1_opcode_0x07_cycles 6 +#define e1m1x1_opcode_0x08_cycles 3 +#define e1m1x1_opcode_0x09_cycles 2 +#define e1m1x1_opcode_0x0A_cycles 2 +#define e1m1x1_opcode_0x0B_cycles 4 +#define e1m1x1_opcode_0x0C_cycles 6 +#define e1m1x1_opcode_0x0D_cycles 4 +#define e1m1x1_opcode_0x0E_cycles 6 +#define e1m1x1_opcode_0x0F_cycles 5 +#define e1m1x1_opcode_0x10_cycles 2 +#define e1m1x1_opcode_0x11_cycles 5 +#define e1m1x1_opcode_0x12_cycles 5 +#define e1m1x1_opcode_0x13_cycles 7 +#define e1m1x1_opcode_0x14_cycles 5 +#define e1m1x1_opcode_0x15_cycles 4 +#define e1m1x1_opcode_0x16_cycles 6 +#define e1m1x1_opcode_0x17_cycles 6 +#define e1m1x1_opcode_0x18_cycles 2 +#define e1m1x1_opcode_0x19_cycles 4 +#define e1m1x1_opcode_0x1A_cycles 2 +#define e1m1x1_opcode_0x1B_cycles 2 +#define e1m1x1_opcode_0x1C_cycles 6 +#define e1m1x1_opcode_0x1D_cycles 4 +#define e1m1x1_opcode_0x1E_cycles 7 +#define e1m1x1_opcode_0x1F_cycles 5 +#define e1m1x1_opcode_0x20_cycles 6 +#define e1m1x1_opcode_0x21_cycles 6 +#define e1m1x1_opcode_0x22_cycles 8 +#define e1m1x1_opcode_0x23_cycles 4 +#define e1m1x1_opcode_0x24_cycles 3 +#define e1m1x1_opcode_0x25_cycles 3 +#define e1m1x1_opcode_0x26_cycles 5 +#define e1m1x1_opcode_0x27_cycles 6 +#define e1m1x1_opcode_0x28_cycles 4 +#define e1m1x1_opcode_0x29_cycles 2 +#define e1m1x1_opcode_0x2A_cycles 2 +#define e1m1x1_opcode_0x2B_cycles 5 +#define e1m1x1_opcode_0x2C_cycles 4 +#define e1m1x1_opcode_0x2D_cycles 4 +#define e1m1x1_opcode_0x2E_cycles 6 +#define e1m1x1_opcode_0x2F_cycles 5 +#define e1m1x1_opcode_0x30_cycles 2 +#define e1m1x1_opcode_0x31_cycles 5 +#define e1m1x1_opcode_0x32_cycles 5 +#define e1m1x1_opcode_0x33_cycles 7 +#define e1m1x1_opcode_0x34_cycles 4 +#define e1m1x1_opcode_0x35_cycles 4 +#define e1m1x1_opcode_0x36_cycles 6 +#define e1m1x1_opcode_0x37_cycles 6 +#define e1m1x1_opcode_0x38_cycles 2 +#define e1m1x1_opcode_0x39_cycles 4 +#define e1m1x1_opcode_0x3A_cycles 2 +#define e1m1x1_opcode_0x3B_cycles 2 +#define e1m1x1_opcode_0x3C_cycles 4 +#define e1m1x1_opcode_0x3D_cycles 4 +#define e1m1x1_opcode_0x3E_cycles 7 +#define e1m1x1_opcode_0x3F_cycles 5 +#define e1m1x1_opcode_0x40_cycles 7 +#define e1m1x1_opcode_0x41_cycles 6 +#define e1m1x1_opcode_0x42_cycles 2 +#define e1m1x1_opcode_0x43_cycles 4 +#define e1m1x1_opcode_0x44_cycles 0 +#define e1m1x1_opcode_0x45_cycles 3 +#define e1m1x1_opcode_0x46_cycles 5 +#define e1m1x1_opcode_0x47_cycles 6 +#define e1m1x1_opcode_0x48_cycles 3 +#define e1m1x1_opcode_0x49_cycles 2 +#define e1m1x1_opcode_0x4A_cycles 2 +#define e1m1x1_opcode_0x4B_cycles 3 +#define e1m1x1_opcode_0x4C_cycles 3 +#define e1m1x1_opcode_0x4D_cycles 4 +#define e1m1x1_opcode_0x4E_cycles 6 +#define e1m1x1_opcode_0x4F_cycles 5 +#define e1m1x1_opcode_0x50_cycles 2 +#define e1m1x1_opcode_0x51_cycles 5 +#define e1m1x1_opcode_0x52_cycles 5 +#define e1m1x1_opcode_0x53_cycles 7 +#define e1m1x1_opcode_0x54_cycles 7 +#define e1m1x1_opcode_0x55_cycles 4 +#define e1m1x1_opcode_0x56_cycles 6 +#define e1m1x1_opcode_0x57_cycles 6 +#define e1m1x1_opcode_0x58_cycles 2 +#define e1m1x1_opcode_0x59_cycles 4 +#define e1m1x1_opcode_0x5A_cycles 3 +#define e1m1x1_opcode_0x5B_cycles 2 +#define e1m1x1_opcode_0x5C_cycles 4 +#define e1m1x1_opcode_0x5D_cycles 4 +#define e1m1x1_opcode_0x5E_cycles 7 +#define e1m1x1_opcode_0x5F_cycles 5 +#define e1m1x1_opcode_0x60_cycles 6 +#define e1m1x1_opcode_0x61_cycles 6 +#define e1m1x1_opcode_0x62_cycles 6 +#define e1m1x1_opcode_0x63_cycles 4 +#define e1m1x1_opcode_0x64_cycles 3 +#define e1m1x1_opcode_0x65_cycles 3 +#define e1m1x1_opcode_0x66_cycles 5 +#define e1m1x1_opcode_0x67_cycles 6 +#define e1m1x1_opcode_0x68_cycles 4 +#define e1m1x1_opcode_0x69_cycles 2 +#define e1m1x1_opcode_0x6A_cycles 2 +#define e1m1x1_opcode_0x6B_cycles 6 +#define e1m1x1_opcode_0x6C_cycles 5 +#define e1m1x1_opcode_0x6D_cycles 4 +#define e1m1x1_opcode_0x6E_cycles 6 +#define e1m1x1_opcode_0x6F_cycles 5 +#define e1m1x1_opcode_0x70_cycles 2 +#define e1m1x1_opcode_0x71_cycles 5 +#define e1m1x1_opcode_0x72_cycles 5 +#define e1m1x1_opcode_0x73_cycles 7 +#define e1m1x1_opcode_0x74_cycles 4 +#define e1m1x1_opcode_0x75_cycles 4 +#define e1m1x1_opcode_0x76_cycles 6 +#define e1m1x1_opcode_0x77_cycles 6 +#define e1m1x1_opcode_0x78_cycles 2 +#define e1m1x1_opcode_0x79_cycles 4 +#define e1m1x1_opcode_0x7A_cycles 4 +#define e1m1x1_opcode_0x7B_cycles 2 +#define e1m1x1_opcode_0x7C_cycles 6 +#define e1m1x1_opcode_0x7D_cycles 4 +#define e1m1x1_opcode_0x7E_cycles 7 +#define e1m1x1_opcode_0x7F_cycles 5 +#define e1m1x1_opcode_0x80_cycles 2 +#define e1m1x1_opcode_0x81_cycles 6 +#define e1m1x1_opcode_0x82_cycles 3 +#define e1m1x1_opcode_0x83_cycles 4 +#define e1m1x1_opcode_0x84_cycles 3 +#define e1m1x1_opcode_0x85_cycles 3 +#define e1m1x1_opcode_0x86_cycles 3 +#define e1m1x1_opcode_0x87_cycles 6 +#define e1m1x1_opcode_0x88_cycles 2 +#define e1m1x1_opcode_0x89_cycles 2 +#define e1m1x1_opcode_0x8A_cycles 2 +#define e1m1x1_opcode_0x8B_cycles 3 +#define e1m1x1_opcode_0x8C_cycles 4 +#define e1m1x1_opcode_0x8D_cycles 4 +#define e1m1x1_opcode_0x8E_cycles 4 +#define e1m1x1_opcode_0x8F_cycles 5 +#define e1m1x1_opcode_0x90_cycles 2 +#define e1m1x1_opcode_0x91_cycles 5 +#define e1m1x1_opcode_0x92_cycles 5 +#define e1m1x1_opcode_0x93_cycles 7 +#define e1m1x1_opcode_0x94_cycles 4 +#define e1m1x1_opcode_0x95_cycles 4 +#define e1m1x1_opcode_0x96_cycles 4 +#define e1m1x1_opcode_0x97_cycles 6 +#define e1m1x1_opcode_0x98_cycles 2 +#define e1m1x1_opcode_0x99_cycles 4 +#define e1m1x1_opcode_0x9A_cycles 2 +#define e1m1x1_opcode_0x9B_cycles 2 +#define e1m1x1_opcode_0x9C_cycles 4 +#define e1m1x1_opcode_0x9D_cycles 4 +#define e1m1x1_opcode_0x9E_cycles 4 +#define e1m1x1_opcode_0x9F_cycles 5 +#define e1m1x1_opcode_0xA0_cycles 2 +#define e1m1x1_opcode_0xA1_cycles 6 +#define e1m1x1_opcode_0xA2_cycles 2 +#define e1m1x1_opcode_0xA3_cycles 4 +#define e1m1x1_opcode_0xA4_cycles 3 +#define e1m1x1_opcode_0xA5_cycles 3 +#define e1m1x1_opcode_0xA6_cycles 3 +#define e1m1x1_opcode_0xA7_cycles 6 +#define e1m1x1_opcode_0xA8_cycles 2 +#define e1m1x1_opcode_0xA9_cycles 2 +#define e1m1x1_opcode_0xAA_cycles 2 +#define e1m1x1_opcode_0xAB_cycles 4 +#define e1m1x1_opcode_0xAC_cycles 4 +#define e1m1x1_opcode_0xAD_cycles 4 +#define e1m1x1_opcode_0xAE_cycles 4 +#define e1m1x1_opcode_0xAF_cycles 5 +#define e1m1x1_opcode_0xB0_cycles 2 +#define e1m1x1_opcode_0xB1_cycles 5 +#define e1m1x1_opcode_0xB2_cycles 5 +#define e1m1x1_opcode_0xB3_cycles 7 +#define e1m1x1_opcode_0xB4_cycles 4 +#define e1m1x1_opcode_0xB5_cycles 4 +#define e1m1x1_opcode_0xB6_cycles 4 +#define e1m1x1_opcode_0xB7_cycles 6 +#define e1m1x1_opcode_0xB8_cycles 2 +#define e1m1x1_opcode_0xB9_cycles 4 +#define e1m1x1_opcode_0xBA_cycles 2 +#define e1m1x1_opcode_0xBB_cycles 2 +#define e1m1x1_opcode_0xBC_cycles 4 +#define e1m1x1_opcode_0xBD_cycles 4 +#define e1m1x1_opcode_0xBE_cycles 4 +#define e1m1x1_opcode_0xBF_cycles 5 +#define e1m1x1_opcode_0xC0_cycles 2 +#define e1m1x1_opcode_0xC1_cycles 6 +#define e1m1x1_opcode_0xC2_cycles 3 +#define e1m1x1_opcode_0xC3_cycles 4 +#define e1m1x1_opcode_0xC4_cycles 3 +#define e1m1x1_opcode_0xC5_cycles 3 +#define e1m1x1_opcode_0xC6_cycles 5 +#define e1m1x1_opcode_0xC7_cycles 6 +#define e1m1x1_opcode_0xC8_cycles 2 +#define e1m1x1_opcode_0xC9_cycles 2 +#define e1m1x1_opcode_0xCA_cycles 2 +#define e1m1x1_opcode_0xCB_cycles 3 +#define e1m1x1_opcode_0xCC_cycles 4 +#define e1m1x1_opcode_0xCD_cycles 4 +#define e1m1x1_opcode_0xCE_cycles 6 +#define e1m1x1_opcode_0xCF_cycles 5 +#define e1m1x1_opcode_0xD0_cycles 2 +#define e1m1x1_opcode_0xD1_cycles 5 +#define e1m1x1_opcode_0xD2_cycles 5 +#define e1m1x1_opcode_0xD3_cycles 7 +#define e1m1x1_opcode_0xD4_cycles 6 +#define e1m1x1_opcode_0xD5_cycles 4 +#define e1m1x1_opcode_0xD6_cycles 6 +#define e1m1x1_opcode_0xD7_cycles 6 +#define e1m1x1_opcode_0xD8_cycles 2 +#define e1m1x1_opcode_0xD9_cycles 4 +#define e1m1x1_opcode_0xDA_cycles 3 +#define e1m1x1_opcode_0xDB_cycles 3 +#define e1m1x1_opcode_0xDC_cycles 6 +#define e1m1x1_opcode_0xDD_cycles 4 +#define e1m1x1_opcode_0xDE_cycles 7 +#define e1m1x1_opcode_0xDF_cycles 5 +#define e1m1x1_opcode_0xE0_cycles 2 +#define e1m1x1_opcode_0xE1_cycles 6 +#define e1m1x1_opcode_0xE2_cycles 3 +#define e1m1x1_opcode_0xE3_cycles 4 +#define e1m1x1_opcode_0xE4_cycles 3 +#define e1m1x1_opcode_0xE5_cycles 3 +#define e1m1x1_opcode_0xE6_cycles 5 +#define e1m1x1_opcode_0xE7_cycles 6 +#define e1m1x1_opcode_0xE8_cycles 2 +#define e1m1x1_opcode_0xE9_cycles 2 +#define e1m1x1_opcode_0xEA_cycles 2 +#define e1m1x1_opcode_0xEB_cycles 3 +#define e1m1x1_opcode_0xEC_cycles 4 +#define e1m1x1_opcode_0xED_cycles 4 +#define e1m1x1_opcode_0xEE_cycles 6 +#define e1m1x1_opcode_0xEF_cycles 5 +#define e1m1x1_opcode_0xF0_cycles 2 +#define e1m1x1_opcode_0xF1_cycles 5 +#define e1m1x1_opcode_0xF2_cycles 5 +#define e1m1x1_opcode_0xF3_cycles 7 +#define e1m1x1_opcode_0xF4_cycles 5 +#define e1m1x1_opcode_0xF5_cycles 4 +#define e1m1x1_opcode_0xF6_cycles 6 +#define e1m1x1_opcode_0xF7_cycles 6 +#define e1m1x1_opcode_0xF8_cycles 2 +#define e1m1x1_opcode_0xF9_cycles 4 +#define e1m1x1_opcode_0xFA_cycles 4 +#define e1m1x1_opcode_0xFB_cycles 2 +#define e1m1x1_opcode_0xFC_cycles 6 +#define e1m1x1_opcode_0xFD_cycles 4 +#define e1m1x1_opcode_0xFE_cycles 7 +#define e1m1x1_opcode_0xFF_cycles 5 +#define e1m1x1_reset_cycles 0 +#define e1m1x1_abort_cycles 0 +#define e1m1x1_nmi_cycles 0 +#define e1m1x1_irq_cycles 0 + +// new +#define e0m1x1_irne64_cycles 0 +#define e0m1x0_irne64_cycles 0 +#define e0m0x1_irne64_cycles 0 +#define e0m0x0_irne64_cycles 0 +#define e1m1x1_irne64_cycles 0 +#define e0m1x1_irqt5_cycles 0 +#define e0m1x0_irqt5_cycles 0 +#define e0m0x1_irqt5_cycles 0 +#define e0m0x0_irqt5_cycles 0 +#define e1m1x1_irqt5_cycles 0 diff --git a/src/debugger.c b/src/debugger.c new file mode 100644 index 0000000..86922fe --- /dev/null +++ b/src/debugger.c @@ -0,0 +1,320 @@ +/* + * lib65816/debugger.c Release 1p1 + * Copyright (C) 2006 by Samuel A. Falvo II + * See LICENSE for more details. + * + * 2007 Jan 5 saf2 + * Complete rewrite as the old "debugger" (really a tracer) was just rife + * with bugs and utterly lacking in suitable features. + */ + +#include "config.h" + +#ifdef DEBUG + +#include "cpu.h" +#include + +#include "cpumicro.h" + +/* 65816 debugger module */ + +char *mnemonics[256] = { +"BRK", "ORA", "COP", "ORA", "TSB", "ORA", "ASL", "ORA", +"PHP", "ORA", "ASL", "PHD", "TSB", "ORA", "ASL", "ORA", +"BPL", "ORA", "ORA", "ORA", "TRB", "ORA", "ASL", "ORA", +"CLC", "ORA", "INC", "TCS", "TRB", "ORA", "ASL", "ORA", +"JSR", "AND", "JSL", "AND", "BIT", "AND", "ROL", "AND", +"PLP", "AND", "ROL", "PLD", "BIT", "AND", "ROL", "AND", +"BMI", "AND", "AND", "AND", "BIT", "AND", "ROL", "AND", +"SEC", "AND", "DEC", "TSC", "BIT", "AND", "ROL", "AND", +"RTI", "EOR", "WDM", "EOR", "MVP", "EOR", "LSR", "EOR", +"PHA", "EOR", "LSR", "PHK", "JMP", "EOR", "LSR", "EOR", +"BVC", "EOR", "EOR", "EOR", "MVN", "EOR", "LSR", "EOR", +"CLI", "EOR", "PHY", "TCD", "JMP", "EOR", "LSR", "EOR", +"RTS", "ADC", "PER", "ADC", "STZ", "ADC", "ROR", "ADC", +"PLA", "ADC", "ROR", "RTL", "JMP", "ADC", "ROR", "ADC", +"BVS", "ADC", "ADC", "ADC", "STZ", "ADC", "ROR", "ADC", +"SEI", "ADC", "PLY", "TDC", "JMP", "ADC", "ROR", "ADC", +"BRA", "STA", "BRL", "STA", "STY", "STA", "STX", "STA", +"DEY", "BIT", "TXA", "PHB", "STY", "STA", "STX", "STA", +"BCC", "STA", "STA", "STA", "STY", "STA", "STX", "STA", +"TYA", "STA", "TXS", "TXY", "STZ", "STA", "STZ", "STA", +"LDY", "LDA", "LDX", "LDA", "LDY", "LDA", "LDX", "LDA", +"TAY", "LDA", "TAX", "PLB", "LDY", "LDA", "LDX", "LDA", +"BCS", "LDA", "LDA", "LDA", "LDY", "LDA", "LDX", "LDA", +"CLV", "LDA", "TSX", "TYX", "LDY", "LDA", "LDX", "LDA", +"CPY", "CMP", "REP", "CMP", "CPY", "CMP", "DEC", "CMP", +"INY", "CMP", "DEX", "WAI", "CPY", "CMP", "DEC", "CMP", +"BNE", "CMP", "CMP", "CMP", "PEI", "CMP", "DEC", "CMP", +"CLD", "CMP", "PHX", "STP", "JML", "CMP", "DEC", "CMP", +"CPX", "SBC", "SEP", "SBC", "CPX", "SBC", "INC", "SBC", +"INX", "SBC", "NOP", "XBA", "CPX", "SBC", "INC", "SBC", +"BEQ", "SBC", "SBC", "SBC", "PEA", "SBC", "INC", "SBC", +"SED", "SBC", "PLX", "XCE", "JSR", "SBC", "INC", "SBC" +}; + +enum modes { + IMM8, + IMM, + IMMX, + ACC, + PCR, + PCRL, + IMPL, + DP, + DPX, + DPY, + DPI, + DPIX, + DPIY, + DPIL, + DPILY, + ABS, + ABSX, + ABSY, + ABSL, + ABSLX, + STK, + STKIY, + ABSI, + ABSIX, + BLK +}; + +int addrmodes[256] = { + IMM8, DPIX, IMM8, STK, DP, DP, DP, DPIL, + IMPL, IMM, ACC, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, DP, DPX, DPX, DPILY, + IMPL, ABSY, ACC, IMPL, ABS, ABSX, ABSX, ABSLX, + ABS, DPIX, ABSL, STK, DP, DP, DP, DPIL, + IMPL, IMM, ACC, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, DPX, DPX, DPX, DPILY, + IMPL, ABSY, ACC, IMPL, ABSX, ABSX, ABSX, ABSLX, + + IMPL, DPIX, IMM8, STK, BLK, DP, DP, DPIL, + IMPL, IMM, ACC, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, BLK, DPX, DPX, DPILY, + IMPL, ABSY, IMPL, IMPL, ABSL, ABSX, ABSX, ABSX, + IMPL, DPIX, IMPL, STK, DP, DP, DP, DPIL, + IMPL, IMM, ACC, IMPL, ABSI, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, DPX, DPX, DPX, DPILY, + IMPL, ABSY, IMPL, IMPL, ABSIX, ABSX, ABSX, ABSLX, + + + PCR, DPIX, PCRL, STK, DP, DP, DP, DPIL, + IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, DPX, DPX, DPX, DPILY, + IMPL, ABSY, IMPL, IMPL, ABS, ABSX, ABSX, ABSLX, + IMMX, DPIX, IMMX, STK, DP, DP, DP, DPIL, + IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, DPX, DPX, DPY, DPILY, + IMPL, ABSY, IMPL, IMPL, ABSX, ABSX, ABSY, ABSLX, + + IMMX, DPIX, IMM8, STK, DP, DP, DP, DPIL, + IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, DPI, DPX, DPX, DPILY, + IMPL, ABSY, IMPL, IMPL, ABSI, ABSX, ABSX, ABSLX, + IMMX, DPIX, IMM8, STK, DP, DP, DP, DPIL, + IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL, + PCR, DPIY, DPI, STKIY, ABS, DPX, DPX, DPILY, + IMPL, ABSY, IMPL, IMPL, ABSIX, ABSX, ABSX, ABSLX +}; + +extern int cpu_irq; + +void CPU_debug(void) { + int opcode; + int mode; + int operand; + int ea; + char operands[40]; + + opcode = M_READ(PC.A); + mode = addrmodes[opcode]; + printf("A=%04X X=%04X Y=%04X S=%04X D=%04X B=%02X P=%02X E=%1d ", + (int) A.W, (int) X.W, + (int) Y.W, (int) S.W, + (int) D.W, (int) DB, + (int) P, (int) E); + printf("%02X/%04X %s ",(int) PC.B.PB,(int) PC.W.PC,mnemonics[opcode]); + switch (mode) { + case IMM8: + sprintf( operands, "#$%02X", M_READ(PC.A+1) ); + break; + + case IMM: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + if( F_getM ) sprintf( operands, "#$%02X", (operand & 0xFF)); + else sprintf( operands, "#$%04X", operand ); + break; + + case IMMX: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + if( F_getX ) sprintf( operands, "#$%02X", (operand & 0xFF)); + else sprintf( operands, "#$%04X", operand ); + break; + + case ACC: + sprintf( operands, "A" ); + break; + + case PCR: + operand = M_READ(PC.A+1); + sprintf( operands, "$%02X ($%02X%04X)", operand, PC.B.PB, PC.W.PC + operand + 2); + break; + + case PCRL: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + sprintf( operands, "$%02X ($%02X%04X)", operand, PC.B.PB, PC.W.PC + operand + 3); + break; + + case IMPL: + sprintf( operands, "" ); + break; + + case DP: + operand = M_READ(PC.A+1); + ea = D.W + operand; + sprintf( operands, "$%02X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPX: + operand = M_READ(PC.A+1); + if( F_getX ) ea = D.W + operand + X.B.L; + else ea = D.W + operand + X.W; + sprintf( operands, "$%02X,X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPY: + operand = M_READ(PC.A+1); + if( F_getX ) ea = D.W + operand + Y.B.L; + else ea = D.W + operand + Y.W; + sprintf( operands, "$%02X,Y (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPI: + operand = M_READ(PC.A+1); + ea = D.W + operand; + ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16); + sprintf( operands, "($%02X) (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPIX: + operand = M_READ(PC.A+1); + if( F_getX ) ea = D.W + operand + X.B.L; + else ea = D.W + operand + X.W; + ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16); + sprintf( operands, "($%02X,X) (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPIY: + operand = M_READ(PC.A+1); + ea = D.W + operand; + if( F_getX ) ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16) + Y.B.L; + else ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16) + Y.W; + sprintf( operands, "($%02X),Y (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPIL: + operand = M_READ(PC.A+1); + ea = D.W + operand; + ea = M_READ(ea) | (M_READ(ea+1)<<8) | (M_READ(ea+2)<<16); + sprintf( operands, "[$%02X] (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case DPILY: + operand = M_READ(PC.A+1); + ea = D.W + operand; + if( F_getX ) ea = M_READ(ea) | (M_READ(ea+1)<<8) | (M_READ(ea+2)<<16) + Y.B.L; + else ea = M_READ(ea) | (M_READ(ea+1)<<8) | (M_READ(ea+2)<<16) + Y.W; + sprintf( operands, "[$%02X],Y (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABS: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + ea = operand + (DB<<16); + sprintf( operands, "$%04X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABSX: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + if( F_getX ) ea = operand + (DB<<16) + X.B.L; + else ea = operand + (DB<<16) + X.W; + sprintf( operands, "$%04X,X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABSY: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + if( F_getX ) ea = operand + (DB<<16) + Y.B.L; + else ea = operand + (DB<<16) + Y.W; + sprintf( operands, "$%04X,Y (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABSL: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8) | (M_READ(PC.A+3)<<16); + ea = operand; + sprintf( operands, "$%06X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABSLX: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8) | (M_READ(PC.A+3)<<16); + if( F_getX ) ea = operand + X.B.L; + else ea = operand + X.W; + sprintf( operands, "$%06X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABSI: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + ea = M_READ(operand) + (M_READ(operand+1)<<8) + (DB<<16); + sprintf( operands, "$%04X (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case ABSIX: + operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8); + ea = operand | (PC.B.PB << 16); + ea = M_READ(ea) + (M_READ(ea+1)<<8) + (PC.B.PB<<16); + sprintf( operands, "($%04X,X) (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case STK: + operand = M_READ(PC.A+1); + ea = operand + S.W; + sprintf( operands, "$%02X,S (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case STKIY: + operand = M_READ(PC.A+1); + ea = operand + S.W; + if( F_getX ) ea = M_READ(ea) + (M_READ(ea+1)<<8) + (DB<<16) + Y.B.L; + else ea = M_READ(ea) + (M_READ(ea+1)<<8) + (DB<<16) + Y.W; + + sprintf( operands, "$%02X,S (@%06X %02X %02X %02X ...)", + operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) ); + break; + + case BLK: + sprintf( operands, "$%02X, $%02X", M_READ(PC.A+2), M_READ(PC.A+1) ); + break; + } + printf( "%s\n", operands ); + fflush(stdout); +} + +#endif diff --git a/src/dispatch.c b/src/dispatch.c new file mode 100644 index 0000000..60efab5 --- /dev/null +++ b/src/dispatch.c @@ -0,0 +1,277 @@ +/* + * lib65816/dispatch.c Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (dispatch.c) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +#define CPU_DISPATCH + +#include "cpu.h" +#include "cpumicro.h" +#include "util.h" + +//#define LIMIT_INSTRUCTION_COUNT 10000 + +//void CPUEvent_elapse( word32 cycles ); + +int dispatch_quit = 0; + +dualw A; /* Accumulator */ +dualw D; /* Direct Page Register */ +byte P; /* Processor Status Register */ +int E; /* Emulation Mode Flag */ +dualw S; /* Stack Pointer */ +dualw X; /* X Index Register */ +dualw Y; /* Y Index Register */ +byte DB; /* Data Bank Register */ + +union { +#ifdef WORDS_BIGENDIAN + struct { byte Z,PB,H,L; } B; + struct { word16 Z,PC; } W; +#else + struct { byte L,H,PB,Z; } B; + struct { word16 PC,Z; } W; +#endif + word32 A; +} PC; + +duala atmp,opaddr; +dualw wtmp,otmp,operand; +int a1,a2,a3,a4,o1,o2,o3,o4; + +#ifdef OLDCYCLES +byte *cpu_curr_cycle_table; +#endif +void (**cpu_curr_opcode_table)(); + +extern int cpu_reset,cpu_abort,cpu_nmi,cpu_irq,cpu_stop,cpu_wait,cpu_trace; +extern int cpu_update_period; + +extern int cpu_irne64,cpu_irqt5; + +extern void (*cpu_opcode_table[1310])(); + +#ifdef OLDCYCLES +/* Base cycle counts for all possible 1310 opcodes (262 opcodes x 5 modes). */ +/* The opcode handlers may add additional cycles to handle special cases such */ +/* a non-page-aligned direct page register or taking a branch. */ + +byte cpu_cycle_table[1310] = +{ + 8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=0, m=1, x=1 */ + 2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 2, 2, 6, 4, 7, 5, + 6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5, + 2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 2, 2, 4, 4, 7, 5, + 7, 6, 2, 4, 7, 3, 5, 6, 3, 2, 2, 3, 3, 4, 6, 5, + 2, 5, 5, 7, 7, 4, 6, 6, 2, 4, 3, 2, 4, 4, 7, 5, + 6, 6, 6, 4, 3, 3, 5, 6, 4, 2, 2, 6, 5, 4, 6, 5, + 2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5, + 2, 6, 3, 4, 3, 3, 3, 6, 2, 2, 2, 3, 4, 4, 4, 5, + 2, 6, 5, 7, 4, 4, 4, 6, 2, 5, 2, 2, 4, 5, 5, 5, + 2, 6, 2, 4, 3, 3, 3, 6, 2, 2, 2, 4, 4, 4, 4, 5, + 2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5, + 2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 4, 5, + 2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5, + 2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5, + 2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5, + 0, 0, 0, 0, 0, 0, + + 8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=0, m=1, x=0 */ + 2, 6, 5, 7, 5, 4, 6, 6, 2, 5, 2, 2, 6, 5, 7, 5, + 6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5, + 2, 6, 5, 7, 4, 4, 6, 6, 2, 5, 2, 2, 5, 5, 7, 5, + 7, 6, 2, 4, 0, 3, 5, 6, 4, 2, 2, 3, 3, 4, 6, 5, + 2, 6, 5, 7, 0, 4, 6, 6, 2, 5, 4, 2, 4, 5, 7, 5, + 6, 6, 6, 4, 3, 3, 5, 6, 5, 2, 2, 6, 5, 4, 6, 5, + 2, 6, 5, 7, 4, 4, 6, 6, 2, 5, 5, 2, 6, 5, 7, 5, + 2, 6, 3, 4, 4, 3, 4, 6, 2, 2, 2, 3, 5, 4, 5, 5, + 2, 6, 5, 7, 5, 4, 5, 6, 2, 5, 2, 2, 4, 5, 5, 5, + 3, 6, 3, 4, 4, 3, 4, 6, 2, 2, 2, 4, 5, 4, 5, 5, + 2, 6, 5, 7, 5, 4, 5, 6, 2, 5, 2, 2, 5, 5, 5, 5, + 3, 6, 3, 4, 4, 3, 6, 6, 2, 2, 2, 3, 5, 4, 6, 5, + 2, 6, 5, 7, 6, 4, 8, 6, 2, 5, 4, 3, 6, 5, 7, 5, + 3, 6, 3, 4, 4, 3, 6, 6, 2, 2, 2, 3, 5, 4, 6, 5, + 2, 6, 5, 7, 5, 4, 8, 6, 2, 5, 5, 2, 6, 5, 7, 5, + 0, 0, 0, 0, 0, 0, + + 8, 7, 8, 5, 7, 4, 7, 7, 3, 3, 2, 4, 8, 5, 8, 6, /* e=0, m=0, x=1 */ + 2, 6, 6, 8, 7, 5, 8, 7, 2, 5, 2, 2, 8, 5, 9, 6, + 6, 7, 8, 5, 4, 4, 7, 7, 4, 3, 2, 5, 5, 5, 8, 6, + 2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 2, 2, 5, 5, 9, 6, + 7, 7, 2, 5, 0, 4, 7, 7, 4, 3, 2, 3, 3, 5, 8, 6, + 2, 6, 6, 8, 0, 5, 8, 7, 2, 5, 3, 2, 4, 5, 9, 6, + 6, 7, 6, 5, 4, 4, 7, 7, 5, 3, 2, 6, 5, 5, 8, 6, + 2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 4, 2, 6, 5, 9, 6, + 2, 7, 3, 5, 3, 4, 3, 7, 2, 3, 2, 3, 4, 5, 4, 6, + 2, 6, 6, 8, 4, 5, 4, 7, 2, 5, 2, 2, 5, 5, 5, 6, + 2, 7, 2, 5, 3, 4, 3, 7, 2, 3, 2, 4, 4, 5, 4, 6, + 2, 6, 6, 8, 4, 5, 4, 7, 2, 5, 2, 2, 4, 5, 4, 6, + 2, 7, 3, 5, 3, 4, 7, 7, 2, 3, 2, 3, 4, 5, 8, 6, + 2, 6, 6, 8, 6, 5, 8, 7, 2, 5, 3, 3, 6, 5, 9, 6, + 2, 7, 3, 5, 3, 4, 7, 7, 2, 3, 2, 3, 4, 5, 8, 6, + 2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 4, 2, 6, 5, 9, 6, + 0, 0, 0, 0, 0, 0, + + 8, 7, 8, 5, 7, 4, 7, 7, 3, 3, 2, 4, 8, 5, 8, 6, /* e=0, m=0, x=0 */ + 2, 7, 6, 8, 7, 5, 8, 7, 2, 6, 2, 2, 8, 6, 9, 6, + 6, 7, 8, 5, 4, 4, 7, 7, 4, 3, 2, 5, 5, 5, 8, 6, + 2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 2, 2, 6, 6, 9, 6, + 7, 7, 2, 5, 0, 4, 7, 7, 3, 3, 2, 3, 3, 5, 8, 6, + 2, 7, 6, 8, 0, 5, 8, 7, 2, 6, 4, 2, 4, 6, 9, 6, + 6, 7, 6, 5, 4, 4, 7, 7, 4, 3, 2, 6, 5, 5, 8, 6, + 2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 5, 2, 6, 6, 9, 6, + 2, 7, 3, 5, 4, 4, 4, 7, 2, 3, 2, 3, 5, 5, 5, 6, + 2, 7, 6, 8, 5, 5, 5, 7, 2, 6, 2, 2, 5, 6, 6, 6, + 3, 7, 3, 5, 4, 4, 4, 7, 2, 3, 2, 4, 5, 5, 5, 6, + 2, 7, 6, 8, 5, 5, 5, 7, 2, 6, 2, 2, 5, 6, 5, 6, + 3, 7, 3, 5, 4, 4, 7, 7, 2, 3, 2, 3, 5, 5, 8, 6, + 2, 7, 6, 8, 6, 5, 8, 7, 2, 6, 4, 3, 6, 6, 9, 6, + 3, 7, 3, 5, 4, 4, 7, 7, 2, 3, 2, 3, 5, 5, 8, 6, + 2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 5, 2, 6, 6, 9, 6, + 0, 0, 0, 0, 0, 0, + + 8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=1, m=1, x=1 */ + 2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 2, 2, 6, 4, 7, 5, + 6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5, + 2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 2, 2, 4, 4, 7, 5, + 7, 6, 2, 4, 0, 3, 5, 6, 3, 2, 2, 3, 3, 4, 6, 5, + 2, 5, 5, 7, 0, 4, 6, 6, 2, 4, 3, 2, 4, 4, 7, 5, + 6, 6, 6, 4, 3, 3, 5, 6, 4, 2, 2, 6, 5, 4, 6, 5, + 2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5, + 2, 6, 3, 4, 3, 3, 3, 6, 2, 2, 2, 3, 4, 4, 4, 5, + 2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5, + 2, 6, 2, 4, 3, 3, 3, 6, 2, 2, 2, 4, 4, 4, 4, 5, + 2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5, + 2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5, + 2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5, + 2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5, + 2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5, + 0, 0, 0, 0, 0, 0 +}; +#endif + +void CPU_run(void) +{ + word32 last_update,next_update; + int opcode; + +#ifdef LIMIT_INSTRUCTION_COUNT + long instructionCount = 0; +#endif + + cpu_cycle_count = 0; + last_update = 0; + next_update = cpu_update_period; + E = 1; + F_setM(1); + F_setX(1); + CPU_modeSwitch(); + +dispatch: +// CPUEvent_elapse( cpu_cycle_count ); +// cpu_cycle_count = 0; + if (dispatch_quit) + return; + + // TODO remove this. +#ifdef LIMIT_INSTRUCTION_COUNT + instructionCount++; + if (instructionCount > LIMIT_INSTRUCTION_COUNT) + return; +#endif +// #ifdef E_UPDATE + if (cpu_cycle_count >= next_update) goto update; + update_resume: +// #endif + +#ifdef DEBUG + if (cpu_trace) goto debug; +debug_resume: +#endif + if (cpu_reset) goto reset; + if (cpu_stop) goto dispatch; + if (cpu_abort) goto abort; + if (cpu_nmi) goto nmi; + if (cpu_irq) goto irq; + if (cpu_irne64) goto irne64; + if (cpu_irqt5) goto irqt5; +irq_return: + if (cpu_wait) { cpu_cycle_count++; goto dispatch; } + opcode = M_READ_OPCODE(PC.A); + PC.W.PC++; + +#ifdef OLDCYCLES + cpu_cycle_count += cpu_curr_cycle_table[opcode]; +#endif + (**cpu_curr_opcode_table[opcode])(); + + goto dispatch; + +/* Special cases. Since these don't happen a lot more often than they */ +/* do happen, accessing them this way means most of the time the */ +/* generated code is _not_ branching. Only during the special cases do */ +/* we take the branch penalty (if there is one). */ + +// #ifdef E_UPDATE +update: + E_UPDATE(cpu_cycle_count); + last_update = cpu_cycle_count; + next_update = last_update + cpu_update_period; + goto update_resume; +// #endif + +#ifdef DEBUG +debug: + CPU_debug(); + goto debug_resume; +#endif +reset: + (**cpu_curr_opcode_table[256])(); + goto dispatch; +abort: + (**cpu_curr_opcode_table[257])(); + goto dispatch; +nmi: + (**cpu_curr_opcode_table[258])(); + goto dispatch; +irq: + if (P & 0x04) goto irq_return; + (**cpu_curr_opcode_table[259])(); + goto dispatch; +irne64: + if (P & 0x04) goto irq_return; + (**cpu_curr_opcode_table[260])(); + goto dispatch; +irqt5: + if (P & 0x04) goto irq_return; + (**cpu_curr_opcode_table[261])(); + goto dispatch; +} + +/* Recalculate opcode_offset based on the new processor mode */ + +void CPU_modeSwitch(void) { + + int opcode_offset; + + if (E) { + opcode_offset = 1048; + } else { + if (F_getX) { + X.B.H = 0; + Y.B.H = 0; + } + opcode_offset = ((~P >> 4) & 0x03) * 262; + } +#ifdef OLDCYCLES + cpu_curr_cycle_table = cpu_cycle_table + opcode_offset; +#endif + cpu_curr_opcode_table = cpu_opcode_table + opcode_offset; +} diff --git a/src/glue.c b/src/glue.c new file mode 100644 index 0000000..e74e09a --- /dev/null +++ b/src/glue.c @@ -0,0 +1,57 @@ +#include +#include +#include +#include + +// implement these later +void psg_reset(void) { + +} + +void pcm_reset(void) { + +} + +void machine_dump(const char* msg) { + +} + +void machine_reset() { } +void machine_nmi() { } +void machine_paste(const char* text) { } +void machine_toggle_warp() { } +void sdcard_attach() { } +void sdcard_detach() { } +void mouse_button_down(int num) { } +void mouse_button_up(int num) { } +void mouse_move(int x, int y) { } +void mouse_set_wheel(int y) { } +void mouse_send_state() { } +void audio_render() { } +void joystick_add(int index) { } +void joystick_remove(int index) { } +void joystick_button_down(int instance_id, uint8_t button) { } +void joystick_button_up(int instance_id, uint8_t button) { } + +bool grab_mouse = false; +bool warp_mode = false; +bool disable_emu_cmd_keys = false; +bool enable_midline = false; + +bool log_video = false; + +// TODO this needs to be moved to smc.c +uint8_t activity_led = 0; + +uint32_t key_modifiers = 0; +uint32_t key_scancode = 0; + +uint8_t machine_mhz = 8; + +extern bool video_init(int window_scale, float screen_x_scale, char *quality, bool fullscreen, float opacity); +extern bool video_step(float mhz, float steps, bool midline); +extern bool video_update(void); +extern void video_end(void); +extern void video_reset(void); +extern void video_write(uint8_t reg, uint8_t value); +extern uint8_t video_read(uint8_t reg, bool debugOn); diff --git a/src/glue.h b/src/glue.h new file mode 100644 index 0000000..3e950ed --- /dev/null +++ b/src/glue.h @@ -0,0 +1,44 @@ +#ifndef _GLUE_H_ +#define _GLUE_H_ + +#include +#include +#include + +#define WINDOW_TITLE "Vera Window" +#define MOUSE_GRAB_MSG " (Ctrl+M to end mouse/keyboard capture)" +#define MHZ machine_mhz + +extern bool grab_mouse; +extern bool warp_mode; +extern uint8_t activity_led; +extern bool disable_emu_cmd_keys; +extern bool enable_midline; +extern uint8_t machine_mhz; + +extern bool log_video; + +void psg_reset(void); +void pcm_reset(void); +void machine_dump(const char* msg); +void machine_reset(); +void machine_nmi(); +void machine_paste(const char* text); +void machine_toggle_warp(); +void sdcard_attach(); +void sdcard_detach(); +void mouse_button_down(int num); +void mouse_button_up(int num); +void mouse_move(int x, int y); +void mouse_set_wheel(int y); +void mouse_send_state(); + +void audio_render(); +void joystick_add(int index); +void joystick_remove(int index); +void joystick_button_down(int instance_id, uint8_t button); +void joystick_button_up(int instance_id, uint8_t button); + +//extern SDL_Event event; + +#endif \ No newline at end of file diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..9366b16 --- /dev/null +++ b/src/main.c @@ -0,0 +1,185 @@ +#include +#include +#include +#include "cpu.h" +#include "util.h" +#include "video.h" + +//#define DEBUG_READ 1 +//#define DEBUG_WRITE 1 + +extern void handleEvent(SDL_Event *event); +extern int cpu_reset, cpu_abort, cpu_nmi, cpu_irq, cpu_stop, cpu_wait; + +byte *memory = NULL; +word32 runAddress = 0; + +SDL_Event sdl_event; + +void EMUL_hardwareUpdate(word32 timestamp) { + static word32 lastUpdate = 0; + int steps = timestamp - lastUpdate; + + bool newFrame = video_step(8.0, steps, false); + if (newFrame) { + video_update(); + } + + if (SDL_PollEvent(&sdl_event)) { + puts("got an event!"); + handleEvent(&sdl_event); + } + + lastUpdate = timestamp; +} + +void EMUL_handleWDM(byte opcode, word32 timestamp) { + printf("got WDM(%d) @ %u\n", opcode, timestamp); +} + +byte MEM_readMem(word32 address, word32 timestamp, word32 emulFlags) { + if (address >= 0xdf00 && address < 0xdf20) { +#ifdef DEBUG_READ + printf("readMem: address:%06x, offset:%06x\n", address, address); +#endif + return video_read(address - 0xdf00, false); + } + + int offset = 0; + bool outOfRange = false; + + if (address < 0x080000) { + offset = address; + } else if (address > 0xc00000 && address < 0xc80000) { + offset = address - 0xb80000; + } else { + // out of range, just return 0xff. + outOfRange = true; + return 0xff; + } + + byte b = 0xff; + + if (!outOfRange) { + b = *((byte *)(memory + offset)); + } + +#ifdef DEBUG_READ + printf("readMem: address:%06x, offset:%06x, value:%02x\n", address, offset, b); +#endif + + return b; +} + +void MEM_writeMem(word32 address, byte b, word32 timestamp) { + if (address >= 0xdf00 && address < 0xdf20) { + video_write(address - 0xdf00, b); +#ifdef DEBUG_WRITE + printf("writeMem: address:%06x, offset:%06x\n", address, address); +#endif + return; + } + + int offset = 0; + + if (address < 0x080000) { + offset = address; + } else if (address > 0xc00000 && address < 0xc80000) { + offset = address - 0xb80000; + } else { + // out of range, ignore the write. + return; + } + +#ifdef DEBUG_WRITE + printf("writeMem: address:%06x, offset:%06x\n", address, offset); +#endif + + *((byte *) memory + offset) = b; +} + +void initialize() { + puts("initializing memory..."); + memory = (byte *) malloc(0x100000); + if (memory == NULL) { + puts("Couldn't create memory."); + } else { + puts("initializing vera..."); + video_init(2, (float) 1, "best", 0, 1.0); + video_reset(); + } +} + +bool endsWith(const char *source_str, const char *search_str) { + int idx = strlen(source_str) - strlen(search_str); + if (idx > 0) { + const char *tmp = (const char *)(source_str + idx); + if (strncmp(tmp, search_str, strlen(search_str)) == 0) { + return true; + } + } + return false; +} + +int loadBin(const char *filename) { + FILE *file = fopen(filename, "rb"); + if (!file) { + perror("Could not open file."); + return -1; + } + + // 0x80000 because we shift addresses + size_t bytesRead = fread((char *)(memory + 0x80000), 1, 0x80000, file); + if (bytesRead != 0x80000) { + perror("Failed to read the complete file"); + fclose(file); + return -1; + } + + runAddress = 0xc08004; + + puts("this is shifted, so $08:0000 is $c0:0000"); + hexDump(memory, 0x88000, 64); + + return 0; +} + +int main(int argc, char *argv[]) { + bool runOk = true; + if (argc < 2) { + puts("bsx file-to-run.bin"); + return -1; + } + initialize(); + if (endsWith(argv[1], ".bin")) { + if (loadBin(argv[1])) + runOk = false; + } + + if (runOk) { + //CPUEvent_initialize(); + CPU_setUpdatePeriod(1000); + CPU_setTrace(0); + cpu_reset = 0; + cpu_abort = 0; + cpu_nmi = 0; + cpu_irq = 0; + cpu_stop = 0; + cpu_wait = 0; + P = 0x34; + E = 1; + D.W = 0; + DB = 0; + PC.B.PB = (runAddress >> 16); + S.W = 0x01FF; + A.W = 0; + X.W = 0; + Y.W = 0; + PC.B.L = (runAddress & 0xff); + PC.B.H = ((runAddress >> 8) & 0xff); + CPU_modeSwitch(); + CPU_run(); + } + + return 0; +} diff --git a/src/opcodes.h b/src/opcodes.h new file mode 100644 index 0000000..6ae0783 --- /dev/null +++ b/src/opcodes.h @@ -0,0 +1,1842 @@ +/* + * lib65816/opcodes.h Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (opcodes.h) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +#include "cpu.h" +#include "cpumacro.h" +#include "cpumicro.h" +#include "cycles.h" +#include + +#define CPU_65265 + +#ifdef CPU_65265 +#define RESET_VECTOR_LOW 0xFFFC +#define RESET_VECTOR_HIGH 0xFFFD +#define ABORT_VECTOR_LOW 0xFFB8 +#define ABORT_VECTOR_HIGH 0xFFB9 +#define IRQ_VECTOR_LOW 0xFF9E +#define IRQ_VECTOR_HIGH 0xFF9F +#define NMI_VECTOR_LOW 0xFFBA +#define NMI_VECTOR_HIGH 0xFFBB +#define COP_VECTOR_LOW 0xFFB4 +#define COP_VECTOR_HIGH 0xFFB5 +#define BRK_VECTOR_LOW 0xFFB6 +#define BRK_VECTOR_HIGH 0xFFB7 +#define EMU_ABORT_VECTOR_LOW 0xFFF8 +#define EMU_ABORT_VECTOR_HIGH 0xFFF9 +#define EMU_NMI_VECTOR_LOW 0xFFFA +#define EMU_NMI_VECTOR_HIGH 0XFFFB +#define EMU_IRQ_VECTOR_LOW 0xFFDE +#define EMU_IRQ_VECTOR_HIGH 0xFFDF +#define EMU_BRK_VECTOR_LOW 0xFFFE +#define EMU_BRK_VECTOR_HIGH 0xFFFF +#define EMU_COP_VECTOR_LOW 0xFFF4 +#define EMU_COP_VECTOR_HIGH 0xFFF5 +#else +#define RESET_VECTOR_LOW 0xFFFC +#define RESET_VECTOR_HIGH 0xFFFD +#define ABORT_VECTOR_LOW 0xFFE8 +#define ABORT_VECTOR_HIGH 0xFFE9 +#define IRQ_VECTOR_LOW 0xFFEE +#define IRQ_VECTOR_HIGH 0xFFEF +#define NMI_VECTOR_LOW 0xFFEA +#define NMI_VECTOR_HIGH 0XFFEB +#define COP_VECTOR_LOW 0xFFE4 +#define COP_VECTOR_HIGH 0xFFE5 +#define BRK_VECTOR_LOW 0xFFE6 +#define BRK_VECTOR_HIGH 0xFFE7 +#define EMU_ABORT_VECTOR_LOW 0xFFF8 +#define EMU_ABORT_VECTOR_HIGH 0xFFF9 +#define EMU_NMI_VECTOR_LOW 0xFFFA +#define EMU_NMI_VECTOR_HIGH 0XFFFB +#define EMU_IRQ_VECTOR_LOW 0xFFFE +#define EMU_IRQ_VECTOR_HIGH 0xFFFF +#define EMU_BRK_VECTOR_LOW 0xFFFE +#define EMU_BRK_VECTOR_HIGH 0xFFFF +#define EMU_COP_VECTOR_LOW 0xFFF4 +#define EMU_COP_VECTOR_HIGH 0xFFF5 +#endif + +#define IRNE64_VECTOR_LOW 0xFF98 +#define IRNE64_VECTOR_HIGH 0xFF99 +#define IRQT5_VECTOR_LOW 0xFF8A +#define IRQT5_VECTOR_HIGH 0xFF8B +#define EMU_IRNE64_VECTOR_LOW 0xFFD8 +#define EMU_IRNE64_VECTOR_HIGH 0xFFD9 +#define EMU_IRQT5_VECTOR_LOW 0xFFCA +#define EMU_IRQT5_VECTOR_HIGH 0xFFCB + +extern byte opcode; +extern int opcode_offset; +extern duala atmp,opaddr; +extern dualw wtmp,otmp,operand; +extern int a1,a2,a3,a4,o1,o2,o3,o4; + +extern int cpu_reset,cpu_abort,cpu_nmi,cpu_irq,cpu_stop,cpu_wait,cpu_trace; +extern int cpu_update_period; + +#define BEGIN_CPU_FUNC(command) XCPU(CPUMODE,command) +#define XCPU(mode,command) XXCPU(mode,command) +#ifdef OLDCYCLES +#define XXCPU(mode,command) void mode ## _ ## command (void); \ + void mode ## _ ## command (void) { +#else +#define XXCPU(mode,command) void mode ## _ ## command (void); \ + void mode ## _ ## command (void) { \ + cpu_cycle_count += mode ## _ ## command ## _cycles; +#endif + +#define END_CPU_FUNC } + +/* This file contains all 262 of the opcode subroutines */ + +BEGIN_CPU_FUNC(opcode_0x00) /* BRK s */ + PC.W.PC++; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(BRK_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(BRK_VECTOR_HIGH); +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P | 0x30); + F_setD(0); + F_setI(1); + F_setB(0); + DB = 0; + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(EMU_BRK_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_BRK_VECTOR_HIGH); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x01) + O_dxi(opaddr); /* ORA (d,x) */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x02) /* COP s */ + PC.W.PC++; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(COP_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(COP_VECTOR_HIGH); +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH((byte) ((P & ~0x10) | 0x20)); + F_setD(0); + F_setI(1); + DB = 0; + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(EMU_COP_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_COP_VECTOR_HIGH); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x03) + O_sr(opaddr); /* ORA d,s */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x04) + O_d(opaddr); /* TSB d */ + C_TSB(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x05) + O_d(opaddr); /* ORA d */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x06) + O_d(opaddr); /* ASL d */ + C_ASL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x07) + O_dil(opaddr); /* ORA [d] */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x08) +#ifdef NATIVE_MODE + S_PUSH(P); /* PHP s */ +#else + S_PUSH(P | 0x30); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x09) +#ifdef SHORT_M /* ORA # */ + O_i8(operand); + C_ORA8(operand.B.L); +#else + O_i16(operand); + C_ORA16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x0A) +#ifdef SHORT_M /* ASL A */ + C_ASL8(A.B.L); +#else + C_ASL16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x0B) + S_PUSH(D.B.H); /* PHD s */ + S_PUSH(D.B.L); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x0C) + O_a(opaddr); /* TSB a */ + C_TSB(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x0D) + O_a(opaddr); /* ORA a */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x0E) + O_a(opaddr); /* ASL a */ + C_ASL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x0F) + O_al(opaddr); /* ORA al */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x10) + O_pcr(opaddr); /* BPL r */ + if (!F_getN) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x11) + O_dix(opaddr); /* ORA (d),y */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x12) + O_di(opaddr); /* ORA (d) */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x13) + O_srix(opaddr); /* ORA (d,s),y */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x14) + O_d(opaddr); /* TRB d */ + C_TRB(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x15) + O_dxx(opaddr); /* ORA d,x */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x16) + O_dxx(opaddr); /* ASL d,x */ + C_ASL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x17) + O_dixl(opaddr); /* ORA [d],y */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x18) + F_setC(0); /* CLC i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x19) + O_axy(opaddr); /* ORA a,y */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x1A) +#ifdef SHORT_M /* INC A */ + C_INC8(A.B.L); +#else + C_INC16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x1B) +#ifdef NATIVE_MODE /* TCS i */ + S.W = A.W; +#else + S.B.L = A.B.L; +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x1C) + O_a(opaddr); /* TRB a */ + C_TRB(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x1D) + O_axx(opaddr); /* ORA a,x */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x1E) + O_axx(opaddr); /* ASL a,x */ + C_ASL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x1F) + O_alxx(opaddr); /* ORA al,x */ + C_ORA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x20) + O_a(opaddr); /* JSR a */ + PC.W.PC--; + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x21) + O_dxi(opaddr); /* AND (d,x) */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x22) + O_al(opaddr); /* JSL al */ + S_PUSH(PC.B.PB); + PC.W.PC--; + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + PC.A = opaddr.A; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x23) + O_sr(opaddr); /* AND d,s */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x24) + O_d(opaddr); /* BIT d */ + C_BIT(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x25) + O_d(opaddr); /* AND d */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x26) + O_d(opaddr); /* ROL d */ + C_ROL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x27) + O_dil(opaddr); /* AND [d] */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x28) +#ifdef NATIVE_MODE + S_PULL(P); /* PLP s */ +#else + byte tmpP; + S_PULL(tmpP); + P = (tmpP & ~0x30) | (P & 0x30); +#endif + CPU_modeSwitch(); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x29) +#ifdef SHORT_M /* AND # */ + O_i8(operand); + C_AND8(operand.B.L); +#else + O_i16(operand); + C_AND16(operand.W); +#endif +END_CPU_FUNC +BEGIN_CPU_FUNC(opcode_0x2A) +#ifdef SHORT_M /* ROL A */ + C_ROL8(A.B.L); +#else + C_ROL16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x2B) + S_PULL(D.B.L); /* PLD s */ + S_PULL(D.B.H); + C_SETF16(D.W); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x2C) + O_a(opaddr); /* BIT a */ + C_BIT(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x2D) + O_a(opaddr); /* AND a */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x2E) + O_a(opaddr); /* ROL a */ + C_ROL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x2F) + O_al(opaddr); /* AND al */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x30) + O_pcr(opaddr); /* BMI r */ + if (F_getN) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x31) + O_dix(opaddr); /* AND (d),y */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x32) + O_di(opaddr); /* AND (d) */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x33) + O_srix(opaddr); /* AND (d,s),y */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x34) + O_dxx(opaddr); /* BIT d,x */ + C_BIT(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x35) + O_dxx(opaddr); /* AND d,x */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x36) + O_dxx(opaddr); /* ROL d,x */ + C_ROL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x37) + O_dixl(opaddr); /* AND [d],y */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x38) + F_setC(1); /* SEC i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x39) + O_axy(opaddr); /* AND a,y */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x3A) +#ifdef SHORT_M /* DEC A */ + C_DEC8(A.B.L); +#else + C_DEC16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x3B) + C_LDA16(S.W); /* TSC i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x3C) + O_axx(opaddr); /* BIT a,x */ + C_BIT(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x3D) + O_axx(opaddr); /* AND a,x */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x3E) + O_axx(opaddr); /* ROL a,x */ + C_ROL(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x3F) + O_alxx(opaddr); /* AND al,x */ + C_AND(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x40) + S_PULL(P); /* RTI */ + S_PULL(PC.B.L); + S_PULL(PC.B.H); +#ifdef NATIVE_MODE + S_PULL(PC.B.PB); +#else + P |= 0x30; + cpu_cycle_count--; +#endif + CPU_modeSwitch(); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x41) + O_dxi(opaddr); /* EOR (d,x) */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x42) + O_i8(operand); + E_WDM(operand.B.L); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x43) + O_sr(opaddr); /* EOR d,s */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x44) + DB = M_READ(PC.A); /* MVP xyc */ + operand.B.L = M_READ(PC.A+1); + if (A.W != 0xFFFF) { + M_WRITE((DB << 16) | Y.W,M_READ((operand.B.L << 16) | X.W)); + A.W--; + X.W--; + Y.W--; + PC.W.PC--; + } else { + PC.W.PC += 2; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x45) + O_d(opaddr); /* EOR d */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x46) + O_d(opaddr); /* LSR d */ + C_LSR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x47) + O_dil(opaddr); /* EOR [d] */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x48) +#ifdef SHORT_M /* PHA */ + S_PUSH(A.B.L); +#else + S_PUSH(A.B.H); + S_PUSH(A.B.L); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x49) +#ifdef SHORT_M /* EOR # */ + O_i8(operand); + C_EOR8(operand.B.L); +#else + O_i16(operand); + C_EOR16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x4A) +#ifdef SHORT_M /* LSR A */ + C_LSR8(A.B.L); +#else + C_LSR16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x4B) + S_PUSH(PC.B.PB); /* PHK */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x4C) + O_a(opaddr); /* JMP a */ + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x4D) + O_a(opaddr); /* EOR a */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x4E) + O_a(opaddr); /* LSR a */ + C_LSR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x4F) + O_al(opaddr); /* EOR al */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x50) + O_pcr(opaddr); /* BVC r */ + if (!F_getV) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x51) + O_dix(opaddr); /* EOR (d),y */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x52) + O_di(opaddr); /* EOR (d) */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x53) + O_srix(opaddr); /* EOR (d,s),y */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x54) + DB = M_READ(PC.A); /* MVN xyc */ + operand.B.L = M_READ(PC.A+1); + if (A.W != 0xFFFF) { + M_WRITE((DB << 16) | Y.W,M_READ((operand.B.L << 16) | X.W)); + A.W--; + X.W++; + Y.W++; + PC.W.PC--; + } else { + PC.W.PC += 2; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x55) + O_dxx(opaddr); /* EOR d,x */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x56) + O_dxx(opaddr); /* LSR d,x */ + C_LSR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x57) + O_dixl(opaddr); /* EOR [d],y */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x58) + F_setI(0); /* CLI i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x59) + O_axy(opaddr); /* EOR a,y */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x5A) +#ifdef SHORT_X /* PHY s */ + S_PUSH(Y.B.L); +#else + S_PUSH(Y.B.H); + S_PUSH(Y.B.L); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x5B) + D.W = A.W; /* TCD i */ + C_SETF16(D.W); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x5C) + O_al(opaddr); /* JMP al */ + PC.A = opaddr.A; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x5D) + O_axx(opaddr); /* EOR a,x */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x5E) + O_axx(opaddr); /* LSR a,x */ + C_LSR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x5F) + O_alxx(opaddr); /* EOR al,x */ + C_EOR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x60) + S_PULL(PC.B.L); /* RTS s */ + S_PULL(PC.B.H); + PC.W.PC++; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x61) + O_dxi(opaddr); /* ADC (d,x) */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x62) + O_pcrl(opaddr); /* PER s */ + S_PUSH(opaddr.B.H); + S_PUSH(opaddr.B.L); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x63) + O_sr(opaddr); /* ADC d,s */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x64) + O_d(opaddr); /* STZ d */ + C_STZ(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x65) + O_d(opaddr); /* ADC d */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x66) + O_d(opaddr); /* ROR d */ + C_ROR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x67) + O_dil(opaddr); /* ADC [d] */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x68) +#ifdef SHORT_M /* PLA s */ + S_PULL(A.B.L); + C_SETF8(A.B.L); +#else + S_PULL(A.B.L); + S_PULL(A.B.H); + C_SETF16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x69) +#ifdef SHORT_M /* ADC # */ + O_i8(operand); + C_ADC8(operand.B.L); +#else + O_i16(operand); + C_ADC16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x6A) +#ifdef SHORT_M /* ROR A */ + C_ROR8(A.B.L); +#else + C_ROR16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x6B) + S_PULL(PC.B.L); /* RTL s */ + S_PULL(PC.B.H); + S_PULL(PC.B.PB); + PC.W.PC++; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x6C) + O_ai(opaddr); /* JMP (a) */ + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x6D) + O_a(opaddr); /* ADC a */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x6E) + O_a(opaddr); /* ROR a */ + C_ROR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x6F) + O_al(opaddr); /* ADC al */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x70) + O_pcr(opaddr); /* BVS r */ + if (F_getV) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x71) + O_dix(opaddr); /* ADC (d),y */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x72) + O_di(opaddr); /* ADC (d) */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x73) + O_srix(opaddr); /* ADC (d,s),y */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x74) + O_dxx(opaddr); /* STZ d,x */ + C_STZ(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x75) + O_dxx(opaddr); /* ADC d,x */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x76) + O_dxx(opaddr); /* ROR d,x */ + C_ROR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x77) + O_dixl(opaddr); /* ADC [d],y */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x78) + F_setI(1); /* SEI i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x79) + O_axy(opaddr); /* ADC a,y */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x7A) +#ifdef SHORT_X /* PLY */ + S_PULL(Y.B.L); + C_SETF8(Y.B.L); +#else + S_PULL(Y.B.L); + S_PULL(Y.B.H); + C_SETF16(Y.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x7B) + C_LDA16(D.W); /* TDC i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x7C) + O_axi(opaddr); /* JMP (a,x) */ + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x7D) + O_axx(opaddr); /* ADC a,x */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x7E) + O_axx(opaddr); /* ROR a,x */ + C_ROR(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x7F) + O_alxx(opaddr); /* ADC al,x */ + C_ADC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x80) + O_pcr(opaddr); /* BRA r */ +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x81) + O_dxi(opaddr); /* STA (d,x) */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x82) + O_pcrl(opaddr); /* BRL rl */ + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x83) + O_sr(opaddr); /* STA d,s */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x84) + O_d(opaddr); /* STY d */ + C_STY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x85) + O_d(opaddr); /* STA d */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x86) + O_d(opaddr); /* STX d */ + C_STX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x87) + O_dil(opaddr); /* STA [d] */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x88) +#ifdef SHORT_X /* DEY i */ + C_DEC8(Y.B.L); +#else + C_DEC16(Y.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x89) +#ifdef SHORT_M /* BIT # */ + O_i8(operand); + F_setZ(!(A.B.L & operand.B.L)); +#else + O_i16(operand); + F_setZ(!(A.W & operand.W)); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x8A) +#ifdef SHORT_M /* TXA i */ + C_LDA8(X.B.L); +#else + C_LDA16(X.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x8B) + S_PUSH(DB); /* PHB */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x8C) + O_a(opaddr); /* STY a */ + C_STY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x8D) + O_a(opaddr); /* STA a */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x8E) + O_a(opaddr); /* STX a */ + C_STX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x8F) + O_al(opaddr); /* STA al */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x90) + O_pcr(opaddr); /* BCC r */ + if (!F_getC) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x91) + O_dix(opaddr); /* STA (d),y */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x92) + O_di(opaddr); /* STA (d) */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x93) + O_srix(opaddr); /* STA (d,s),y */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x94) + O_dxx(opaddr); /* STY d,x */ + C_STY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x95) + O_dxx(opaddr); /* STA d,x */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x96) + O_dxy(opaddr); /* STX d,y */ + C_STX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x97) + O_dixl(opaddr); /* STA [d],y */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x98) +#ifdef SHORT_M /* TYA i */ + C_LDA8(Y.B.L); +#else + C_LDA16(Y.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x99) + O_axy(opaddr); /* STA a,y */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x9A) +#ifdef NATIVE_MODE /* TXS i */ + S.W = X.W; +#else + S.B.L = X.B.L; +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x9B) +#ifdef SHORT_X /* TXY i */ + C_LDY8(X.B.L); +#else + C_LDY16(X.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x9C) + O_a(opaddr); /* STZ a */ + C_STZ(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x9D) + O_axx(opaddr); /* STA a,x */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x9E) + O_axx(opaddr); /* STZ a,x */ + C_STZ(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0x9F) + O_alxx(opaddr); /* STA al,x */ + C_STA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA0) +#ifdef SHORT_X /* LDY # */ + O_i8(operand); + C_LDY8(operand.B.L); +#else + O_i16(operand); + C_LDY16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA1) + O_dxi(opaddr); /* LDA (d,x) */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA2) +#ifdef SHORT_X /* LDX # */ + O_i8(operand); + C_LDX8(operand.B.L); +#else + O_i16(operand); + C_LDX16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA3) + O_sr(opaddr); /* LDA d,s */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA4) + O_d(opaddr); /* LDY d */ + C_LDY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA5) + O_d(opaddr); /* LDA d */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA6) + O_d(opaddr); /* LDX d */ + C_LDX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA7) + O_dil(opaddr); /* LDA [d] */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA8) +#ifdef SHORT_X /* TAY i */ + C_LDY8(A.B.L); +#else + C_LDY16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xA9) +#ifdef SHORT_M /* LDA # */ + O_i8(operand); + C_LDA8(operand.B.L); +#else + O_i16(operand); + C_LDA16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xAA) +#ifdef SHORT_X /* TAX i */ + C_LDX8(A.B.L); +#else + C_LDX16(A.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xAB) + S_PULL(DB); /* PLB s */ + C_SETF8(DB); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xAC) + O_a(opaddr); /* LDY a */ + C_LDY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xAD) + O_a(opaddr); /* LDA a */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xAE) + O_a(opaddr); /* LDX a */ + C_LDX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xAF) + O_al(opaddr); /* LDA al */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB0) + O_pcr(opaddr); /* BCS r */ + if (F_getC) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB1) + O_dix(opaddr); /* LDA (d),y */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB2) + O_di(opaddr); /* LDA (d) */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB3) + O_srix(opaddr); /* LDA (d,s),y */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB4) + O_dxx(opaddr); /* LDY d,x */ + C_LDY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB5) + O_dxx(opaddr); /* LDA d,x */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB6) + O_dxy(opaddr); /* LDX d,y */ + C_LDX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB7) + O_dixl(opaddr); /* LDA [d],y */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB8) + F_setV(0); /* CLV i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xB9) + O_axy(opaddr); /* LDA a,y */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xBA) +#ifdef SHORT_X /* TSX i */ + C_LDX8(S.B.L); +#else + C_LDX16(S.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xBB) +#ifdef SHORT_X /* TYX i */ + C_LDX8(Y.B.L); +#else + C_LDX16(Y.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xBC) + O_axx(opaddr); /* LDY a,x */ + C_LDY(opaddr); +END_CPU_FUNC +BEGIN_CPU_FUNC(opcode_0xBD) + O_axx(opaddr); /* LDA a,x */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xBE) + O_axy(opaddr); /* LDX a,y */ + C_LDX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xBF) + O_alxx(opaddr); /* LDA al,x */ + C_LDA(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC0) +#ifdef SHORT_X /* CPY # */ + O_i8(operand); + C_CPY8(operand.B.L); +#else + O_i16(operand); + C_CPY16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC1) + O_dxi(opaddr); /* CMP (d,x) */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC2) + O_i8(operand); /* REP # */ +#ifdef NATIVE_MODE + P &= ~operand.B.L; +#else + P &= ~(operand.B.L & ~0x30); +#endif + CPU_modeSwitch(); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC3) + O_sr(opaddr); /* CMP d,s */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC4) + O_d(opaddr); /* CPY d */ + C_CPY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC5) + O_d(opaddr); /* CMP d */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC6) + O_d(opaddr); /* DEC d */ + C_DEC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC7) + O_dil(opaddr); /* CMP [d] */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC8) +#ifdef SHORT_X /* INY */ + C_INC8(Y.B.L); +#else + C_INC16(Y.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xC9) +#ifdef SHORT_M /* CMP # */ + O_i8(operand); + C_CMP8(operand.B.L); +#else + O_i16(operand); + C_CMP16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xCA) +#ifdef SHORT_X /* DEX i */ + C_DEC8(X.B.L); +#else + C_DEC16(X.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xCB) + cpu_wait = 1; /* WAI */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xCC) + O_a(opaddr); /* CPY a */ + C_CPY(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xCD) + O_a(opaddr); /* CMP a */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xCE) + O_a(opaddr); /* DEC a */ + C_DEC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xCF) + O_al(opaddr); /* CMP al */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD0) + O_pcr(opaddr); /* BNE r */ + if (!F_getZ) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD1) + O_dix(opaddr); /* CMP (d),y */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD2) + O_di(opaddr); /* CMP (d) */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD3) + O_srix(opaddr); /* CMP (d,s),y */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD4) + O_d(opaddr); /* PEI d */ + operand.B.L = M_READ(opaddr.A+1); + S_PUSH(operand.B.L); + operand.B.L = M_READ(opaddr.A); + S_PUSH(operand.B.L); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD5) + O_dxx(opaddr); /* CMP d,x */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD6) + O_dxx(opaddr); /* DEC d,x */ + C_DEC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD7) + O_dixl(opaddr); /* CMP [d],y */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD8) + F_setD(0); /* CLD i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xD9) + O_axy(opaddr); /* CMP a,y */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xDA) +#ifdef SHORT_X /* PHX */ + S_PUSH(X.B.L); +#else + S_PUSH(X.B.H); + S_PUSH(X.B.L); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xDB) + cpu_stop = 1; /* STP */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xDC) + O_ail(opaddr); /* JML (a) */ + PC.A = opaddr.A; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xDD) + O_axx(opaddr); /* CMP a,x */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xDE) + O_axx(opaddr); /* DEC a,x */ + C_DEC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xDF) + O_alxx(opaddr); /* CMP al,x */ + C_CMP(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE0) +#ifdef SHORT_X /* CPX # */ + O_i8(operand); + C_CPX8(operand.B.L); +#else + O_i16(operand); + C_CPX16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE1) + O_dxi(opaddr); /* SBC (d,x) */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE2) + O_i8(operand); /* SEP # */ +#ifdef NATIVE_MODE + P |= operand.B.L; +#else + P |= (operand.B.L & ~0x30); +#endif + CPU_modeSwitch(); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE3) + O_sr(opaddr); /* SBC d,s */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE4) + O_d(opaddr); /* CPX d */ + C_CPX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE5) + O_d(opaddr); /* SBC d */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE6) + O_d(opaddr); /* INC d */ + C_INC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE7) + O_di(opaddr); /* SBC [d] */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE8) +#ifdef SHORT_X /* INX */ + C_INC8(X.B.L); +#else + C_INC16(X.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xE9) +#ifdef SHORT_M /* SBC # */ + O_i8(operand); + C_SBC8(operand.B.L); +#else + O_i16(operand); + C_SBC16(operand.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xEA) +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xEB) + operand.B.L = A.B.H; /* XBA i */ + A.B.H = A.B.L; + A.B.L = operand.B.L; + C_SETF8(A.B.L); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xEC) + O_a(opaddr); /* CPX a */ + C_CPX(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xED) + O_a(opaddr); /* SBC a */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xEE) + O_a(opaddr); /* INC a */ + C_INC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xEF) + O_al(opaddr); /* SBC al */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF0) + O_pcr(opaddr); /* BEQ r */ + if (F_getZ) { +#ifndef NATIVE_MODE + if (PC.B.H != opaddr.B.H) cpu_cycle_count++; +#endif + PC.W.PC = opaddr.W.L; + cpu_cycle_count++; + } +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF1) + O_dix(opaddr); /* SBC (d),y */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF2) + O_di(opaddr); /* SBC (d) */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF3) + O_srix(opaddr); /* SBC (d,s),y */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF4) + O_i16(operand); /* PEA s */ + S_PUSH(operand.B.H); + S_PUSH(operand.B.L); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF5) + O_dxx(opaddr); /* SBC d,x */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF6) + O_dxx(opaddr); /* INC d,x */ + C_INC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF7) + O_dixl(opaddr); /* SBC [d],y */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF8) + F_setD(1); /* SED i */ +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xF9) + O_axy(opaddr); /* SBC a,y */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xFA) +#ifdef SHORT_X /* PLX s */ + S_PULL(X.B.L); + C_SETF8(X.B.L); +#else + S_PULL(X.B.L); + S_PULL(X.B.H); + C_SETF16(X.W); +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xFB) + E = F_getC; +#ifdef NATIVE_MODE /* XCE i */ + F_setC(0); +#else + F_setC(1); +#endif + if (E) { + P |= 0x30; + S.B.H = 0x01; + X.B.H = 0x00; + Y.B.H = 0x00; + } + CPU_modeSwitch(); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xFC) + O_axi(opaddr); /* JSR (a,x) */ + PC.W.PC--; + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + PC.W.PC = opaddr.W.L; +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xFD) + O_axx(opaddr); /* SBC a,x */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xFE) + O_axx(opaddr); /* INC a,x */ + C_INC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(opcode_0xFF) + O_alxx(opaddr); /* SBC al,x */ + C_SBC(opaddr); +END_CPU_FUNC + +BEGIN_CPU_FUNC(reset) + cpu_reset = 0; + cpu_abort = 0; + cpu_nmi = 0; + cpu_irq = 0; + cpu_stop = 0; + cpu_wait = 0; + P = 0x34; + E = 1; + D.W = 0; + DB = 0; + PC.B.PB = 0; + S.W = 0x01FF; + A.W = 0; + X.W = 0; + Y.W = 0; + PC.B.L = M_READ_VECTOR(RESET_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(RESET_VECTOR_HIGH); + CPU_modeSwitch(); +END_CPU_FUNC + +BEGIN_CPU_FUNC(abort) + cpu_wait = 0; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0; + PC.B.L = M_READ_VECTOR(ABORT_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(ABORT_VECTOR_HIGH); + cpu_cycle_count += 8; +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH((byte) ((P & ~0x10) | 0x20)); + F_setD(0); + F_setI(1); + DB = 0; + PC.B.PB = 0; + PC.B.L = M_READ_VECTOR(EMU_ABORT_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_ABORT_VECTOR_HIGH); + cpu_cycle_count += 7; +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(nmi) + cpu_nmi = 0; + cpu_wait = 0; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(NMI_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(NMI_VECTOR_HIGH); + cpu_cycle_count += 8; +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH((byte) ((P & ~0x10) | 0x20)); + F_setD(0); + F_setI(1); + DB = 0; + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(EMU_NMI_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_NMI_VECTOR_HIGH); + cpu_cycle_count += 7; +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(irq) + cpu_irq = 0; + cpu_wait = 0; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(IRQ_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(IRQ_VECTOR_HIGH); + cpu_cycle_count += 8; +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH((byte) ((P & ~0x10) | 0x20)); + F_setD(0); + F_setI(1); + F_setB(1); + DB = 0; + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(EMU_IRQ_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_IRQ_VECTOR_HIGH); + cpu_cycle_count += 7; +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(irne64) + cpu_irq = 0; + cpu_wait = 0; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(IRNE64_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(IRNE64_VECTOR_HIGH); + cpu_cycle_count += 8; +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH((byte) ((P & ~0x10) | 0x20)); + F_setD(0); + F_setI(1); + F_setB(1); + DB = 0; + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(EMU_IRNE64_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_IRNE64_VECTOR_HIGH); + cpu_cycle_count += 7; +#endif +END_CPU_FUNC + +BEGIN_CPU_FUNC(irqt5) + cpu_irq = 0; + cpu_wait = 0; +#ifdef NATIVE_MODE + S_PUSH(PC.B.PB); + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH(P); + F_setD(0); + F_setI(1); + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(IRQT5_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(IRQT5_VECTOR_HIGH); + cpu_cycle_count += 8; +#else + S_PUSH(PC.B.H); + S_PUSH(PC.B.L); + S_PUSH((byte) ((P & ~0x10) | 0x20)); + F_setD(0); + F_setI(1); + F_setB(1); + DB = 0; + PC.B.PB = 0x00; + PC.B.L = M_READ_VECTOR(EMU_IRQT5_VECTOR_LOW); + PC.B.H = M_READ_VECTOR(EMU_IRQT5_VECTOR_HIGH); + cpu_cycle_count += 7; +#endif +END_CPU_FUNC diff --git a/src/opcodes1.c b/src/opcodes1.c new file mode 100644 index 0000000..eeb833d --- /dev/null +++ b/src/opcodes1.c @@ -0,0 +1,5 @@ +#undef NATIVE_MODE +#define SHORT_M +#define SHORT_X +#define CPUMODE e1m1x1 +#include "opcodes.h" diff --git a/src/opcodes2.c b/src/opcodes2.c new file mode 100644 index 0000000..aea57b8 --- /dev/null +++ b/src/opcodes2.c @@ -0,0 +1,5 @@ +#define NATIVE_MODE +#define SHORT_M +#define SHORT_X +#define CPUMODE e0m1x1 +#include "opcodes.h" diff --git a/src/opcodes3.c b/src/opcodes3.c new file mode 100644 index 0000000..d6c354c --- /dev/null +++ b/src/opcodes3.c @@ -0,0 +1,5 @@ +#define NATIVE_MODE +#undef SHORT_M +#define SHORT_X +#define CPUMODE e0m0x1 +#include "opcodes.h" diff --git a/src/opcodes4.c b/src/opcodes4.c new file mode 100644 index 0000000..145958b --- /dev/null +++ b/src/opcodes4.c @@ -0,0 +1,5 @@ +#define NATIVE_MODE +#define SHORT_M +#undef SHORT_X +#define CPUMODE e0m1x0 +#include "opcodes.h" diff --git a/src/opcodes5.c b/src/opcodes5.c new file mode 100644 index 0000000..11a32ca --- /dev/null +++ b/src/opcodes5.c @@ -0,0 +1,5 @@ +#define NATIVE_MODE +#undef SHORT_M +#undef SHORT_X +#define CPUMODE e0m0x0 +#include "opcodes.h" diff --git a/src/sdl_events.c b/src/sdl_events.c new file mode 100644 index 0000000..f55830c --- /dev/null +++ b/src/sdl_events.c @@ -0,0 +1,57 @@ +#include "cpu.h" +#include "sdl_events.h" +#include + +extern int dispatch_quit; + +u_int8_t keyboard_keyReady = 0; +SDL_Keysym keyboard_keySym; +u_int8_t keyboard_repeat; +u_int8_t keyboard_state; + + + +void keyboard_init() { + +} + +byte keyboard_read(u_int8_t register) { + return 0; +} + +void keyboard_write(u_int8_t register, byte value) { + +} + +char translateSDLKey(SDL_Keysym keysym) { + // todo: expand this to handle more keys + // special keys like home/end/etc probably need to send multiple bytes. + // not sure how to deal with that unless ascii key & mod are separate reads. + if (keysym.sym >= SDLK_a && keysym.sym <= SDLK_z) { + // todo: include keysym.mod to get shift state. + return 'a' + (keysym.sym - SDLK_a); + } else if (keysym.sym >= SDLK_0 && keysym.sym <= SDLK_9) { + return '0' + (keysym.sym - SDLK_0); + } else if (keysym.sym == SDLK_SPACE) { + return ' '; + } else if (keysym.sym == SDLK_RETURN) { + return '\n'; + } else if (keysym.sym == SDLK_TAB) { + return '\t'; + } + // Add more keys as needed + + return '\0'; // Return null character for unsupported keys +} + +void handleEvent(SDL_Event *event) { + if (event->type == SDL_QUIT) { + puts("SDL_QUIT happened!"); + dispatch_quit = 1; + } else if (event->type == SDL_KEYDOWN || event->type == SDL_KEYUP) { + SDL_KeyboardEvent *ke = (SDL_KeyboardEvent *) event; + keyboard_keySym = ke->keysym; + keyboard_repeat = ke->repeat; + keyboard_state = ke->state; + } +} diff --git a/src/sdl_events.h b/src/sdl_events.h new file mode 100644 index 0000000..4d85190 --- /dev/null +++ b/src/sdl_events.h @@ -0,0 +1,7 @@ +#ifndef sdl_events_h +#define sdl_events_h + +#include +#include + +#endif /* sdl_events_h */ diff --git a/src/table.c b/src/table.c new file mode 100644 index 0000000..95e4c8f --- /dev/null +++ b/src/table.c @@ -0,0 +1,1326 @@ +/* + * lib65816/table.c Release 1p1 + * See LICENSE for more details. + * + * Code originally from XGS: Apple IIGS Emulator (table.c) + * + * Originally written and Copyright (C)1996 by Joshua M. Thompson + * Copyright (C) 2006 by Samuel A. Falvo II + * + * Modified for greater portability and virtual hardware independence. + */ + +#include "cputable.h" + +const void (*cpu_opcode_table[1310]) = { + e0m1x1_opcode_0x00, + e0m1x1_opcode_0x01, + e0m1x1_opcode_0x02, + e0m1x1_opcode_0x03, + e0m1x1_opcode_0x04, + e0m1x1_opcode_0x05, + e0m1x1_opcode_0x06, + e0m1x1_opcode_0x07, + e0m1x1_opcode_0x08, + e0m1x1_opcode_0x09, + e0m1x1_opcode_0x0A, + e0m1x1_opcode_0x0B, + e0m1x1_opcode_0x0C, + e0m1x1_opcode_0x0D, + e0m1x1_opcode_0x0E, + e0m1x1_opcode_0x0F, + e0m1x1_opcode_0x10, + e0m1x1_opcode_0x11, + e0m1x1_opcode_0x12, + e0m1x1_opcode_0x13, + e0m1x1_opcode_0x14, + e0m1x1_opcode_0x15, + e0m1x1_opcode_0x16, + e0m1x1_opcode_0x17, + e0m1x1_opcode_0x18, + e0m1x1_opcode_0x19, + e0m1x1_opcode_0x1A, + e0m1x1_opcode_0x1B, + e0m1x1_opcode_0x1C, + e0m1x1_opcode_0x1D, + e0m1x1_opcode_0x1E, + e0m1x1_opcode_0x1F, + e0m1x1_opcode_0x20, + e0m1x1_opcode_0x21, + e0m1x1_opcode_0x22, + e0m1x1_opcode_0x23, + e0m1x1_opcode_0x24, + e0m1x1_opcode_0x25, + e0m1x1_opcode_0x26, + e0m1x1_opcode_0x27, + e0m1x1_opcode_0x28, + e0m1x1_opcode_0x29, + e0m1x1_opcode_0x2A, + e0m1x1_opcode_0x2B, + e0m1x1_opcode_0x2C, + e0m1x1_opcode_0x2D, + e0m1x1_opcode_0x2E, + e0m1x1_opcode_0x2F, + e0m1x1_opcode_0x30, + e0m1x1_opcode_0x31, + e0m1x1_opcode_0x32, + e0m1x1_opcode_0x33, + e0m1x1_opcode_0x34, + e0m1x1_opcode_0x35, + e0m1x1_opcode_0x36, + e0m1x1_opcode_0x37, + e0m1x1_opcode_0x38, + e0m1x1_opcode_0x39, + e0m1x1_opcode_0x3A, + e0m1x1_opcode_0x3B, + e0m1x1_opcode_0x3C, + e0m1x1_opcode_0x3D, + e0m1x1_opcode_0x3E, + e0m1x1_opcode_0x3F, + e0m1x1_opcode_0x40, + e0m1x1_opcode_0x41, + e0m1x1_opcode_0x42, + e0m1x1_opcode_0x43, + e0m1x1_opcode_0x44, + e0m1x1_opcode_0x45, + e0m1x1_opcode_0x46, + e0m1x1_opcode_0x47, + e0m1x1_opcode_0x48, + e0m1x1_opcode_0x49, + e0m1x1_opcode_0x4A, + e0m1x1_opcode_0x4B, + e0m1x1_opcode_0x4C, + e0m1x1_opcode_0x4D, + e0m1x1_opcode_0x4E, + e0m1x1_opcode_0x4F, + e0m1x1_opcode_0x50, + e0m1x1_opcode_0x51, + e0m1x1_opcode_0x52, + e0m1x1_opcode_0x53, + e0m1x1_opcode_0x54, + e0m1x1_opcode_0x55, + e0m1x1_opcode_0x56, + e0m1x1_opcode_0x57, + e0m1x1_opcode_0x58, + e0m1x1_opcode_0x59, + e0m1x1_opcode_0x5A, + e0m1x1_opcode_0x5B, + e0m1x1_opcode_0x5C, + e0m1x1_opcode_0x5D, + e0m1x1_opcode_0x5E, + e0m1x1_opcode_0x5F, + e0m1x1_opcode_0x60, + e0m1x1_opcode_0x61, + e0m1x1_opcode_0x62, + e0m1x1_opcode_0x63, + e0m1x1_opcode_0x64, + e0m1x1_opcode_0x65, + e0m1x1_opcode_0x66, + e0m1x1_opcode_0x67, + e0m1x1_opcode_0x68, + e0m1x1_opcode_0x69, + e0m1x1_opcode_0x6A, + e0m1x1_opcode_0x6B, + e0m1x1_opcode_0x6C, + e0m1x1_opcode_0x6D, + e0m1x1_opcode_0x6E, + e0m1x1_opcode_0x6F, + e0m1x1_opcode_0x70, + e0m1x1_opcode_0x71, + e0m1x1_opcode_0x72, + e0m1x1_opcode_0x73, + e0m1x1_opcode_0x74, + e0m1x1_opcode_0x75, + e0m1x1_opcode_0x76, + e0m1x1_opcode_0x77, + e0m1x1_opcode_0x78, + e0m1x1_opcode_0x79, + e0m1x1_opcode_0x7A, + e0m1x1_opcode_0x7B, + e0m1x1_opcode_0x7C, + e0m1x1_opcode_0x7D, + e0m1x1_opcode_0x7E, + e0m1x1_opcode_0x7F, + e0m1x1_opcode_0x80, + e0m1x1_opcode_0x81, + e0m1x1_opcode_0x82, + e0m1x1_opcode_0x83, + e0m1x1_opcode_0x84, + e0m1x1_opcode_0x85, + e0m1x1_opcode_0x86, + e0m1x1_opcode_0x87, + e0m1x1_opcode_0x88, + e0m1x1_opcode_0x89, + e0m1x1_opcode_0x8A, + e0m1x1_opcode_0x8B, + e0m1x1_opcode_0x8C, + e0m1x1_opcode_0x8D, + e0m1x1_opcode_0x8E, + e0m1x1_opcode_0x8F, + e0m1x1_opcode_0x90, + e0m1x1_opcode_0x91, + e0m1x1_opcode_0x92, + e0m1x1_opcode_0x93, + e0m1x1_opcode_0x94, + e0m1x1_opcode_0x95, + e0m1x1_opcode_0x96, + e0m1x1_opcode_0x97, + e0m1x1_opcode_0x98, + e0m1x1_opcode_0x99, + e0m1x1_opcode_0x9A, + e0m1x1_opcode_0x9B, + e0m1x1_opcode_0x9C, + e0m1x1_opcode_0x9D, + e0m1x1_opcode_0x9E, + e0m1x1_opcode_0x9F, + e0m1x1_opcode_0xA0, + e0m1x1_opcode_0xA1, + e0m1x1_opcode_0xA2, + e0m1x1_opcode_0xA3, + e0m1x1_opcode_0xA4, + e0m1x1_opcode_0xA5, + e0m1x1_opcode_0xA6, + e0m1x1_opcode_0xA7, + e0m1x1_opcode_0xA8, + e0m1x1_opcode_0xA9, + e0m1x1_opcode_0xAA, + e0m1x1_opcode_0xAB, + e0m1x1_opcode_0xAC, + e0m1x1_opcode_0xAD, + e0m1x1_opcode_0xAE, + e0m1x1_opcode_0xAF, + e0m1x1_opcode_0xB0, + e0m1x1_opcode_0xB1, + e0m1x1_opcode_0xB2, + e0m1x1_opcode_0xB3, + e0m1x1_opcode_0xB4, + e0m1x1_opcode_0xB5, + e0m1x1_opcode_0xB6, + e0m1x1_opcode_0xB7, + e0m1x1_opcode_0xB8, + e0m1x1_opcode_0xB9, + e0m1x1_opcode_0xBA, + e0m1x1_opcode_0xBB, + e0m1x1_opcode_0xBC, + e0m1x1_opcode_0xBD, + e0m1x1_opcode_0xBE, + e0m1x1_opcode_0xBF, + e0m1x1_opcode_0xC0, + e0m1x1_opcode_0xC1, + e0m1x1_opcode_0xC2, + e0m1x1_opcode_0xC3, + e0m1x1_opcode_0xC4, + e0m1x1_opcode_0xC5, + e0m1x1_opcode_0xC6, + e0m1x1_opcode_0xC7, + e0m1x1_opcode_0xC8, + e0m1x1_opcode_0xC9, + e0m1x1_opcode_0xCA, + e0m1x1_opcode_0xCB, + e0m1x1_opcode_0xCC, + e0m1x1_opcode_0xCD, + e0m1x1_opcode_0xCE, + e0m1x1_opcode_0xCF, + e0m1x1_opcode_0xD0, + e0m1x1_opcode_0xD1, + e0m1x1_opcode_0xD2, + e0m1x1_opcode_0xD3, + e0m1x1_opcode_0xD4, + e0m1x1_opcode_0xD5, + e0m1x1_opcode_0xD6, + e0m1x1_opcode_0xD7, + e0m1x1_opcode_0xD8, + e0m1x1_opcode_0xD9, + e0m1x1_opcode_0xDA, + e0m1x1_opcode_0xDB, + e0m1x1_opcode_0xDC, + e0m1x1_opcode_0xDD, + e0m1x1_opcode_0xDE, + e0m1x1_opcode_0xDF, + e0m1x1_opcode_0xE0, + e0m1x1_opcode_0xE1, + e0m1x1_opcode_0xE2, + e0m1x1_opcode_0xE3, + e0m1x1_opcode_0xE4, + e0m1x1_opcode_0xE5, + e0m1x1_opcode_0xE6, + e0m1x1_opcode_0xE7, + e0m1x1_opcode_0xE8, + e0m1x1_opcode_0xE9, + e0m1x1_opcode_0xEA, + e0m1x1_opcode_0xEB, + e0m1x1_opcode_0xEC, + e0m1x1_opcode_0xED, + e0m1x1_opcode_0xEE, + e0m1x1_opcode_0xEF, + e0m1x1_opcode_0xF0, + e0m1x1_opcode_0xF1, + e0m1x1_opcode_0xF2, + e0m1x1_opcode_0xF3, + e0m1x1_opcode_0xF4, + e0m1x1_opcode_0xF5, + e0m1x1_opcode_0xF6, + e0m1x1_opcode_0xF7, + e0m1x1_opcode_0xF8, + e0m1x1_opcode_0xF9, + e0m1x1_opcode_0xFA, + e0m1x1_opcode_0xFB, + e0m1x1_opcode_0xFC, + e0m1x1_opcode_0xFD, + e0m1x1_opcode_0xFE, + e0m1x1_opcode_0xFF, + e0m1x1_reset, + e0m1x1_abort, + e0m1x1_nmi, + e0m1x1_irq, + e0m1x1_irne64, + e0m1x1_irqt5, + e0m1x0_opcode_0x00, + e0m1x0_opcode_0x01, + e0m1x0_opcode_0x02, + e0m1x0_opcode_0x03, + e0m1x0_opcode_0x04, + e0m1x0_opcode_0x05, + e0m1x0_opcode_0x06, + e0m1x0_opcode_0x07, + e0m1x0_opcode_0x08, + e0m1x0_opcode_0x09, + e0m1x0_opcode_0x0A, + e0m1x0_opcode_0x0B, + e0m1x0_opcode_0x0C, + e0m1x0_opcode_0x0D, + e0m1x0_opcode_0x0E, + e0m1x0_opcode_0x0F, + e0m1x0_opcode_0x10, + e0m1x0_opcode_0x11, + e0m1x0_opcode_0x12, + e0m1x0_opcode_0x13, + e0m1x0_opcode_0x14, + e0m1x0_opcode_0x15, + e0m1x0_opcode_0x16, + e0m1x0_opcode_0x17, + e0m1x0_opcode_0x18, + e0m1x0_opcode_0x19, + e0m1x0_opcode_0x1A, + e0m1x0_opcode_0x1B, + e0m1x0_opcode_0x1C, + e0m1x0_opcode_0x1D, + e0m1x0_opcode_0x1E, + e0m1x0_opcode_0x1F, + e0m1x0_opcode_0x20, + e0m1x0_opcode_0x21, + e0m1x0_opcode_0x22, + e0m1x0_opcode_0x23, + e0m1x0_opcode_0x24, + e0m1x0_opcode_0x25, + e0m1x0_opcode_0x26, + e0m1x0_opcode_0x27, + e0m1x0_opcode_0x28, + e0m1x0_opcode_0x29, + e0m1x0_opcode_0x2A, + e0m1x0_opcode_0x2B, + e0m1x0_opcode_0x2C, + e0m1x0_opcode_0x2D, + e0m1x0_opcode_0x2E, + e0m1x0_opcode_0x2F, + e0m1x0_opcode_0x30, + e0m1x0_opcode_0x31, + e0m1x0_opcode_0x32, + e0m1x0_opcode_0x33, + e0m1x0_opcode_0x34, + e0m1x0_opcode_0x35, + e0m1x0_opcode_0x36, + e0m1x0_opcode_0x37, + e0m1x0_opcode_0x38, + e0m1x0_opcode_0x39, + e0m1x0_opcode_0x3A, + e0m1x0_opcode_0x3B, + e0m1x0_opcode_0x3C, + e0m1x0_opcode_0x3D, + e0m1x0_opcode_0x3E, + e0m1x0_opcode_0x3F, + e0m1x0_opcode_0x40, + e0m1x0_opcode_0x41, + e0m1x0_opcode_0x42, + e0m1x0_opcode_0x43, + e0m1x0_opcode_0x44, + e0m1x0_opcode_0x45, + e0m1x0_opcode_0x46, + e0m1x0_opcode_0x47, + e0m1x0_opcode_0x48, + e0m1x0_opcode_0x49, + e0m1x0_opcode_0x4A, + e0m1x0_opcode_0x4B, + e0m1x0_opcode_0x4C, + e0m1x0_opcode_0x4D, + e0m1x0_opcode_0x4E, + e0m1x0_opcode_0x4F, + e0m1x0_opcode_0x50, + e0m1x0_opcode_0x51, + e0m1x0_opcode_0x52, + e0m1x0_opcode_0x53, + e0m1x0_opcode_0x54, + e0m1x0_opcode_0x55, + e0m1x0_opcode_0x56, + e0m1x0_opcode_0x57, + e0m1x0_opcode_0x58, + e0m1x0_opcode_0x59, + e0m1x0_opcode_0x5A, + e0m1x0_opcode_0x5B, + e0m1x0_opcode_0x5C, + e0m1x0_opcode_0x5D, + e0m1x0_opcode_0x5E, + e0m1x0_opcode_0x5F, + e0m1x0_opcode_0x60, + e0m1x0_opcode_0x61, + e0m1x0_opcode_0x62, + e0m1x0_opcode_0x63, + e0m1x0_opcode_0x64, + e0m1x0_opcode_0x65, + e0m1x0_opcode_0x66, + e0m1x0_opcode_0x67, + e0m1x0_opcode_0x68, + e0m1x0_opcode_0x69, + e0m1x0_opcode_0x6A, + e0m1x0_opcode_0x6B, + e0m1x0_opcode_0x6C, + e0m1x0_opcode_0x6D, + e0m1x0_opcode_0x6E, + e0m1x0_opcode_0x6F, + e0m1x0_opcode_0x70, + e0m1x0_opcode_0x71, + e0m1x0_opcode_0x72, + e0m1x0_opcode_0x73, + e0m1x0_opcode_0x74, + e0m1x0_opcode_0x75, + e0m1x0_opcode_0x76, + e0m1x0_opcode_0x77, + e0m1x0_opcode_0x78, + e0m1x0_opcode_0x79, + e0m1x0_opcode_0x7A, + e0m1x0_opcode_0x7B, + e0m1x0_opcode_0x7C, + e0m1x0_opcode_0x7D, + e0m1x0_opcode_0x7E, + e0m1x0_opcode_0x7F, + e0m1x0_opcode_0x80, + e0m1x0_opcode_0x81, + e0m1x0_opcode_0x82, + e0m1x0_opcode_0x83, + e0m1x0_opcode_0x84, + e0m1x0_opcode_0x85, + e0m1x0_opcode_0x86, + e0m1x0_opcode_0x87, + e0m1x0_opcode_0x88, + e0m1x0_opcode_0x89, + e0m1x0_opcode_0x8A, + e0m1x0_opcode_0x8B, + e0m1x0_opcode_0x8C, + e0m1x0_opcode_0x8D, + e0m1x0_opcode_0x8E, + e0m1x0_opcode_0x8F, + e0m1x0_opcode_0x90, + e0m1x0_opcode_0x91, + e0m1x0_opcode_0x92, + e0m1x0_opcode_0x93, + e0m1x0_opcode_0x94, + e0m1x0_opcode_0x95, + e0m1x0_opcode_0x96, + e0m1x0_opcode_0x97, + e0m1x0_opcode_0x98, + e0m1x0_opcode_0x99, + e0m1x0_opcode_0x9A, + e0m1x0_opcode_0x9B, + e0m1x0_opcode_0x9C, + e0m1x0_opcode_0x9D, + e0m1x0_opcode_0x9E, + e0m1x0_opcode_0x9F, + e0m1x0_opcode_0xA0, + e0m1x0_opcode_0xA1, + e0m1x0_opcode_0xA2, + e0m1x0_opcode_0xA3, + e0m1x0_opcode_0xA4, + e0m1x0_opcode_0xA5, + e0m1x0_opcode_0xA6, + e0m1x0_opcode_0xA7, + e0m1x0_opcode_0xA8, + e0m1x0_opcode_0xA9, + e0m1x0_opcode_0xAA, + e0m1x0_opcode_0xAB, + e0m1x0_opcode_0xAC, + e0m1x0_opcode_0xAD, + e0m1x0_opcode_0xAE, + e0m1x0_opcode_0xAF, + e0m1x0_opcode_0xB0, + e0m1x0_opcode_0xB1, + e0m1x0_opcode_0xB2, + e0m1x0_opcode_0xB3, + e0m1x0_opcode_0xB4, + e0m1x0_opcode_0xB5, + e0m1x0_opcode_0xB6, + e0m1x0_opcode_0xB7, + e0m1x0_opcode_0xB8, + e0m1x0_opcode_0xB9, + e0m1x0_opcode_0xBA, + e0m1x0_opcode_0xBB, + e0m1x0_opcode_0xBC, + e0m1x0_opcode_0xBD, + e0m1x0_opcode_0xBE, + e0m1x0_opcode_0xBF, + e0m1x0_opcode_0xC0, + e0m1x0_opcode_0xC1, + e0m1x0_opcode_0xC2, + e0m1x0_opcode_0xC3, + e0m1x0_opcode_0xC4, + e0m1x0_opcode_0xC5, + e0m1x0_opcode_0xC6, + e0m1x0_opcode_0xC7, + e0m1x0_opcode_0xC8, + e0m1x0_opcode_0xC9, + e0m1x0_opcode_0xCA, + e0m1x0_opcode_0xCB, + e0m1x0_opcode_0xCC, + e0m1x0_opcode_0xCD, + e0m1x0_opcode_0xCE, + e0m1x0_opcode_0xCF, + e0m1x0_opcode_0xD0, + e0m1x0_opcode_0xD1, + e0m1x0_opcode_0xD2, + e0m1x0_opcode_0xD3, + e0m1x0_opcode_0xD4, + e0m1x0_opcode_0xD5, + e0m1x0_opcode_0xD6, + e0m1x0_opcode_0xD7, + e0m1x0_opcode_0xD8, + e0m1x0_opcode_0xD9, + e0m1x0_opcode_0xDA, + e0m1x0_opcode_0xDB, + e0m1x0_opcode_0xDC, + e0m1x0_opcode_0xDD, + e0m1x0_opcode_0xDE, + e0m1x0_opcode_0xDF, + e0m1x0_opcode_0xE0, + e0m1x0_opcode_0xE1, + e0m1x0_opcode_0xE2, + e0m1x0_opcode_0xE3, + e0m1x0_opcode_0xE4, + e0m1x0_opcode_0xE5, + e0m1x0_opcode_0xE6, + e0m1x0_opcode_0xE7, + e0m1x0_opcode_0xE8, + e0m1x0_opcode_0xE9, + e0m1x0_opcode_0xEA, + e0m1x0_opcode_0xEB, + e0m1x0_opcode_0xEC, + e0m1x0_opcode_0xED, + e0m1x0_opcode_0xEE, + e0m1x0_opcode_0xEF, + e0m1x0_opcode_0xF0, + e0m1x0_opcode_0xF1, + e0m1x0_opcode_0xF2, + e0m1x0_opcode_0xF3, + e0m1x0_opcode_0xF4, + e0m1x0_opcode_0xF5, + e0m1x0_opcode_0xF6, + e0m1x0_opcode_0xF7, + e0m1x0_opcode_0xF8, + e0m1x0_opcode_0xF9, + e0m1x0_opcode_0xFA, + e0m1x0_opcode_0xFB, + e0m1x0_opcode_0xFC, + e0m1x0_opcode_0xFD, + e0m1x0_opcode_0xFE, + e0m1x0_opcode_0xFF, + e0m1x0_reset, + e0m1x0_abort, + e0m1x0_nmi, + e0m1x0_irq, + e0m1x0_irne64, + e0m1x0_irqt5, + e0m0x1_opcode_0x00, + e0m0x1_opcode_0x01, + e0m0x1_opcode_0x02, + e0m0x1_opcode_0x03, + e0m0x1_opcode_0x04, + e0m0x1_opcode_0x05, + e0m0x1_opcode_0x06, + e0m0x1_opcode_0x07, + e0m0x1_opcode_0x08, + e0m0x1_opcode_0x09, + e0m0x1_opcode_0x0A, + e0m0x1_opcode_0x0B, + e0m0x1_opcode_0x0C, + e0m0x1_opcode_0x0D, + e0m0x1_opcode_0x0E, + e0m0x1_opcode_0x0F, + e0m0x1_opcode_0x10, + e0m0x1_opcode_0x11, + e0m0x1_opcode_0x12, + e0m0x1_opcode_0x13, + e0m0x1_opcode_0x14, + e0m0x1_opcode_0x15, + e0m0x1_opcode_0x16, + e0m0x1_opcode_0x17, + e0m0x1_opcode_0x18, + e0m0x1_opcode_0x19, + e0m0x1_opcode_0x1A, + e0m0x1_opcode_0x1B, + e0m0x1_opcode_0x1C, + e0m0x1_opcode_0x1D, + e0m0x1_opcode_0x1E, + e0m0x1_opcode_0x1F, + e0m0x1_opcode_0x20, + e0m0x1_opcode_0x21, + e0m0x1_opcode_0x22, + e0m0x1_opcode_0x23, + e0m0x1_opcode_0x24, + e0m0x1_opcode_0x25, + e0m0x1_opcode_0x26, + e0m0x1_opcode_0x27, + e0m0x1_opcode_0x28, + e0m0x1_opcode_0x29, + e0m0x1_opcode_0x2A, + e0m0x1_opcode_0x2B, + e0m0x1_opcode_0x2C, + e0m0x1_opcode_0x2D, + e0m0x1_opcode_0x2E, + e0m0x1_opcode_0x2F, + e0m0x1_opcode_0x30, + e0m0x1_opcode_0x31, + e0m0x1_opcode_0x32, + e0m0x1_opcode_0x33, + e0m0x1_opcode_0x34, + e0m0x1_opcode_0x35, + e0m0x1_opcode_0x36, + e0m0x1_opcode_0x37, + e0m0x1_opcode_0x38, + e0m0x1_opcode_0x39, + e0m0x1_opcode_0x3A, + e0m0x1_opcode_0x3B, + e0m0x1_opcode_0x3C, + e0m0x1_opcode_0x3D, + e0m0x1_opcode_0x3E, + e0m0x1_opcode_0x3F, + e0m0x1_opcode_0x40, + e0m0x1_opcode_0x41, + e0m0x1_opcode_0x42, + e0m0x1_opcode_0x43, + e0m0x1_opcode_0x44, + e0m0x1_opcode_0x45, + e0m0x1_opcode_0x46, + e0m0x1_opcode_0x47, + e0m0x1_opcode_0x48, + e0m0x1_opcode_0x49, + e0m0x1_opcode_0x4A, + e0m0x1_opcode_0x4B, + e0m0x1_opcode_0x4C, + e0m0x1_opcode_0x4D, + e0m0x1_opcode_0x4E, + e0m0x1_opcode_0x4F, + e0m0x1_opcode_0x50, + e0m0x1_opcode_0x51, + e0m0x1_opcode_0x52, + e0m0x1_opcode_0x53, + e0m0x1_opcode_0x54, + e0m0x1_opcode_0x55, + e0m0x1_opcode_0x56, + e0m0x1_opcode_0x57, + e0m0x1_opcode_0x58, + e0m0x1_opcode_0x59, + e0m0x1_opcode_0x5A, + e0m0x1_opcode_0x5B, + e0m0x1_opcode_0x5C, + e0m0x1_opcode_0x5D, + e0m0x1_opcode_0x5E, + e0m0x1_opcode_0x5F, + e0m0x1_opcode_0x60, + e0m0x1_opcode_0x61, + e0m0x1_opcode_0x62, + e0m0x1_opcode_0x63, + e0m0x1_opcode_0x64, + e0m0x1_opcode_0x65, + e0m0x1_opcode_0x66, + e0m0x1_opcode_0x67, + e0m0x1_opcode_0x68, + e0m0x1_opcode_0x69, + e0m0x1_opcode_0x6A, + e0m0x1_opcode_0x6B, + e0m0x1_opcode_0x6C, + e0m0x1_opcode_0x6D, + e0m0x1_opcode_0x6E, + e0m0x1_opcode_0x6F, + e0m0x1_opcode_0x70, + e0m0x1_opcode_0x71, + e0m0x1_opcode_0x72, + e0m0x1_opcode_0x73, + e0m0x1_opcode_0x74, + e0m0x1_opcode_0x75, + e0m0x1_opcode_0x76, + e0m0x1_opcode_0x77, + e0m0x1_opcode_0x78, + e0m0x1_opcode_0x79, + e0m0x1_opcode_0x7A, + e0m0x1_opcode_0x7B, + e0m0x1_opcode_0x7C, + e0m0x1_opcode_0x7D, + e0m0x1_opcode_0x7E, + e0m0x1_opcode_0x7F, + e0m0x1_opcode_0x80, + e0m0x1_opcode_0x81, + e0m0x1_opcode_0x82, + e0m0x1_opcode_0x83, + e0m0x1_opcode_0x84, + e0m0x1_opcode_0x85, + e0m0x1_opcode_0x86, + e0m0x1_opcode_0x87, + e0m0x1_opcode_0x88, + e0m0x1_opcode_0x89, + e0m0x1_opcode_0x8A, + e0m0x1_opcode_0x8B, + e0m0x1_opcode_0x8C, + e0m0x1_opcode_0x8D, + e0m0x1_opcode_0x8E, + e0m0x1_opcode_0x8F, + e0m0x1_opcode_0x90, + e0m0x1_opcode_0x91, + e0m0x1_opcode_0x92, + e0m0x1_opcode_0x93, + e0m0x1_opcode_0x94, + e0m0x1_opcode_0x95, + e0m0x1_opcode_0x96, + e0m0x1_opcode_0x97, + e0m0x1_opcode_0x98, + e0m0x1_opcode_0x99, + e0m0x1_opcode_0x9A, + e0m0x1_opcode_0x9B, + e0m0x1_opcode_0x9C, + e0m0x1_opcode_0x9D, + e0m0x1_opcode_0x9E, + e0m0x1_opcode_0x9F, + e0m0x1_opcode_0xA0, + e0m0x1_opcode_0xA1, + e0m0x1_opcode_0xA2, + e0m0x1_opcode_0xA3, + e0m0x1_opcode_0xA4, + e0m0x1_opcode_0xA5, + e0m0x1_opcode_0xA6, + e0m0x1_opcode_0xA7, + e0m0x1_opcode_0xA8, + e0m0x1_opcode_0xA9, + e0m0x1_opcode_0xAA, + e0m0x1_opcode_0xAB, + e0m0x1_opcode_0xAC, + e0m0x1_opcode_0xAD, + e0m0x1_opcode_0xAE, + e0m0x1_opcode_0xAF, + e0m0x1_opcode_0xB0, + e0m0x1_opcode_0xB1, + e0m0x1_opcode_0xB2, + e0m0x1_opcode_0xB3, + e0m0x1_opcode_0xB4, + e0m0x1_opcode_0xB5, + e0m0x1_opcode_0xB6, + e0m0x1_opcode_0xB7, + e0m0x1_opcode_0xB8, + e0m0x1_opcode_0xB9, + e0m0x1_opcode_0xBA, + e0m0x1_opcode_0xBB, + e0m0x1_opcode_0xBC, + e0m0x1_opcode_0xBD, + e0m0x1_opcode_0xBE, + e0m0x1_opcode_0xBF, + e0m0x1_opcode_0xC0, + e0m0x1_opcode_0xC1, + e0m0x1_opcode_0xC2, + e0m0x1_opcode_0xC3, + e0m0x1_opcode_0xC4, + e0m0x1_opcode_0xC5, + e0m0x1_opcode_0xC6, + e0m0x1_opcode_0xC7, + e0m0x1_opcode_0xC8, + e0m0x1_opcode_0xC9, + e0m0x1_opcode_0xCA, + e0m0x1_opcode_0xCB, + e0m0x1_opcode_0xCC, + e0m0x1_opcode_0xCD, + e0m0x1_opcode_0xCE, + e0m0x1_opcode_0xCF, + e0m0x1_opcode_0xD0, + e0m0x1_opcode_0xD1, + e0m0x1_opcode_0xD2, + e0m0x1_opcode_0xD3, + e0m0x1_opcode_0xD4, + e0m0x1_opcode_0xD5, + e0m0x1_opcode_0xD6, + e0m0x1_opcode_0xD7, + e0m0x1_opcode_0xD8, + e0m0x1_opcode_0xD9, + e0m0x1_opcode_0xDA, + e0m0x1_opcode_0xDB, + e0m0x1_opcode_0xDC, + e0m0x1_opcode_0xDD, + e0m0x1_opcode_0xDE, + e0m0x1_opcode_0xDF, + e0m0x1_opcode_0xE0, + e0m0x1_opcode_0xE1, + e0m0x1_opcode_0xE2, + e0m0x1_opcode_0xE3, + e0m0x1_opcode_0xE4, + e0m0x1_opcode_0xE5, + e0m0x1_opcode_0xE6, + e0m0x1_opcode_0xE7, + e0m0x1_opcode_0xE8, + e0m0x1_opcode_0xE9, + e0m0x1_opcode_0xEA, + e0m0x1_opcode_0xEB, + e0m0x1_opcode_0xEC, + e0m0x1_opcode_0xED, + e0m0x1_opcode_0xEE, + e0m0x1_opcode_0xEF, + e0m0x1_opcode_0xF0, + e0m0x1_opcode_0xF1, + e0m0x1_opcode_0xF2, + e0m0x1_opcode_0xF3, + e0m0x1_opcode_0xF4, + e0m0x1_opcode_0xF5, + e0m0x1_opcode_0xF6, + e0m0x1_opcode_0xF7, + e0m0x1_opcode_0xF8, + e0m0x1_opcode_0xF9, + e0m0x1_opcode_0xFA, + e0m0x1_opcode_0xFB, + e0m0x1_opcode_0xFC, + e0m0x1_opcode_0xFD, + e0m0x1_opcode_0xFE, + e0m0x1_opcode_0xFF, + e0m0x1_reset, + e0m0x1_abort, + e0m0x1_nmi, + e0m0x1_irq, + e0m0x1_irne64, + e0m0x1_irqt5, + e0m0x0_opcode_0x00, + e0m0x0_opcode_0x01, + e0m0x0_opcode_0x02, + e0m0x0_opcode_0x03, + e0m0x0_opcode_0x04, + e0m0x0_opcode_0x05, + e0m0x0_opcode_0x06, + e0m0x0_opcode_0x07, + e0m0x0_opcode_0x08, + e0m0x0_opcode_0x09, + e0m0x0_opcode_0x0A, + e0m0x0_opcode_0x0B, + e0m0x0_opcode_0x0C, + e0m0x0_opcode_0x0D, + e0m0x0_opcode_0x0E, + e0m0x0_opcode_0x0F, + e0m0x0_opcode_0x10, + e0m0x0_opcode_0x11, + e0m0x0_opcode_0x12, + e0m0x0_opcode_0x13, + e0m0x0_opcode_0x14, + e0m0x0_opcode_0x15, + e0m0x0_opcode_0x16, + e0m0x0_opcode_0x17, + e0m0x0_opcode_0x18, + e0m0x0_opcode_0x19, + e0m0x0_opcode_0x1A, + e0m0x0_opcode_0x1B, + e0m0x0_opcode_0x1C, + e0m0x0_opcode_0x1D, + e0m0x0_opcode_0x1E, + e0m0x0_opcode_0x1F, + e0m0x0_opcode_0x20, + e0m0x0_opcode_0x21, + e0m0x0_opcode_0x22, + e0m0x0_opcode_0x23, + e0m0x0_opcode_0x24, + e0m0x0_opcode_0x25, + e0m0x0_opcode_0x26, + e0m0x0_opcode_0x27, + e0m0x0_opcode_0x28, + e0m0x0_opcode_0x29, + e0m0x0_opcode_0x2A, + e0m0x0_opcode_0x2B, + e0m0x0_opcode_0x2C, + e0m0x0_opcode_0x2D, + e0m0x0_opcode_0x2E, + e0m0x0_opcode_0x2F, + e0m0x0_opcode_0x30, + e0m0x0_opcode_0x31, + e0m0x0_opcode_0x32, + e0m0x0_opcode_0x33, + e0m0x0_opcode_0x34, + e0m0x0_opcode_0x35, + e0m0x0_opcode_0x36, + e0m0x0_opcode_0x37, + e0m0x0_opcode_0x38, + e0m0x0_opcode_0x39, + e0m0x0_opcode_0x3A, + e0m0x0_opcode_0x3B, + e0m0x0_opcode_0x3C, + e0m0x0_opcode_0x3D, + e0m0x0_opcode_0x3E, + e0m0x0_opcode_0x3F, + e0m0x0_opcode_0x40, + e0m0x0_opcode_0x41, + e0m0x0_opcode_0x42, + e0m0x0_opcode_0x43, + e0m0x0_opcode_0x44, + e0m0x0_opcode_0x45, + e0m0x0_opcode_0x46, + e0m0x0_opcode_0x47, + e0m0x0_opcode_0x48, + e0m0x0_opcode_0x49, + e0m0x0_opcode_0x4A, + e0m0x0_opcode_0x4B, + e0m0x0_opcode_0x4C, + e0m0x0_opcode_0x4D, + e0m0x0_opcode_0x4E, + e0m0x0_opcode_0x4F, + e0m0x0_opcode_0x50, + e0m0x0_opcode_0x51, + e0m0x0_opcode_0x52, + e0m0x0_opcode_0x53, + e0m0x0_opcode_0x54, + e0m0x0_opcode_0x55, + e0m0x0_opcode_0x56, + e0m0x0_opcode_0x57, + e0m0x0_opcode_0x58, + e0m0x0_opcode_0x59, + e0m0x0_opcode_0x5A, + e0m0x0_opcode_0x5B, + e0m0x0_opcode_0x5C, + e0m0x0_opcode_0x5D, + e0m0x0_opcode_0x5E, + e0m0x0_opcode_0x5F, + e0m0x0_opcode_0x60, + e0m0x0_opcode_0x61, + e0m0x0_opcode_0x62, + e0m0x0_opcode_0x63, + e0m0x0_opcode_0x64, + e0m0x0_opcode_0x65, + e0m0x0_opcode_0x66, + e0m0x0_opcode_0x67, + e0m0x0_opcode_0x68, + e0m0x0_opcode_0x69, + e0m0x0_opcode_0x6A, + e0m0x0_opcode_0x6B, + e0m0x0_opcode_0x6C, + e0m0x0_opcode_0x6D, + e0m0x0_opcode_0x6E, + e0m0x0_opcode_0x6F, + e0m0x0_opcode_0x70, + e0m0x0_opcode_0x71, + e0m0x0_opcode_0x72, + e0m0x0_opcode_0x73, + e0m0x0_opcode_0x74, + e0m0x0_opcode_0x75, + e0m0x0_opcode_0x76, + e0m0x0_opcode_0x77, + e0m0x0_opcode_0x78, + e0m0x0_opcode_0x79, + e0m0x0_opcode_0x7A, + e0m0x0_opcode_0x7B, + e0m0x0_opcode_0x7C, + e0m0x0_opcode_0x7D, + e0m0x0_opcode_0x7E, + e0m0x0_opcode_0x7F, + e0m0x0_opcode_0x80, + e0m0x0_opcode_0x81, + e0m0x0_opcode_0x82, + e0m0x0_opcode_0x83, + e0m0x0_opcode_0x84, + e0m0x0_opcode_0x85, + e0m0x0_opcode_0x86, + e0m0x0_opcode_0x87, + e0m0x0_opcode_0x88, + e0m0x0_opcode_0x89, + e0m0x0_opcode_0x8A, + e0m0x0_opcode_0x8B, + e0m0x0_opcode_0x8C, + e0m0x0_opcode_0x8D, + e0m0x0_opcode_0x8E, + e0m0x0_opcode_0x8F, + e0m0x0_opcode_0x90, + e0m0x0_opcode_0x91, + e0m0x0_opcode_0x92, + e0m0x0_opcode_0x93, + e0m0x0_opcode_0x94, + e0m0x0_opcode_0x95, + e0m0x0_opcode_0x96, + e0m0x0_opcode_0x97, + e0m0x0_opcode_0x98, + e0m0x0_opcode_0x99, + e0m0x0_opcode_0x9A, + e0m0x0_opcode_0x9B, + e0m0x0_opcode_0x9C, + e0m0x0_opcode_0x9D, + e0m0x0_opcode_0x9E, + e0m0x0_opcode_0x9F, + e0m0x0_opcode_0xA0, + e0m0x0_opcode_0xA1, + e0m0x0_opcode_0xA2, + e0m0x0_opcode_0xA3, + e0m0x0_opcode_0xA4, + e0m0x0_opcode_0xA5, + e0m0x0_opcode_0xA6, + e0m0x0_opcode_0xA7, + e0m0x0_opcode_0xA8, + e0m0x0_opcode_0xA9, + e0m0x0_opcode_0xAA, + e0m0x0_opcode_0xAB, + e0m0x0_opcode_0xAC, + e0m0x0_opcode_0xAD, + e0m0x0_opcode_0xAE, + e0m0x0_opcode_0xAF, + e0m0x0_opcode_0xB0, + e0m0x0_opcode_0xB1, + e0m0x0_opcode_0xB2, + e0m0x0_opcode_0xB3, + e0m0x0_opcode_0xB4, + e0m0x0_opcode_0xB5, + e0m0x0_opcode_0xB6, + e0m0x0_opcode_0xB7, + e0m0x0_opcode_0xB8, + e0m0x0_opcode_0xB9, + e0m0x0_opcode_0xBA, + e0m0x0_opcode_0xBB, + e0m0x0_opcode_0xBC, + e0m0x0_opcode_0xBD, + e0m0x0_opcode_0xBE, + e0m0x0_opcode_0xBF, + e0m0x0_opcode_0xC0, + e0m0x0_opcode_0xC1, + e0m0x0_opcode_0xC2, + e0m0x0_opcode_0xC3, + e0m0x0_opcode_0xC4, + e0m0x0_opcode_0xC5, + e0m0x0_opcode_0xC6, + e0m0x0_opcode_0xC7, + e0m0x0_opcode_0xC8, + e0m0x0_opcode_0xC9, + e0m0x0_opcode_0xCA, + e0m0x0_opcode_0xCB, + e0m0x0_opcode_0xCC, + e0m0x0_opcode_0xCD, + e0m0x0_opcode_0xCE, + e0m0x0_opcode_0xCF, + e0m0x0_opcode_0xD0, + e0m0x0_opcode_0xD1, + e0m0x0_opcode_0xD2, + e0m0x0_opcode_0xD3, + e0m0x0_opcode_0xD4, + e0m0x0_opcode_0xD5, + e0m0x0_opcode_0xD6, + e0m0x0_opcode_0xD7, + e0m0x0_opcode_0xD8, + e0m0x0_opcode_0xD9, + e0m0x0_opcode_0xDA, + e0m0x0_opcode_0xDB, + e0m0x0_opcode_0xDC, + e0m0x0_opcode_0xDD, + e0m0x0_opcode_0xDE, + e0m0x0_opcode_0xDF, + e0m0x0_opcode_0xE0, + e0m0x0_opcode_0xE1, + e0m0x0_opcode_0xE2, + e0m0x0_opcode_0xE3, + e0m0x0_opcode_0xE4, + e0m0x0_opcode_0xE5, + e0m0x0_opcode_0xE6, + e0m0x0_opcode_0xE7, + e0m0x0_opcode_0xE8, + e0m0x0_opcode_0xE9, + e0m0x0_opcode_0xEA, + e0m0x0_opcode_0xEB, + e0m0x0_opcode_0xEC, + e0m0x0_opcode_0xED, + e0m0x0_opcode_0xEE, + e0m0x0_opcode_0xEF, + e0m0x0_opcode_0xF0, + e0m0x0_opcode_0xF1, + e0m0x0_opcode_0xF2, + e0m0x0_opcode_0xF3, + e0m0x0_opcode_0xF4, + e0m0x0_opcode_0xF5, + e0m0x0_opcode_0xF6, + e0m0x0_opcode_0xF7, + e0m0x0_opcode_0xF8, + e0m0x0_opcode_0xF9, + e0m0x0_opcode_0xFA, + e0m0x0_opcode_0xFB, + e0m0x0_opcode_0xFC, + e0m0x0_opcode_0xFD, + e0m0x0_opcode_0xFE, + e0m0x0_opcode_0xFF, + e0m0x0_reset, + e0m0x0_abort, + e0m0x0_nmi, + e0m0x0_irq, + e0m0x0_irne64, + e0m0x0_irqt5, + e1m1x1_opcode_0x00, + e1m1x1_opcode_0x01, + e1m1x1_opcode_0x02, + e1m1x1_opcode_0x03, + e1m1x1_opcode_0x04, + e1m1x1_opcode_0x05, + e1m1x1_opcode_0x06, + e1m1x1_opcode_0x07, + e1m1x1_opcode_0x08, + e1m1x1_opcode_0x09, + e1m1x1_opcode_0x0A, + e1m1x1_opcode_0x0B, + e1m1x1_opcode_0x0C, + e1m1x1_opcode_0x0D, + e1m1x1_opcode_0x0E, + e1m1x1_opcode_0x0F, + e1m1x1_opcode_0x10, + e1m1x1_opcode_0x11, + e1m1x1_opcode_0x12, + e1m1x1_opcode_0x13, + e1m1x1_opcode_0x14, + e1m1x1_opcode_0x15, + e1m1x1_opcode_0x16, + e1m1x1_opcode_0x17, + e1m1x1_opcode_0x18, + e1m1x1_opcode_0x19, + e1m1x1_opcode_0x1A, + e1m1x1_opcode_0x1B, + e1m1x1_opcode_0x1C, + e1m1x1_opcode_0x1D, + e1m1x1_opcode_0x1E, + e1m1x1_opcode_0x1F, + e1m1x1_opcode_0x20, + e1m1x1_opcode_0x21, + e1m1x1_opcode_0x22, + e1m1x1_opcode_0x23, + e1m1x1_opcode_0x24, + e1m1x1_opcode_0x25, + e1m1x1_opcode_0x26, + e1m1x1_opcode_0x27, + e1m1x1_opcode_0x28, + e1m1x1_opcode_0x29, + e1m1x1_opcode_0x2A, + e1m1x1_opcode_0x2B, + e1m1x1_opcode_0x2C, + e1m1x1_opcode_0x2D, + e1m1x1_opcode_0x2E, + e1m1x1_opcode_0x2F, + e1m1x1_opcode_0x30, + e1m1x1_opcode_0x31, + e1m1x1_opcode_0x32, + e1m1x1_opcode_0x33, + e1m1x1_opcode_0x34, + e1m1x1_opcode_0x35, + e1m1x1_opcode_0x36, + e1m1x1_opcode_0x37, + e1m1x1_opcode_0x38, + e1m1x1_opcode_0x39, + e1m1x1_opcode_0x3A, + e1m1x1_opcode_0x3B, + e1m1x1_opcode_0x3C, + e1m1x1_opcode_0x3D, + e1m1x1_opcode_0x3E, + e1m1x1_opcode_0x3F, + e1m1x1_opcode_0x40, + e1m1x1_opcode_0x41, + e1m1x1_opcode_0x42, + e1m1x1_opcode_0x43, + e1m1x1_opcode_0x44, + e1m1x1_opcode_0x45, + e1m1x1_opcode_0x46, + e1m1x1_opcode_0x47, + e1m1x1_opcode_0x48, + e1m1x1_opcode_0x49, + e1m1x1_opcode_0x4A, + e1m1x1_opcode_0x4B, + e1m1x1_opcode_0x4C, + e1m1x1_opcode_0x4D, + e1m1x1_opcode_0x4E, + e1m1x1_opcode_0x4F, + e1m1x1_opcode_0x50, + e1m1x1_opcode_0x51, + e1m1x1_opcode_0x52, + e1m1x1_opcode_0x53, + e1m1x1_opcode_0x54, + e1m1x1_opcode_0x55, + e1m1x1_opcode_0x56, + e1m1x1_opcode_0x57, + e1m1x1_opcode_0x58, + e1m1x1_opcode_0x59, + e1m1x1_opcode_0x5A, + e1m1x1_opcode_0x5B, + e1m1x1_opcode_0x5C, + e1m1x1_opcode_0x5D, + e1m1x1_opcode_0x5E, + e1m1x1_opcode_0x5F, + e1m1x1_opcode_0x60, + e1m1x1_opcode_0x61, + e1m1x1_opcode_0x62, + e1m1x1_opcode_0x63, + e1m1x1_opcode_0x64, + e1m1x1_opcode_0x65, + e1m1x1_opcode_0x66, + e1m1x1_opcode_0x67, + e1m1x1_opcode_0x68, + e1m1x1_opcode_0x69, + e1m1x1_opcode_0x6A, + e1m1x1_opcode_0x6B, + e1m1x1_opcode_0x6C, + e1m1x1_opcode_0x6D, + e1m1x1_opcode_0x6E, + e1m1x1_opcode_0x6F, + e1m1x1_opcode_0x70, + e1m1x1_opcode_0x71, + e1m1x1_opcode_0x72, + e1m1x1_opcode_0x73, + e1m1x1_opcode_0x74, + e1m1x1_opcode_0x75, + e1m1x1_opcode_0x76, + e1m1x1_opcode_0x77, + e1m1x1_opcode_0x78, + e1m1x1_opcode_0x79, + e1m1x1_opcode_0x7A, + e1m1x1_opcode_0x7B, + e1m1x1_opcode_0x7C, + e1m1x1_opcode_0x7D, + e1m1x1_opcode_0x7E, + e1m1x1_opcode_0x7F, + e1m1x1_opcode_0x80, + e1m1x1_opcode_0x81, + e1m1x1_opcode_0x82, + e1m1x1_opcode_0x83, + e1m1x1_opcode_0x84, + e1m1x1_opcode_0x85, + e1m1x1_opcode_0x86, + e1m1x1_opcode_0x87, + e1m1x1_opcode_0x88, + e1m1x1_opcode_0x89, + e1m1x1_opcode_0x8A, + e1m1x1_opcode_0x8B, + e1m1x1_opcode_0x8C, + e1m1x1_opcode_0x8D, + e1m1x1_opcode_0x8E, + e1m1x1_opcode_0x8F, + e1m1x1_opcode_0x90, + e1m1x1_opcode_0x91, + e1m1x1_opcode_0x92, + e1m1x1_opcode_0x93, + e1m1x1_opcode_0x94, + e1m1x1_opcode_0x95, + e1m1x1_opcode_0x96, + e1m1x1_opcode_0x97, + e1m1x1_opcode_0x98, + e1m1x1_opcode_0x99, + e1m1x1_opcode_0x9A, + e1m1x1_opcode_0x9B, + e1m1x1_opcode_0x9C, + e1m1x1_opcode_0x9D, + e1m1x1_opcode_0x9E, + e1m1x1_opcode_0x9F, + e1m1x1_opcode_0xA0, + e1m1x1_opcode_0xA1, + e1m1x1_opcode_0xA2, + e1m1x1_opcode_0xA3, + e1m1x1_opcode_0xA4, + e1m1x1_opcode_0xA5, + e1m1x1_opcode_0xA6, + e1m1x1_opcode_0xA7, + e1m1x1_opcode_0xA8, + e1m1x1_opcode_0xA9, + e1m1x1_opcode_0xAA, + e1m1x1_opcode_0xAB, + e1m1x1_opcode_0xAC, + e1m1x1_opcode_0xAD, + e1m1x1_opcode_0xAE, + e1m1x1_opcode_0xAF, + e1m1x1_opcode_0xB0, + e1m1x1_opcode_0xB1, + e1m1x1_opcode_0xB2, + e1m1x1_opcode_0xB3, + e1m1x1_opcode_0xB4, + e1m1x1_opcode_0xB5, + e1m1x1_opcode_0xB6, + e1m1x1_opcode_0xB7, + e1m1x1_opcode_0xB8, + e1m1x1_opcode_0xB9, + e1m1x1_opcode_0xBA, + e1m1x1_opcode_0xBB, + e1m1x1_opcode_0xBC, + e1m1x1_opcode_0xBD, + e1m1x1_opcode_0xBE, + e1m1x1_opcode_0xBF, + e1m1x1_opcode_0xC0, + e1m1x1_opcode_0xC1, + e1m1x1_opcode_0xC2, + e1m1x1_opcode_0xC3, + e1m1x1_opcode_0xC4, + e1m1x1_opcode_0xC5, + e1m1x1_opcode_0xC6, + e1m1x1_opcode_0xC7, + e1m1x1_opcode_0xC8, + e1m1x1_opcode_0xC9, + e1m1x1_opcode_0xCA, + e1m1x1_opcode_0xCB, + e1m1x1_opcode_0xCC, + e1m1x1_opcode_0xCD, + e1m1x1_opcode_0xCE, + e1m1x1_opcode_0xCF, + e1m1x1_opcode_0xD0, + e1m1x1_opcode_0xD1, + e1m1x1_opcode_0xD2, + e1m1x1_opcode_0xD3, + e1m1x1_opcode_0xD4, + e1m1x1_opcode_0xD5, + e1m1x1_opcode_0xD6, + e1m1x1_opcode_0xD7, + e1m1x1_opcode_0xD8, + e1m1x1_opcode_0xD9, + e1m1x1_opcode_0xDA, + e1m1x1_opcode_0xDB, + e1m1x1_opcode_0xDC, + e1m1x1_opcode_0xDD, + e1m1x1_opcode_0xDE, + e1m1x1_opcode_0xDF, + e1m1x1_opcode_0xE0, + e1m1x1_opcode_0xE1, + e1m1x1_opcode_0xE2, + e1m1x1_opcode_0xE3, + e1m1x1_opcode_0xE4, + e1m1x1_opcode_0xE5, + e1m1x1_opcode_0xE6, + e1m1x1_opcode_0xE7, + e1m1x1_opcode_0xE8, + e1m1x1_opcode_0xE9, + e1m1x1_opcode_0xEA, + e1m1x1_opcode_0xEB, + e1m1x1_opcode_0xEC, + e1m1x1_opcode_0xED, + e1m1x1_opcode_0xEE, + e1m1x1_opcode_0xEF, + e1m1x1_opcode_0xF0, + e1m1x1_opcode_0xF1, + e1m1x1_opcode_0xF2, + e1m1x1_opcode_0xF3, + e1m1x1_opcode_0xF4, + e1m1x1_opcode_0xF5, + e1m1x1_opcode_0xF6, + e1m1x1_opcode_0xF7, + e1m1x1_opcode_0xF8, + e1m1x1_opcode_0xF9, + e1m1x1_opcode_0xFA, + e1m1x1_opcode_0xFB, + e1m1x1_opcode_0xFC, + e1m1x1_opcode_0xFD, + e1m1x1_opcode_0xFE, + e1m1x1_opcode_0xFF, + e1m1x1_reset, + e1m1x1_abort, + e1m1x1_nmi, + e1m1x1_irq, + e1m1x1_irne64, + e1m1x1_irqt5, +}; diff --git a/src/util.c b/src/util.c new file mode 100644 index 0000000..dae1e80 --- /dev/null +++ b/src/util.c @@ -0,0 +1,56 @@ +#include +#include +#include +#include "cpu.h" + +char *toHex(unsigned long value, unsigned int digits) +{ + static char buffer[16]; + unsigned int offset = sizeof(buffer);; + + buffer[--offset] = 0; + while (digits-- > 0) { + buffer[--offset] = "0123456789ABCDEF"[value & 0xf]; + value >>= 4; + } + return (&(buffer[offset])); +} + +void hexDump(char *memory, int offset, int length) { + char buffer[256]; + char ascii[17] = ""; + for (int i = 0; i < 256; i++) + buffer[i] = 0; + + for (int i = 0; i < length; i += 16) { + sprintf((char *) buffer, "%04x: ", offset + i); + for (int j = 0; j < 16; j++) { + byte b = memory[offset + j + i]; + sprintf((char *) (6 + buffer + j*3), "%02x ", b); + + if (b >= 0x20 && b < 0x7f) { + ascii[j] = b; + } else { + ascii[j] = '.'; + } + } + strcat(buffer, ascii); + puts(buffer); + } +} + +// int main() { +// char buffer[65]; +// for (int i = 0; i < 64; i++) { +// buffer[i] = 'A' + i; +// } +// buffer[64] = '\0'; + +// //hexDump( (const char *) buffer, 0, 64); +// // for (int i = 0; i < 64; i++) { +// // printf("%d = '%c'\n", i, buffer[i]); +// // } + +// // puts(buffer); +// hexDump(buffer, 16, 48); +// } \ No newline at end of file diff --git a/src/util.h b/src/util.h new file mode 100644 index 0000000..8a3e61e --- /dev/null +++ b/src/util.h @@ -0,0 +1,5 @@ +#pragma once +#include "cpu.h" + +char *toHex(unsigned long value, unsigned int digits); +void hexDump(char *memory, int offset, int length); \ No newline at end of file diff --git a/src/video.c b/src/video.c new file mode 100644 index 0000000..b9660af --- /dev/null +++ b/src/video.c @@ -0,0 +1,2074 @@ +// Commander X16 Emulator +// Copyright (c) 2019 Michael Steil +// Copyright (c) 2020 Frank van den Hoef +// All rights reserved. License: 2-clause BSD + +#include "video.h" +#include "glue.h" +// #include "memory.h" +// #include "glue.h" +// #include "debugger.h" +// #include "keyboard.h" +// #include "gif.h" +// #include "joystick.h" +// #include "vera_spi.h" +// #include "vera_psg.h" +// #include "vera_pcm.h" +// #include "icon.h" +// #include "sdcard.h" +// #include "i2c.h" +// #include "audio.h" + +#include +#include +#include + +#ifdef __EMSCRIPTEN__ +#include "emscripten.h" +#endif + +#define APPROX_TITLEBAR_HEIGHT 30 + +#define VERA_VERSION_MAJOR 0x00 +#define VERA_VERSION_MINOR 0x03 +#define VERA_VERSION_PATCH 0x02 + +#define ADDR_VRAM_START 0x00000 +#define ADDR_VRAM_END 0x20000 +#define ADDR_PSG_START 0x1F9C0 +#define ADDR_PSG_END 0x1FA00 +#define ADDR_PALETTE_START 0x1FA00 +#define ADDR_PALETTE_END 0x1FC00 +#define ADDR_SPRDATA_START 0x1FC00 +#define ADDR_SPRDATA_END 0x20000 + +#define NUM_SPRITES 128 + +// both VGA and NTSC +#define SCAN_HEIGHT 525 +#define PIXEL_FREQ 25.0 + +// VGA +#define VGA_SCAN_WIDTH 800 +#define VGA_Y_OFFSET 0 + +// NTSC: 262.5 lines per frame, lower field first +#define NTSC_HALF_SCAN_WIDTH 794 +#define NTSC_X_OFFSET 270 +#define NTSC_Y_OFFSET_LOW 42 +#define NTSC_Y_OFFSET_HIGH 568 +#define TITLE_SAFE_X 0.067 +#define TITLE_SAFE_Y 0.05 + +// visible area we're drawing +#define SCREEN_WIDTH 640 +#define SCREEN_HEIGHT 480 + +#define SCREEN_RAM_OFFSET 0x00000 + +#ifdef __APPLE__ +#define LSHORTCUT_KEY SDL_SCANCODE_LGUI +#define RSHORTCUT_KEY SDL_SCANCODE_RGUI +#else +#define LSHORTCUT_KEY SDL_SCANCODE_LCTRL +#define RSHORTCUT_KEY SDL_SCANCODE_RCTRL +#endif + +// When rendering a layer line, we can amortize some of the cost by calculating multiple pixels at a time. +#define LAYER_PIXELS_PER_ITERATION 8 + +#define MAX(a,b) ((a) > (b) ? a : b) + +char window_title[128]; + +static SDL_Window *window; +static SDL_Renderer *renderer; +static SDL_Texture *sdlTexture; +static bool is_fullscreen = false; +bool mouse_grabbed = false; +bool no_keyboard_capture = false; +bool kernal_mouse_enabled = false; + +static uint8_t video_ram[0x20000]; +static uint8_t palette[256 * 2]; +static uint8_t sprite_data[128][8]; + +// I/O registers +static uint32_t io_addr[2]; +static uint8_t io_rddata[2]; +static uint8_t io_inc[2]; +static uint8_t io_addrsel; +static uint8_t io_dcsel; + +static uint8_t ien; +static uint8_t isr; + +static uint16_t irq_line; + +static uint8_t reg_layer[2][7]; + +#define COMPOSER_SLOTS 4*64 +static uint8_t reg_composer[COMPOSER_SLOTS]; +static uint8_t prev_reg_composer[2][COMPOSER_SLOTS]; + +static uint8_t layer_line[2][SCREEN_WIDTH]; +static uint8_t sprite_line_col[SCREEN_WIDTH]; +static uint8_t sprite_line_z[SCREEN_WIDTH]; +static uint8_t sprite_line_mask[SCREEN_WIDTH]; +static uint8_t sprite_line_collisions; +static bool layer_line_enable[2]; +static bool old_layer_line_enable[2]; +static bool old_sprite_line_enable; +static bool sprite_line_enable; + +//////////////////////////////////////////////////////////// +// FX registers +//////////////////////////////////////////////////////////// +static uint8_t fx_addr1_mode; + +// These are all 16.16 fixed point in the emulator +// even though the VERA uses smaller bit widths +// for the whole and fractional parts. +// +// Sign extension is done manually when assigning negative numbers +// +// Native VERA bit widths are shown below. +static uint32_t fx_x_pixel_increment; // 11.9 fixed point (6.9 without 32x multiplier, 11.4 with 32x multiplier on) +static uint32_t fx_y_pixel_increment; // 11.9 fixed point (6.9 without 32x multiplier, 11.4 with 32x multiplier on) +static uint32_t fx_x_pixel_position; // 11.9 fixed point +static uint32_t fx_y_pixel_position; // 11.9 fixed point + +static uint16_t fx_poly_fill_length; // 10 bits + +static uint32_t fx_affine_tile_base; +static uint32_t fx_affine_map_base; + +static uint8_t fx_affine_map_size; + +static bool fx_4bit_mode; +static bool fx_16bit_hop; +static bool fx_cache_byte_cycling; +static bool fx_cache_fill; +static bool fx_cache_write; +static bool fx_trans_writes; + +static bool fx_2bit_poly; +static bool fx_2bit_poking; + +static bool fx_cache_increment_mode; +static bool fx_cache_nibble_index; +static uint8_t fx_cache_byte_index; +static bool fx_multiplier; +static bool fx_subtract; + +static bool fx_affine_clip; + +static uint8_t fx_16bit_hop_align; + +static bool fx_nibble_bit[2]; +static bool fx_nibble_incr[2]; + +static uint8_t fx_cache[4]; + +static int32_t fx_mult_accumulator; + +static const uint8_t vera_version_string[] = {'V', + VERA_VERSION_MAJOR, + VERA_VERSION_MINOR, + VERA_VERSION_PATCH +}; + +float vga_scan_pos_x; +uint16_t vga_scan_pos_y; +float ntsc_half_cnt; +uint16_t ntsc_scan_pos_y; +int frame_count = 0; + +static uint8_t framebuffer[SCREEN_WIDTH * SCREEN_HEIGHT * 4]; +#ifndef __EMSCRIPTEN__ +static uint8_t png_buffer[SCREEN_WIDTH * SCREEN_HEIGHT * 3]; +#endif + +static const uint16_t default_palette[] = { +0x000,0xfff,0x800,0xafe,0xc4c,0x0c5,0x00a,0xee7,0xd85,0x640,0xf77,0x333,0x777,0xaf6,0x08f,0xbbb,0x000,0x111,0x222,0x333,0x444,0x555,0x666,0x777,0x888,0x999,0xaaa,0xbbb,0xccc,0xddd,0xeee,0xfff,0x211,0x433,0x644,0x866,0xa88,0xc99,0xfbb,0x211,0x422,0x633,0x844,0xa55,0xc66,0xf77,0x200,0x411,0x611,0x822,0xa22,0xc33,0xf33,0x200,0x400,0x600,0x800,0xa00,0xc00,0xf00,0x221,0x443,0x664,0x886,0xaa8,0xcc9,0xfeb,0x211,0x432,0x653,0x874,0xa95,0xcb6,0xfd7,0x210,0x431,0x651,0x862,0xa82,0xca3,0xfc3,0x210,0x430,0x640,0x860,0xa80,0xc90,0xfb0,0x121,0x343,0x564,0x786,0x9a8,0xbc9,0xdfb,0x121,0x342,0x463,0x684,0x8a5,0x9c6,0xbf7,0x120,0x241,0x461,0x582,0x6a2,0x8c3,0x9f3,0x120,0x240,0x360,0x480,0x5a0,0x6c0,0x7f0,0x121,0x343,0x465,0x686,0x8a8,0x9ca,0xbfc,0x121,0x242,0x364,0x485,0x5a6,0x6c8,0x7f9,0x020,0x141,0x162,0x283,0x2a4,0x3c5,0x3f6,0x020,0x041,0x061,0x082,0x0a2,0x0c3,0x0f3,0x122,0x344,0x466,0x688,0x8aa,0x9cc,0xbff,0x122,0x244,0x366,0x488,0x5aa,0x6cc,0x7ff,0x022,0x144,0x166,0x288,0x2aa,0x3cc,0x3ff,0x022,0x044,0x066,0x088,0x0aa,0x0cc,0x0ff,0x112,0x334,0x456,0x668,0x88a,0x9ac,0xbcf,0x112,0x224,0x346,0x458,0x56a,0x68c,0x79f,0x002,0x114,0x126,0x238,0x24a,0x35c,0x36f,0x002,0x014,0x016,0x028,0x02a,0x03c,0x03f,0x112,0x334,0x546,0x768,0x98a,0xb9c,0xdbf,0x112,0x324,0x436,0x648,0x85a,0x96c,0xb7f,0x102,0x214,0x416,0x528,0x62a,0x83c,0x93f,0x102,0x204,0x306,0x408,0x50a,0x60c,0x70f,0x212,0x434,0x646,0x868,0xa8a,0xc9c,0xfbe,0x211,0x423,0x635,0x847,0xa59,0xc6b,0xf7d,0x201,0x413,0x615,0x826,0xa28,0xc3a,0xf3c,0x201,0x403,0x604,0x806,0xa08,0xc09,0xf0b +}; + +uint8_t video_space_read(uint32_t address); +static void video_space_read_range(uint8_t* dest, uint32_t address, uint32_t size); + +static void refresh_palette(); + +void +mousegrab_toggle() { + mouse_grabbed = !mouse_grabbed; + SDL_SetWindowGrab(window, mouse_grabbed && !no_keyboard_capture); + SDL_SetRelativeMouseMode(mouse_grabbed); + SDL_ShowCursor((mouse_grabbed || kernal_mouse_enabled) ? SDL_DISABLE : SDL_ENABLE); + sprintf(window_title, WINDOW_TITLE "%s", mouse_grabbed ? MOUSE_GRAB_MSG : ""); + video_update_title(window_title); +} + +void +video_reset() +{ + // init I/O registers + memset(io_addr, 0, sizeof(io_addr)); + memset(io_inc, 0, sizeof(io_inc)); + io_addrsel = 0; + io_dcsel = 0; + io_rddata[0] = 0; + io_rddata[1] = 0; + + ien = 0; + isr = 0; + irq_line = 0; + + // init Layer registers + memset(reg_layer, 0, sizeof(reg_layer)); + + // init composer registers + memset(reg_composer, 0, sizeof(reg_composer)); + reg_composer[1] = 128; // hscale = 1.0 + reg_composer[2] = 128; // vscale = 1.0 + reg_composer[5] = 640 >> 2; + reg_composer[7] = 480 >> 1; + + // Initialize FX registers + fx_addr1_mode = 0; + fx_x_pixel_position = 0x8000; + fx_y_pixel_position = 0x8000; + fx_x_pixel_increment = 0; + fx_y_pixel_increment = 0; + + fx_cache_write = false; + fx_cache_fill = false; + fx_4bit_mode = false; + fx_16bit_hop = false; + fx_subtract = false; + fx_cache_byte_cycling = false; + fx_trans_writes = false; + fx_multiplier = false; + + fx_mult_accumulator = 0; + + fx_2bit_poly = false; + fx_2bit_poking = false; + + fx_cache_nibble_index = 0; + fx_cache_byte_index = 0; + fx_cache_increment_mode = 0; + + fx_cache[0] = 0; + fx_cache[1] = 0; + fx_cache[2] = 0; + fx_cache[3] = 0; + + fx_16bit_hop_align = 0; + + fx_nibble_bit[0] = false; + fx_nibble_bit[1] = false; + fx_nibble_incr[0] = false; + fx_nibble_incr[1] = false; + + fx_poly_fill_length = 0; + fx_affine_tile_base = 0; + fx_affine_map_base = 0; + fx_affine_map_size = 2; + fx_affine_clip = false; + + // init sprite data + memset(sprite_data, 0, sizeof(sprite_data)); + + // copy palette + memcpy(palette, default_palette, sizeof(palette)); + for (int i = 0; i < 256; i++) { + palette[i * 2 + 0] = default_palette[i] & 0xff; + palette[i * 2 + 1] = default_palette[i] >> 8; + } + + refresh_palette(); + + // fill video RAM with random data + for (int i = 0; i < 128 * 1024; i++) { + video_ram[i] = rand(); + } + + sprite_line_collisions = 0; + + vga_scan_pos_x = 0; + vga_scan_pos_y = 0; + ntsc_half_cnt = 0; + ntsc_scan_pos_y = 0; + + psg_reset(); + pcm_reset(); +} + +bool +video_init(int window_scale, float screen_x_scale, char *quality, bool fullscreen, float opacity) +{ + uint32_t window_flags = SDL_WINDOW_ALLOW_HIGHDPI; + +#ifdef __EMSCRIPTEN__ + // Setting this flag would render the web canvas outside of its bounds on high dpi screens + window_flags &= ~SDL_WINDOW_ALLOW_HIGHDPI; +#endif + video_reset(); + + int result = SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, quality); + result = SDL_SetHint(SDL_HINT_GRAB_KEYBOARD, "1"); // Grabs keyboard shortcuts from the system during window grab + result = SDL_CreateWindowAndRenderer(SCREEN_WIDTH * window_scale * screen_x_scale, SCREEN_HEIGHT * window_scale, window_flags, &window, &renderer); + if (result == -1) { + printf("error: %s\n", SDL_GetError()); + } +#ifndef __MORPHOS__ + SDL_SetWindowResizable(window, true); +#endif + SDL_RenderSetLogicalSize(renderer, SCREEN_WIDTH * screen_x_scale, SCREEN_HEIGHT); + + sdlTexture = SDL_CreateTexture(renderer, + SDL_PIXELFORMAT_RGB888, + SDL_TEXTUREACCESS_STREAMING, + SCREEN_WIDTH, SCREEN_HEIGHT); + SDL_SetWindowTitle(window, WINDOW_TITLE); + + // TODO bring this back when we have an icon + //SDL_SetWindowIcon(window, CommanderX16Icon()); + + if (fullscreen) { + is_fullscreen = true; + SDL_SetWindowFullscreen(window, SDL_WINDOW_FULLSCREEN); + } else { + int winX, winY; + SDL_GetWindowPosition(window, &winX, &winY); + if (winX < 0 || winY < APPROX_TITLEBAR_HEIGHT) { + winX = winX < 0 ? 0 : winX; + winY = winY < APPROX_TITLEBAR_HEIGHT ? APPROX_TITLEBAR_HEIGHT : winY; + SDL_SetWindowPosition(window, winX, winY); + } + } + SDL_SetWindowOpacity(window, opacity); + + // if (record_gif != RECORD_GIF_DISABLED) { + // if (!strcmp(gif_path+strlen(gif_path)-5, ",wait")) { + // // wait for POKE + // record_gif = RECORD_GIF_PAUSED; + // // move the string terminator to remove the ",wait" + // gif_path[strlen(gif_path)-5] = 0; + // } else { + // // start now + // record_gif = RECORD_GIF_ACTIVE; + // } + // if (!GifBegin(&gif_writer, gif_path, SCREEN_WIDTH, SCREEN_HEIGHT, 1, 8, false)) { + // record_gif = RECORD_GIF_DISABLED; + // } + // } + + if (grab_mouse && !mouse_grabbed) + mousegrab_toggle(); + + puts("returning from video_init()"); + + return true; +} + +struct video_layer_properties +{ + uint8_t color_depth; + uint32_t map_base; + uint32_t tile_base; + + bool text_mode; + bool text_mode_256c; + bool tile_mode; + bool bitmap_mode; + + uint16_t hscroll; + uint16_t vscroll; + + uint8_t mapw_log2; + uint8_t maph_log2; + uint16_t tilew; + uint16_t tileh; + uint8_t tilew_log2; + uint8_t tileh_log2; + + uint16_t mapw_max; + uint16_t maph_max; + uint16_t tilew_max; + uint16_t tileh_max; + uint16_t layerw_max; + uint16_t layerh_max; + + uint8_t tile_size_log2; + + int min_eff_x; + int max_eff_x; + + uint8_t bits_per_pixel; + uint8_t first_color_pos; + uint8_t color_mask; + uint8_t color_fields_max; +}; + +#define NUM_LAYERS 2 +struct video_layer_properties layer_properties[NUM_LAYERS]; +struct video_layer_properties prev_layer_properties[2][NUM_LAYERS]; + +static int +calc_layer_eff_x(const struct video_layer_properties *props, const int x) +{ + return (x + props->hscroll) & (props->layerw_max); +} + +static int +calc_layer_eff_y(const struct video_layer_properties *props, const int y) +{ + return (y + props->vscroll) & (props->layerh_max); +} + +static uint32_t +calc_layer_map_addr_base2(const struct video_layer_properties *props, const int eff_x, const int eff_y) +{ + // Slightly faster on some platforms because we know that tilew and tileh are powers of 2. + return props->map_base + ((((eff_y >> props->tileh_log2) << props->mapw_log2) + (eff_x >> props->tilew_log2)) << 1); +} + +static void +refresh_layer_properties(const uint8_t layer) +{ + struct video_layer_properties* props = &layer_properties[layer]; + + uint16_t prev_layerw_max = props->layerw_max; + uint16_t prev_hscroll = props->hscroll; + + props->color_depth = reg_layer[layer][0] & 0x3; + props->map_base = reg_layer[layer][1] << 9; + props->tile_base = (reg_layer[layer][2] & 0xFC) << 9; + props->bitmap_mode = (reg_layer[layer][0] & 0x4) != 0; + props->text_mode = (props->color_depth == 0) && !props->bitmap_mode; + props->text_mode_256c = (reg_layer[layer][0] & 8) != 0; + props->tile_mode = !props->bitmap_mode && !props->text_mode; + + if (!props->bitmap_mode) { + props->hscroll = reg_layer[layer][3] | (reg_layer[layer][4] & 0xf) << 8; + props->vscroll = reg_layer[layer][5] | (reg_layer[layer][6] & 0xf) << 8; + } else { + props->hscroll = 0; + props->vscroll = 0; + } + + uint16_t mapw = 0; + uint16_t maph = 0; + props->tilew = 0; + props->tileh = 0; + + if (props->tile_mode || props->text_mode) { + props->mapw_log2 = 5 + ((reg_layer[layer][0] >> 4) & 3); + props->maph_log2 = 5 + ((reg_layer[layer][0] >> 6) & 3); + mapw = 1 << props->mapw_log2; + maph = 1 << props->maph_log2; + + // Scale the tiles or text characters according to TILEW and TILEH. + props->tilew_log2 = 3 + (reg_layer[layer][2] & 1); + props->tileh_log2 = 3 + ((reg_layer[layer][2] >> 1) & 1); + props->tilew = 1 << props->tilew_log2; + props->tileh = 1 << props->tileh_log2; + } else if (props->bitmap_mode) { + // bitmap mode is basically tiled mode with a single huge tile + props->tilew = (reg_layer[layer][2] & 1) ? 640 : 320; + props->tileh = SCREEN_HEIGHT; + } + + // We know mapw, maph, tilew, and tileh are powers of two in all cases except bitmap modes, and any products of that set will be powers of two, + // so there's no need to modulo against them if we have bitmasks we can bitwise-and against. + + props->mapw_max = mapw - 1; + props->maph_max = maph - 1; + props->tilew_max = props->tilew - 1; + props->tileh_max = props->tileh - 1; + props->layerw_max = (mapw * props->tilew) - 1; + props->layerh_max = (maph * props->tileh) - 1; + + // Find min/max eff_x for bulk reading in tile data during draw. + if (prev_layerw_max != props->layerw_max || prev_hscroll != props->hscroll) { + int min_eff_x = INT_MAX; + int max_eff_x = INT_MIN; + for (int x = 0; x < SCREEN_WIDTH; ++x) { + int eff_x = calc_layer_eff_x(props, x); + if (eff_x < min_eff_x) { + min_eff_x = eff_x; + } + if (eff_x > max_eff_x) { + max_eff_x = eff_x; + } + } + props->min_eff_x = min_eff_x; + props->max_eff_x = max_eff_x; + } + + props->bits_per_pixel = 1 << props->color_depth; + props->tile_size_log2 = props->tilew_log2 + props->tileh_log2 + props->color_depth - 3; + + props->first_color_pos = 8 - props->bits_per_pixel; + props->color_mask = (1 << props->bits_per_pixel) - 1; + props->color_fields_max = (8 >> props->color_depth) - 1; +} + +struct video_sprite_properties +{ + int8_t sprite_zdepth; + uint8_t sprite_collision_mask; + + int16_t sprite_x; + int16_t sprite_y; + uint8_t sprite_width_log2; + uint8_t sprite_height_log2; + uint8_t sprite_width; + uint8_t sprite_height; + + bool hflip; + bool vflip; + + uint8_t color_mode; + uint32_t sprite_address; + + uint16_t palette_offset; +}; + +struct video_sprite_properties sprite_properties[128]; + +static void +refresh_sprite_properties(const uint16_t sprite) +{ + struct video_sprite_properties* props = &sprite_properties[sprite]; + + props->sprite_zdepth = (sprite_data[sprite][6] >> 2) & 3; + props->sprite_collision_mask = sprite_data[sprite][6] & 0xf0; + + props->sprite_x = sprite_data[sprite][2] | (sprite_data[sprite][3] & 3) << 8; + props->sprite_y = sprite_data[sprite][4] | (sprite_data[sprite][5] & 3) << 8; + props->sprite_width_log2 = (((sprite_data[sprite][7] >> 4) & 3) + 3); + props->sprite_height_log2 = ((sprite_data[sprite][7] >> 6) + 3); + props->sprite_width = 1 << props->sprite_width_log2; + props->sprite_height = 1 << props->sprite_height_log2; + + // fix up negative coordinates + if (props->sprite_x >= 0x400 - props->sprite_width) { + props->sprite_x -= 0x400; + } + if (props->sprite_y >= 0x400 - props->sprite_height) { + props->sprite_y -= 0x400; + } + + props->hflip = sprite_data[sprite][6] & 1; + props->vflip = (sprite_data[sprite][6] >> 1) & 1; + + props->color_mode = (sprite_data[sprite][1] >> 7) & 1; + props->sprite_address = sprite_data[sprite][0] << 5 | (sprite_data[sprite][1] & 0xf) << 13; + + props->palette_offset = (sprite_data[sprite][7] & 0x0f) << 4; +} + +struct video_palette +{ + uint32_t entries[256]; + bool dirty; +}; + +struct video_palette video_palette; + +static void +refresh_palette() { + const uint8_t out_mode = reg_composer[0] & 3; + + printf("refresh_palette() - out_mode is %d\n", out_mode); + + const bool chroma_disable = ((reg_composer[0] & 0x07) == 6); + for (int i = 0; i < 256; ++i) { + uint8_t r; + uint8_t g; + uint8_t b; + if (out_mode == 0) { + // video generation off + // -> show blue screen + r = 0; + g = 0; + b = 255; + } else { + uint16_t entry = palette[i * 2] | palette[i * 2 + 1] << 8; + r = ((entry >> 8) & 0xf) << 4 | ((entry >> 8) & 0xf); + g = ((entry >> 4) & 0xf) << 4 | ((entry >> 4) & 0xf); + b = (entry & 0xf) << 4 | (entry & 0xf); + if (chroma_disable) { + r = g = b = (r + b + g) / 3; + } + } + + video_palette.entries[i] = (uint32_t)(r << 16) | ((uint32_t)g << 8) | ((uint32_t)b); + } + video_palette.dirty = false; +} + +static void +expand_4bpp_data(uint8_t *dst, const uint8_t *src, int dst_size) +{ + while (dst_size >= 2) { + *dst = (*src) >> 4; + ++dst; + *dst = (*src) & 0xf; + ++dst; + + ++src; + dst_size -= 2; + } +} + +static void +render_sprite_line(const uint16_t y) +{ + memset(sprite_line_col, 0, SCREEN_WIDTH); + memset(sprite_line_z, 0, SCREEN_WIDTH); + memset(sprite_line_mask, 0, SCREEN_WIDTH); + + uint16_t sprite_budget = 800 + 1; + for (int i = 0; i < NUM_SPRITES; i++) { + // one clock per lookup + sprite_budget--; if (sprite_budget == 0) break; + const struct video_sprite_properties *props = &sprite_properties[i]; + + if (props->sprite_zdepth == 0) { + continue; + } + + // check whether this line falls within the sprite + if (y < props->sprite_y || y >= props->sprite_y + props->sprite_height) { + continue; + } + + const uint16_t eff_sy = props->vflip ? ((props->sprite_height - 1) - (y - props->sprite_y)) : (y - props->sprite_y); + + int16_t eff_sx = (props->hflip ? (props->sprite_width - 1) : 0); + const int16_t eff_sx_incr = props->hflip ? -1 : 1; + + const uint8_t *bitmap_data = video_ram + props->sprite_address + (eff_sy << (props->sprite_width_log2 - (1 - props->color_mode))); + + uint8_t unpacked_sprite_line[64]; + const uint16_t width = (props->sprite_width<64? props->sprite_width : 64); + if (props->color_mode == 0) { + // 4bpp + expand_4bpp_data(unpacked_sprite_line, bitmap_data, width); + } else { + // 8bpp + memcpy(unpacked_sprite_line, bitmap_data, width); + } + + for (uint16_t sx = 0; sx < props->sprite_width; ++sx) { + const uint16_t line_x = props->sprite_x + sx; + if (line_x >= SCREEN_WIDTH) { + eff_sx += eff_sx_incr; + continue; + } + + // one clock per fetched 32 bits + if (!(sx & 3)) { + sprite_budget--; if (sprite_budget == 0) break; + } + + // one clock per rendered pixel + sprite_budget--; if (sprite_budget == 0) break; + + const uint8_t col_index = unpacked_sprite_line[eff_sx]; + eff_sx += eff_sx_incr; + + // palette offset + if (col_index > 0) { + sprite_line_collisions |= sprite_line_mask[line_x] & props->sprite_collision_mask; + sprite_line_mask[line_x] |= props->sprite_collision_mask; + + if (props->sprite_zdepth > sprite_line_z[line_x]) { + sprite_line_col[line_x] = col_index + props->palette_offset; + sprite_line_z[line_x] = props->sprite_zdepth; + } + } + } + } +} + +static void +render_layer_line_text(uint8_t layer, uint16_t y) +{ + const struct video_layer_properties *props = &prev_layer_properties[1][layer]; + const struct video_layer_properties *props0 = &prev_layer_properties[0][layer]; + + const uint8_t max_pixels_per_byte = (8 >> props->color_depth) - 1; + const int eff_y = calc_layer_eff_y(props0, y); + const int yy = eff_y & props->tileh_max; + + // additional bytes to reach the correct line of the tile + const uint32_t y_add = (yy << props->tilew_log2) >> 3; + + const uint32_t map_addr_begin = calc_layer_map_addr_base2(props, props->min_eff_x, eff_y); + const uint32_t map_addr_end = calc_layer_map_addr_base2(props, props->max_eff_x, eff_y); + const int size = (map_addr_end - map_addr_begin) + 2; + + uint8_t tile_bytes[512]; // max 256 tiles, 2 bytes each. + video_space_read_range(tile_bytes, map_addr_begin, size); + + uint32_t tile_start; + + uint8_t fg_color; + uint8_t bg_color; + uint8_t s; + uint8_t color_shift; + + { + const int eff_x = calc_layer_eff_x(props, 0); + const int xx = eff_x & props->tilew_max; + + // extract all information from the map + const uint32_t map_addr = calc_layer_map_addr_base2(props, eff_x, eff_y) - map_addr_begin; + + const uint8_t tile_index = tile_bytes[map_addr]; + const uint8_t byte1 = tile_bytes[map_addr + 1]; + + if (!props->text_mode_256c) { + fg_color = byte1 & 15; + bg_color = byte1 >> 4; + } else { + fg_color = byte1; + bg_color = 0; + } + + // offset within tilemap of the current tile + tile_start = tile_index << props->tile_size_log2; + + // additional bytes to reach the correct column of the tile + const uint16_t x_add = xx >> 3; + const uint32_t tile_offset = tile_start + y_add + x_add; + + s = video_space_read(props->tile_base + tile_offset); + color_shift = max_pixels_per_byte - (xx & 0x7); + } + + // Render tile line. + for (int x = 0; x < SCREEN_WIDTH; x++) { + // Scrolling + const int eff_x = calc_layer_eff_x(props, x); + const int xx = eff_x & props->tilew_max; + + if ((eff_x & 0x7) == 0) { + if ((eff_x & props->tilew_max) == 0) { + // extract all information from the map + const uint32_t map_addr = calc_layer_map_addr_base2(props, eff_x, eff_y) - map_addr_begin; + + const uint8_t tile_index = tile_bytes[map_addr]; + const uint8_t byte1 = tile_bytes[map_addr + 1]; + + if (!props->text_mode_256c) { + fg_color = byte1 & 15; + bg_color = byte1 >> 4; + } else { + fg_color = byte1; + bg_color = 0; + } + + // offset within tilemap of the current tile + tile_start = tile_index << props->tile_size_log2; + } + + // additional bytes to reach the correct column of the tile + const uint16_t x_add = xx >> 3; + const uint32_t tile_offset = tile_start + y_add + x_add; + + s = video_space_read(props->tile_base + tile_offset); + color_shift = max_pixels_per_byte; + } + + // convert tile byte to indexed color + const uint8_t col_index = (s >> color_shift) & 1; + --color_shift; + layer_line[layer][x] = col_index ? fg_color : bg_color; + } +} + +static void +render_layer_line_tile(uint8_t layer, uint16_t y) +{ + const struct video_layer_properties *props = &prev_layer_properties[1][layer]; + const struct video_layer_properties *props0 = &prev_layer_properties[0][layer]; + + const uint8_t max_pixels_per_byte = (8 >> props->color_depth) - 1; + const int eff_y = calc_layer_eff_y(props0, y); + const uint8_t yy = eff_y & props->tileh_max; + const uint8_t yy_flip = yy ^ props->tileh_max; + const uint32_t y_add = (yy << (props->tilew_log2 + props->color_depth - 3)); + const uint32_t y_add_flip = (yy_flip << (props->tilew_log2 + props->color_depth - 3)); + + const uint32_t map_addr_begin = calc_layer_map_addr_base2(props, props->min_eff_x, eff_y); + const uint32_t map_addr_end = calc_layer_map_addr_base2(props, props->max_eff_x, eff_y); + const int size = (map_addr_end - map_addr_begin) + 2; + + uint8_t tile_bytes[512]; // max 256 tiles, 2 bytes each. + video_space_read_range(tile_bytes, map_addr_begin, size); + + uint8_t palette_offset; + bool vflip; + bool hflip; + uint32_t tile_start; + uint8_t s; + uint8_t color_shift; + int8_t color_shift_incr; + + { + const int eff_x = calc_layer_eff_x(props, 0); + + // extract all information from the map + const uint32_t map_addr = calc_layer_map_addr_base2(props, eff_x, eff_y) - map_addr_begin; + + const uint8_t byte0 = tile_bytes[map_addr]; + const uint8_t byte1 = tile_bytes[map_addr + 1]; + + // Tile Flipping + vflip = (byte1 >> 3) & 1; + hflip = (byte1 >> 2) & 1; + + palette_offset = byte1 & 0xf0; + + // offset within tilemap of the current tile + const uint16_t tile_index = byte0 | ((byte1 & 3) << 8); + tile_start = tile_index << props->tile_size_log2; + + color_shift_incr = hflip ? props->bits_per_pixel : -props->bits_per_pixel; + + int xx = eff_x & props->tilew_max; + if (hflip) { + xx = xx ^ (props->tilew_max); + color_shift = 0; + } else { + color_shift = props->first_color_pos; + } + + // additional bytes to reach the correct column of the tile + uint16_t x_add = (xx << props->color_depth) >> 3; + uint32_t tile_offset = tile_start + (vflip ? y_add_flip : y_add) + x_add; + + s = video_space_read(props->tile_base + tile_offset); + } + + + // Render tile line. + for (int x = 0; x < SCREEN_WIDTH; x++) { + const int eff_x = calc_layer_eff_x(props, x); + + if ((eff_x & max_pixels_per_byte) == 0) { + if ((eff_x & props->tilew_max) == 0) { + // extract all information from the map + const uint32_t map_addr = calc_layer_map_addr_base2(props, eff_x, eff_y) - map_addr_begin; + + const uint8_t byte0 = tile_bytes[map_addr]; + const uint8_t byte1 = tile_bytes[map_addr + 1]; + + // Tile Flipping + vflip = (byte1 >> 3) & 1; + hflip = (byte1 >> 2) & 1; + + palette_offset = byte1 & 0xf0; + + // offset within tilemap of the current tile + const uint16_t tile_index = byte0 | ((byte1 & 3) << 8); + tile_start = tile_index << props->tile_size_log2; + + color_shift_incr = hflip ? props->bits_per_pixel : -props->bits_per_pixel; + } + + int xx = eff_x & props->tilew_max; + if (hflip) { + xx = xx ^ (props->tilew_max); + color_shift = 0; + } else { + color_shift = props->first_color_pos; + } + + // additional bytes to reach the correct column of the tile + const uint16_t x_add = (xx << props->color_depth) >> 3; + const uint32_t tile_offset = tile_start + (vflip ? y_add_flip : y_add) + x_add; + + s = video_space_read(props->tile_base + tile_offset); + } + + // convert tile byte to indexed color + uint8_t col_index = (s >> color_shift) & props->color_mask; + color_shift += color_shift_incr; + + // Apply Palette Offset + if (col_index > 0 && col_index < 16) { + col_index += palette_offset; + if (props->text_mode_256c) { + col_index |= 0x80; + } + } + layer_line[layer][x] = col_index; + } +} + + +static void +render_layer_line_bitmap(uint8_t layer, uint16_t y) +{ + const struct video_layer_properties *props = &prev_layer_properties[1][layer]; +// const struct video_layer_properties *props0 = &prev_layer_properties[0][layer]; + + int yy = y % props->tileh; + // additional bytes to reach the correct line of the tile + uint32_t y_add = (yy * props->tilew * props->bits_per_pixel) >> 3; + + // Render tile line. + for (int x = 0; x < SCREEN_WIDTH; x++) { + int xx = x % props->tilew; + + // extract all information from the map + uint8_t palette_offset = reg_layer[layer][4] & 0xf; + + // additional bytes to reach the correct column of the tile + uint16_t x_add = (xx * props->bits_per_pixel) >> 3; + uint32_t tile_offset = y_add + x_add; + uint8_t s = video_space_read(props->tile_base + tile_offset); + + // convert tile byte to indexed color + uint8_t col_index = (s >> (props->first_color_pos - ((xx & props->color_fields_max) << props->color_depth))) & props->color_mask; + + // Apply Palette Offset + if (col_index > 0 && col_index < 16) { + col_index += palette_offset << 4; + if (props->text_mode_256c) { + col_index |= 0x80; + } + } + layer_line[layer][x] = col_index; + } +} + +static uint8_t calculate_line_col_index(uint8_t spr_zindex, uint8_t spr_col_index, uint8_t l1_col_index, uint8_t l2_col_index) +{ + uint8_t col_index = 0; + switch (spr_zindex) { + case 3: + col_index = spr_col_index ? spr_col_index : (l2_col_index ? l2_col_index : l1_col_index); + break; + case 2: + col_index = l2_col_index ? l2_col_index : (spr_col_index ? spr_col_index : l1_col_index); + break; + case 1: + col_index = l2_col_index ? l2_col_index : (l1_col_index ? l1_col_index : spr_col_index); + break; + case 0: + col_index = l2_col_index ? l2_col_index : l1_col_index; + break; + } + return col_index; +} + +static void +render_line(uint16_t y, float scan_pos_x) +{ + static uint16_t y_prev; + static uint16_t s_pos_x_p; + static uint32_t eff_y_fp; // 16.16 fixed point + static uint32_t eff_x_fp; // 16.16 fixed point + + static uint8_t col_line[SCREEN_WIDTH]; + + uint8_t dc_video = reg_composer[0]; + uint16_t vstart = reg_composer[6] << 1; + + if (y != y_prev) { + y_prev = y; + s_pos_x_p = 0; + + // Copy the composer array to 2-line history buffer + // so that the raster effects that happen on a delay take effect + // at exactly the right time + + // This simulates different effects happening at render, + // render but delayed until the next line, or applied mid-line + // at scan-out + + memcpy(prev_reg_composer[1], prev_reg_composer[0], sizeof(*reg_composer) * COMPOSER_SLOTS); + memcpy(prev_reg_composer[0], reg_composer, sizeof(*reg_composer) * COMPOSER_SLOTS); + + // Same with the layer properties + + memcpy(prev_layer_properties[1], prev_layer_properties[0], sizeof(*layer_properties) * NUM_LAYERS); + memcpy(prev_layer_properties[0], layer_properties, sizeof(*layer_properties) * NUM_LAYERS); + + if ((dc_video & 3) > 1) { // 480i or 240p + if ((y >> 1) == 0) { + eff_y_fp = y*(prev_reg_composer[1][2] << 9); + } else if ((y & 0xfffe) > vstart) { + eff_y_fp += (prev_reg_composer[1][2] << 10); + } + } else { + if (y == 0) { + eff_y_fp = 0; + } else if (y > vstart) { + eff_y_fp += (prev_reg_composer[1][2] << 9); + } + } + } + + if ((dc_video & 8) && (dc_video & 3) > 1) { // progressive NTSC/RGB mode + y &= 0xfffe; + } + + // refresh palette for next entry + if (video_palette.dirty) { + refresh_palette(); + } + + if (y >= SCREEN_HEIGHT) { + return; + } + + uint16_t s_pos_x = round(scan_pos_x); + if (s_pos_x > SCREEN_WIDTH) { + s_pos_x = SCREEN_WIDTH; + } + + if (s_pos_x_p == 0) { + eff_x_fp = 0; + } + + uint8_t out_mode = reg_composer[0] & 3; + + uint8_t border_color = reg_composer[3]; + uint16_t hstart = reg_composer[4] << 2; + uint16_t hstop = reg_composer[5] << 2; + uint16_t vstop = reg_composer[7] << 1; + + uint16_t eff_y = (eff_y_fp >> 16); + + layer_line_enable[0] = dc_video & 0x10; + layer_line_enable[1] = dc_video & 0x20; + sprite_line_enable = dc_video & 0x40; + + // clear layer_line if layer gets disabled + for (uint8_t layer = 0; layer < 2; layer++) { + if (!layer_line_enable[layer] && old_layer_line_enable[layer]) { + for (uint16_t i = s_pos_x_p; i < SCREEN_WIDTH; i++) { + layer_line[layer][i] = 0; + } + } + if (s_pos_x_p == 0) + old_layer_line_enable[layer] = layer_line_enable[layer]; + } + + // clear sprite_line if sprites get disabled + if (!sprite_line_enable && old_sprite_line_enable) { + for (uint16_t i = s_pos_x_p; i < SCREEN_WIDTH; i++) { + sprite_line_col[i] = 0; + sprite_line_z[i] = 0; + sprite_line_mask[i] = 0; + } + } + + if (s_pos_x_p == 0) + old_sprite_line_enable = sprite_line_enable; + + + + if (sprite_line_enable) { + render_sprite_line(eff_y); + } + + if (warp_mode && (frame_count & 63)) { + // sprites were needed for the collision IRQ, but we can skip + // everything else if we're in warp mode, most of the time + return; + } + + if (layer_line_enable[0]) { + if (prev_layer_properties[1][0].text_mode) { + render_layer_line_text(0, eff_y); + } else if (prev_layer_properties[1][0].bitmap_mode) { + render_layer_line_bitmap(0, eff_y); + } else { + render_layer_line_tile(0, eff_y); + } + } + if (layer_line_enable[1]) { + if (prev_layer_properties[1][1].text_mode) { + render_layer_line_text(1, eff_y); + } else if (prev_layer_properties[1][1].bitmap_mode) { + render_layer_line_bitmap(1, eff_y); + } else { + render_layer_line_tile(1, eff_y); + } + } + + // If video output is enabled, calculate color indices for line. + if (out_mode != 0) { + // Add border after if required. + if (y < vstart || y > vstop) { + uint32_t border_fill = border_color; + border_fill = border_fill | (border_fill << 8); + border_fill = border_fill | (border_fill << 16); + memset(col_line, border_fill, SCREEN_WIDTH); + } else { + hstart = hstart < 640 ? hstart : 640; + hstop = hstop < 640 ? hstop : 640; + + for (uint16_t x = s_pos_x_p; x < hstart && x < s_pos_x; ++x) { + col_line[x] = border_color; + } + + const uint32_t scale = reg_composer[1]; + for (uint16_t x = MAX(hstart, s_pos_x_p); x < hstop && x < s_pos_x; ++x) { + uint16_t eff_x = eff_x_fp >> 16; + col_line[x] = calculate_line_col_index(sprite_line_z[eff_x], sprite_line_col[eff_x], layer_line[0][eff_x], layer_line[1][eff_x]); + eff_x_fp += (scale << 9); + } + for (uint16_t x = hstop; x < s_pos_x; ++x) { + col_line[x] = border_color; + } + } + } + + // Look up all color indices. + uint32_t* framebuffer4_begin = ((uint32_t*)framebuffer) + (y * SCREEN_WIDTH) + s_pos_x_p; + { + uint32_t* framebuffer4 = framebuffer4_begin; + for (uint16_t x = s_pos_x_p; x < s_pos_x; x++) { + *framebuffer4++ = video_palette.entries[col_line[x]]; + } + } + + // NTSC overscan + if (out_mode == 2) { + uint32_t* framebuffer4 = framebuffer4_begin; + for (uint16_t x = s_pos_x_p; x < s_pos_x; x++) + { + if (x < SCREEN_WIDTH * TITLE_SAFE_X || + x > SCREEN_WIDTH * (1 - TITLE_SAFE_X) || + y < SCREEN_HEIGHT * TITLE_SAFE_Y || + y > SCREEN_HEIGHT * (1 - TITLE_SAFE_Y)) { + + // Divide RGB elements by 4. + *framebuffer4 &= 0x00fcfcfc; + *framebuffer4 >>= 2; + } + framebuffer4++; + } + } + + s_pos_x_p = s_pos_x; +} + +static void +update_isr_and_coll(uint16_t y, uint16_t compare) +{ + if (y == SCREEN_HEIGHT) { + if (sprite_line_collisions != 0) { + isr |= 4; + } + isr = (isr & 0xf) | sprite_line_collisions; + sprite_line_collisions = 0; + isr |= 1; // VSYNC IRQ + } + if (y == compare) { // LINE IRQ + isr |= 2; + } +} + +// _video_step() used to be video_step(), but it was too linked to the CPU. +// now calling a new video_step() on a 60hz frequency instead. + +bool +_video_step(float mhz, float steps, bool midline) +{ + uint16_t y = 0; + bool ntsc_mode = reg_composer[0] & 2; + bool new_frame = false; + vga_scan_pos_x += PIXEL_FREQ * steps / mhz; + if (vga_scan_pos_x > VGA_SCAN_WIDTH) { + vga_scan_pos_x -= VGA_SCAN_WIDTH; + if (!ntsc_mode) { + render_line(vga_scan_pos_y - VGA_Y_OFFSET, VGA_SCAN_WIDTH); + } + vga_scan_pos_y++; + if (vga_scan_pos_y == SCAN_HEIGHT) { + vga_scan_pos_y = 0; + if (!ntsc_mode) { + new_frame = true; + frame_count++; + } + } + if (!ntsc_mode) { + update_isr_and_coll(vga_scan_pos_y - VGA_Y_OFFSET, irq_line); + } + } else if (midline) { + if (!ntsc_mode) { + render_line(vga_scan_pos_y - VGA_Y_OFFSET, vga_scan_pos_x); + } + } + ntsc_half_cnt += PIXEL_FREQ * steps / mhz; + if (ntsc_half_cnt > NTSC_HALF_SCAN_WIDTH) { + ntsc_half_cnt -= NTSC_HALF_SCAN_WIDTH; + if (ntsc_mode) { + if (ntsc_scan_pos_y < SCAN_HEIGHT) { + y = ntsc_scan_pos_y - NTSC_Y_OFFSET_LOW; + if ((y & 1) == 0) { + render_line(y, NTSC_HALF_SCAN_WIDTH); + } + } else { + y = ntsc_scan_pos_y - NTSC_Y_OFFSET_HIGH; + if ((y & 1) == 0) { + render_line(y | 1, NTSC_HALF_SCAN_WIDTH); + } + } + } + ntsc_scan_pos_y++; + if (ntsc_scan_pos_y == SCAN_HEIGHT) { + reg_composer[0] |= 0x80; + if (ntsc_mode) { + new_frame = true; + frame_count++; + } + } + if (ntsc_scan_pos_y == SCAN_HEIGHT*2) { + reg_composer[0] &= ~0x80; + ntsc_scan_pos_y = 0; + if (ntsc_mode) { + new_frame = true; + frame_count++; + } + } + if (ntsc_mode) { + // this is correct enough for even screen heights + if (ntsc_scan_pos_y < SCAN_HEIGHT) { + update_isr_and_coll(ntsc_scan_pos_y - NTSC_Y_OFFSET_LOW, irq_line & ~1); + } else { + update_isr_and_coll(ntsc_scan_pos_y - NTSC_Y_OFFSET_HIGH, irq_line & ~1); + } + } + } else if (midline) { + if (ntsc_mode) { + if (ntsc_scan_pos_y < SCAN_HEIGHT) { + y = ntsc_scan_pos_y - NTSC_Y_OFFSET_LOW; + if ((y & 1) == 0) { + render_line(y, ntsc_half_cnt); + } + } else { + y = ntsc_scan_pos_y - NTSC_Y_OFFSET_HIGH; + if ((y & 1) == 0) { + render_line(y | 1, ntsc_half_cnt); + } + } + } + } + + return new_frame; +} + +// new video_step() does an entire frame at a time. +// todo: eventually remove steps/midline params. +bool video_step(float mhz, float steps, bool midline) +{ + for (int y = 0; y < 480; y++) { + for (int x = 0; x < 640; x++) { + _video_step(mhz, 1, midline); + } + } + + return true; +} + +bool +video_get_irq_out() +{ + // TODO pcm stuff will need to come back + //uint8_t tmp_isr = isr | (pcm_is_fifo_almost_empty() ? 8 : 0); + uint8_t tmp_isr = isr; + return (tmp_isr & ien) != 0; +} + +// +// saves the video memory and register content into a file +// + +void +video_save(SDL_RWops *f) +{ + SDL_RWwrite(f, &video_ram[0], sizeof(uint8_t), sizeof(video_ram)); + SDL_RWwrite(f, ®_composer[0], sizeof(uint8_t), sizeof(reg_composer)); + SDL_RWwrite(f, &palette[0], sizeof(uint8_t), sizeof(palette)); + SDL_RWwrite(f, ®_layer[0][0], sizeof(uint8_t), sizeof(reg_layer)); + SDL_RWwrite(f, &sprite_data[0], sizeof(uint8_t), sizeof(sprite_data)); +} + +void +video_update() +{ + static bool cmd_down = false; + bool mouse_changed = false; + + // for activity LED, overlay red 8x4 square into top right of framebuffer + // for progressive modes, draw LED only on even scanlines + for (int y = 0; y < 4; y+=1+!!((reg_composer[0] & 0x0b) > 0x09)) { + for (int x = SCREEN_WIDTH - 8; x < SCREEN_WIDTH; x++) { + uint8_t b = framebuffer[(y * SCREEN_WIDTH + x) * 4 + 0]; + uint8_t g = framebuffer[(y * SCREEN_WIDTH + x) * 4 + 1]; + uint8_t r = framebuffer[(y * SCREEN_WIDTH + x) * 4 + 2]; + r = (uint32_t)r * (255 - activity_led) / 255 + activity_led; + g = (uint32_t)g * (255 - activity_led) / 255; + b = (uint32_t)b * (255 - activity_led) / 255; + framebuffer[(y * SCREEN_WIDTH + x) * 4 + 0] = b; + framebuffer[(y * SCREEN_WIDTH + x) * 4 + 1] = g; + framebuffer[(y * SCREEN_WIDTH + x) * 4 + 2] = r; + framebuffer[(y * SCREEN_WIDTH + x) * 4 + 3] = 0x00; + } + } + + SDL_UpdateTexture(sdlTexture, NULL, framebuffer, SCREEN_WIDTH * 4); + SDL_RenderClear(renderer); + SDL_RenderCopy(renderer, sdlTexture, NULL, NULL); + SDL_RenderPresent(renderer); +} + +void +video_end() +{ + // if (debugger_enabled) { + // DEBUGFreeUI(); + // } + + // if (record_gif != RECORD_GIF_DISABLED) { + // GifEnd(&gif_writer); + // record_gif = RECORD_GIF_DISABLED; + // } + + is_fullscreen = false; + SDL_SetWindowFullscreen(window, 0); + SDL_DestroyRenderer(renderer); + SDL_DestroyWindow(window); +} + + +static const int increments[32] = { + 0, 0, + 1, -1, + 2, -2, + 4, -4, + 8, -8, + 16, -16, + 32, -32, + 64, -64, + 128, -128, + 256, -256, + 512, -512, + 40, -40, + 80, -80, + 160, -160, + 320, -320, + 640, -640, +}; + +uint32_t +video_get_address(uint8_t sel) +{ + uint32_t address = io_addr[sel]; + return address; +} + +uint32_t +get_and_inc_address(uint8_t sel, bool write) +{ + uint32_t address = io_addr[sel]; + int16_t incr = increments[io_inc[sel]]; + + if (fx_4bit_mode && fx_nibble_incr[sel] && !incr) { + if (fx_nibble_bit[sel]) { + if ((io_inc[sel] & 1) == 0) io_addr[sel] += 1; + fx_nibble_bit[sel] = 0; + } else { + if (io_inc[sel] & 1) io_addr[sel] -= 1; + fx_nibble_bit[sel] = 1; + } + } + + if (sel == 1 && fx_16bit_hop) { + if (incr == 4) { + if (fx_16bit_hop_align == (address & 0x3)) + incr = 1; + else + incr = 3; + } else if (incr == 320) { + if (fx_16bit_hop_align == (address & 0x3)) + incr = 1; + else + incr = 319; + } + } + + io_addr[sel] += incr; + + if (sel == 1 && fx_addr1_mode == 1) { // FX line draw mode + fx_x_pixel_position += fx_x_pixel_increment; + if (fx_x_pixel_position & 0x10000) { + fx_x_pixel_position &= ~0x10000; + if (fx_4bit_mode && fx_nibble_incr[0]) { + if (fx_nibble_bit[1]) { + if ((io_inc[0] & 1) == 0) io_addr[1] += 1; + fx_nibble_bit[1] = 0; + } else { + if (io_inc[0] & 1) io_addr[1] -= 1; + fx_nibble_bit[1] = 1; + } + } + io_addr[1] += increments[io_inc[0]]; + } + } else if (fx_addr1_mode == 2 && write == false) { // FX polygon fill mode + fx_x_pixel_position += fx_x_pixel_increment; + fx_y_pixel_position += fx_y_pixel_increment; + fx_poly_fill_length = ((int32_t) fx_y_pixel_position >> 16) - ((int32_t) fx_x_pixel_position >> 16); + if (sel == 0 && fx_cache_byte_cycling && !fx_cache_fill) { + fx_cache_byte_index = (fx_cache_byte_index + 1) & 3; + } + if (sel == 1) { + if (fx_4bit_mode) { + io_addr[1] = io_addr[0] + (fx_x_pixel_position >> 17); + fx_nibble_bit[1] = (fx_x_pixel_position >> 16) & 1; + } else { + io_addr[1] = io_addr[0] + (fx_x_pixel_position >> 16); + } + } + } else if (sel == 1 && fx_addr1_mode == 3 && write == false) { // FX affine mode + fx_x_pixel_position += fx_x_pixel_increment; + fx_y_pixel_position += fx_y_pixel_increment; + } + return address; +} + +void +fx_affine_prefetch(void) +{ + if (fx_addr1_mode != 3) return; // only if affine mode is selected + + uint32_t address; + uint8_t affine_x_tile = (fx_x_pixel_position >> 19) & 0xff; + uint8_t affine_y_tile = (fx_y_pixel_position >> 19) & 0xff; + uint8_t affine_x_sub_tile = (fx_x_pixel_position >> 16) & 0x07; + uint8_t affine_y_sub_tile = (fx_y_pixel_position >> 16) & 0x07; + + if (!fx_affine_clip) { // wrap + affine_x_tile &= fx_affine_map_size - 1; + affine_y_tile &= fx_affine_map_size - 1; + } + + if (affine_x_tile >= fx_affine_map_size || affine_y_tile >= fx_affine_map_size) { + // We clipped, return value for tile 0 + address = fx_affine_tile_base + (affine_y_sub_tile << (3 - fx_4bit_mode)) + (affine_x_sub_tile >> (uint8_t)fx_4bit_mode); + if (fx_4bit_mode) fx_nibble_bit[1] = 0; + } else { + // Get the address within the tile map + address = fx_affine_map_base + (affine_y_tile * fx_affine_map_size) + affine_x_tile; + // Now translate that to the tile base address + uint8_t affine_tile_idx = video_space_read(address); + address = fx_affine_tile_base + (affine_tile_idx << (6 - fx_4bit_mode)); + // Now add the sub-tile address + address += (affine_y_sub_tile << (3 - fx_4bit_mode)) + (affine_x_sub_tile >> (uint8_t)fx_4bit_mode); + if (fx_4bit_mode) fx_nibble_bit[1] = affine_x_sub_tile & 1; + } + io_addr[1] = address; + io_rddata[1] = video_space_read(address); +} + +// +// Vera: Internal Video Address Space +// + +uint8_t +video_space_read(uint32_t address) +{ + return video_ram[address & 0x1FFFF]; +} + +static void +video_space_read_range(uint8_t* dest, uint32_t address, uint32_t size) +{ + if (address >= ADDR_VRAM_START && (address+size) <= ADDR_VRAM_END) { + memcpy(dest, &video_ram[address], size); + } else { + for(int i = 0; i < size; ++i) { + *dest++ = video_space_read(address + i); + } + } +} + +void +video_space_write(uint32_t address, uint8_t value) +{ + video_ram[address & 0x1FFFF] = value; + + if (address >= ADDR_PSG_START && address < ADDR_PSG_END) { + // TODO bring this back + //audio_render(); + //psg_writereg(address & 0x3f, value); + } else if (address >= ADDR_PALETTE_START && address < ADDR_PALETTE_END) { + palette[address & 0x1ff] = value; + video_palette.dirty = true; + } else if (address >= ADDR_SPRDATA_START && address < ADDR_SPRDATA_END) { + sprite_data[(address >> 3) & 0x7f][address & 0x7] = value; + refresh_sprite_properties((address >> 3) & 0x7f); + } +} + + +void +fx_video_space_write(uint32_t address, bool nibble, uint8_t value) +{ + if (fx_4bit_mode) { + if (nibble) { + if (!fx_trans_writes || (value & 0x0f) > 0) { + video_ram[address & 0x1FFFF] = (video_ram[address & 0x1FFFF] & 0xf0) | (value & 0x0f); + } + } else { + if (!fx_trans_writes || (value & 0xf0) > 0) { + video_ram[address & 0x1FFFF] = (video_ram[address & 0x1FFFF] & 0x0f) | (value & 0xf0); + } + } + } else { + if (!fx_trans_writes || value > 0) video_ram[address & 0x1FFFF] = value; + } + if (address >= ADDR_PSG_START && address < ADDR_PSG_END) { + // TODO bring this back + // audio_render(); + // psg_writereg(address & 0x3f, value); + } else if (address >= ADDR_PALETTE_START && address < ADDR_PALETTE_END) { + palette[address & 0x1ff] = value; + video_palette.dirty = true; + } else if (address >= ADDR_SPRDATA_START && address < ADDR_SPRDATA_END) { + sprite_data[(address >> 3) & 0x7f][address & 0x7] = value; + refresh_sprite_properties((address >> 3) & 0x7f); + } +} + +void +fx_vram_cache_write(uint32_t address, uint8_t value, uint8_t mask) +{ + if (!fx_trans_writes || value > 0) { + switch (mask) { + case 0: + video_ram[address & 0x1FFFF] = value; + break; + case 1: + video_ram[address & 0x1FFFF] = (video_ram[address & 0x1FFFF] & 0x0f) | (value & 0xf0); + break; + case 2: + video_ram[address & 0x1FFFF] = (video_ram[address & 0x1FFFF] & 0xf0) | (value & 0x0f); + break; + case 3: + // Do nothing + break; + } + } +} + + +// +// Vera: 6502 I/O Interface +// +// if debugOn, read without any side effects (registers & memory unchanged) + +uint8_t video_read(uint8_t reg, bool debugOn) { + bool ntsc_mode = reg_composer[0] & 2; + uint16_t scanline = ntsc_mode ? ntsc_scan_pos_y % SCAN_HEIGHT : vga_scan_pos_y; + if (scanline >= 512) scanline=511; + + switch (reg & 0x1F) { + case 0x00: return io_addr[io_addrsel] & 0xff; + case 0x01: return (io_addr[io_addrsel] >> 8) & 0xff; + case 0x02: return (io_addr[io_addrsel] >> 16) | (fx_nibble_bit[io_addrsel] << 1) | (fx_nibble_incr[io_addrsel] << 2) | (io_inc[io_addrsel] << 3); + case 0x03: + case 0x04: { + if (debugOn) { + return io_rddata[reg - 3]; + } + + //bool nibble = fx_nibble_bit[reg - 3]; + uint32_t address = get_and_inc_address(reg - 3, false); + + uint8_t value = io_rddata[reg - 3]; + + if (reg == 4 && fx_addr1_mode == 3) + fx_affine_prefetch(); + else + io_rddata[reg - 3] = video_space_read(io_addr[reg - 3]); + + if (fx_cache_fill) { + if (fx_4bit_mode) { + if (fx_cache_nibble_index) { + fx_cache[fx_cache_byte_index] = (fx_cache[fx_cache_byte_index] & 0xf0) | (value & 0x0f); + fx_cache_nibble_index = 0; + fx_cache_byte_index = ((fx_cache_byte_index + 1) & 0x3); + } else { + fx_cache[fx_cache_byte_index] = (fx_cache[fx_cache_byte_index] & 0x0f) | (value & 0xf0); + fx_cache_nibble_index = 1; + } + } else { + fx_cache[fx_cache_byte_index] = value; + if (fx_cache_increment_mode) + fx_cache_byte_index = (fx_cache_byte_index & 0x2) | ((fx_cache_byte_index + 1) & 0x1); + else + fx_cache_byte_index = ((fx_cache_byte_index + 1) & 0x3); + } + } + + // if (log_video) { + // printf("READ video_space[$%X] = $%02X\n", address, value); + // } + return value; + } + case 0x05: return (io_dcsel << 1) | io_addrsel; + case 0x06: return ((irq_line & 0x100) >> 1) | ((scanline & 0x100) >> 2) | (ien & 0xF); + case 0x07: return isr; // | (pcm_is_fifo_almost_empty() ? 8 : 0); // TODO bring back + case 0x08: return scanline & 0xFF; + + case 0x09: + case 0x0A: + case 0x0B: + case 0x0C: { + int i = reg - 0x09 + (io_dcsel << 2); + switch (i) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + case 0x07: + case 0x08: + // DCSEL = [0,1] with any composer register, or [2] at $9f29 + return reg_composer[i]; + break; + case 0x16: // DCSEL=5, 0x9F2B + if (fx_poly_fill_length >= 768) { + return ((fx_2bit_poly && fx_addr1_mode == 2) ? 0x00 : 0x80); + } + if (fx_4bit_mode) { + if (fx_2bit_poly && fx_addr1_mode == 2) { + return ((fx_y_pixel_position & 0x00008000) >> 8) | + ((fx_x_pixel_position >> 11) & 0x60) | + ((fx_x_pixel_position >> 14) & 0x10) | + ((fx_poly_fill_length & 0x0007) << 1) | + ((fx_x_pixel_position & 0x00008000) >> 15); + } else { + return ((!!(fx_poly_fill_length & 0xfff8)) << 7) | + ((fx_x_pixel_position >> 11) & 0x60) | + ((fx_x_pixel_position >> 14) & 0x10) | + ((fx_poly_fill_length & 0x0007) << 1); + } + } else { + return ((!!(fx_poly_fill_length & 0xfff0)) << 7) | + ((fx_x_pixel_position >> 11) & 0x60) | + ((fx_poly_fill_length & 0x000f) << 1); + } + break; + case 0x17: // DCSEL=5, 0x9F2C + return ((fx_poly_fill_length & 0x03f8) >> 2); + break; + case 0x18: // DCSEL=6, 0x9F29 + fx_mult_accumulator = 0; + // fall out of the switch + break; + case 0x19: // DCSEL=6, 0x9F2A + ; // <- avoids the error in some compilers about a declaration after a label + int32_t m_result = (int16_t)((fx_cache[1] << 8) | fx_cache[0]) * (int16_t)((fx_cache[3] << 8) | fx_cache[2]); + if (fx_subtract) + fx_mult_accumulator -= m_result; + else + fx_mult_accumulator += m_result; + // fall out of the switch + break; + default: + // The rest of the space is write-only, + // so reading the values out instead returns the version string. + // fall out of the switch + break; + } + return vera_version_string[i % 4]; + break; + } + case 0x0D: + case 0x0E: + case 0x0F: + case 0x10: + case 0x11: + case 0x12: + case 0x13: return reg_layer[0][reg - 0x0D]; + + case 0x14: + case 0x15: + case 0x16: + case 0x17: + case 0x18: + case 0x19: + case 0x1A: return reg_layer[1][reg - 0x14]; + + // TODO bring these back (all commented out) + case 0x1B: return 0; //audio_render(); return pcm_read_ctrl(); + case 0x1C: return 0; //pcm_read_rate(); + case 0x1D: return 0; + + case 0x1E: + case 0x1F: return 0; // vera_spi_read(reg & 1); + } + return 0; +} + +void video_write(uint8_t reg, uint8_t value) { + // if (reg > 4) { + // printf("ioregisters[0x%02X] = 0x%02X\n", reg, value); + // } + // printf("ioregisters[%d] = $%02X\n", reg, value); + + + switch (reg & 0x1F) { + case 0x00: + if (fx_2bit_poly && fx_4bit_mode && fx_addr1_mode == 2 && io_addrsel == 1) { + fx_2bit_poking = true; + io_addr[1] = (io_addr[1] & 0x1fffc) | (value & 0x3); + } else { + io_addr[io_addrsel] = (io_addr[io_addrsel] & 0x1ff00) | value; + if (fx_16bit_hop && io_addrsel == 1) + fx_16bit_hop_align = value & 3; + } + io_rddata[io_addrsel] = video_space_read(io_addr[io_addrsel]); + break; + case 0x01: + io_addr[io_addrsel] = (io_addr[io_addrsel] & 0x100ff) | (value << 8); + io_rddata[io_addrsel] = video_space_read(io_addr[io_addrsel]); + break; + case 0x02: + io_addr[io_addrsel] = (io_addr[io_addrsel] & 0x0ffff) | ((value & 0x1) << 16); + fx_nibble_bit[io_addrsel] = (value >> 1) & 0x1; + fx_nibble_incr[io_addrsel] = (value >> 2) & 0x1; + io_inc[io_addrsel] = value >> 3; + io_rddata[io_addrsel] = video_space_read(io_addr[io_addrsel]); + break; + case 0x03: + case 0x04: { + if (fx_2bit_poking && fx_addr1_mode) { + fx_2bit_poking = false; + uint8_t mask = value >> 6; + switch (mask) { + case 0x00: + video_ram[io_addr[1] & 0x1FFFF] = (fx_cache[fx_cache_byte_index] & 0xc0) | (io_rddata[1] & 0x3f); + break; + case 0x01: + video_ram[io_addr[1] & 0x1FFFF] = (fx_cache[fx_cache_byte_index] & 0x30) | (io_rddata[1] & 0xcf); + break; + case 0x02: + video_ram[io_addr[1] & 0x1FFFF] = (fx_cache[fx_cache_byte_index] & 0x0c) | (io_rddata[1] & 0xf3); + break; + case 0x03: + video_ram[io_addr[1] & 0x1FFFF] = (fx_cache[fx_cache_byte_index] & 0x03) | (io_rddata[1] & 0xfc); + break; + } + break; // break out of the enclosing switch statement early, too + } + + if (enable_midline) + video_step(MHZ, 0, true); // potential midline raster effect + bool nibble = fx_nibble_bit[reg - 3]; + uint32_t address = get_and_inc_address(reg - 3, true); + if (log_video) { + printf("WRITE video_space[$%X] = $%02X\n", address, value); + } + + if (fx_cache_write) { + address &= 0x1fffc; + if (fx_cache_byte_cycling) { + fx_vram_cache_write(address+0, fx_cache[fx_cache_byte_index], value & 0x03); + fx_vram_cache_write(address+1, fx_cache[fx_cache_byte_index], (value >> 2) & 0x03); + fx_vram_cache_write(address+2, fx_cache[fx_cache_byte_index], (value >> 4) & 0x03); + fx_vram_cache_write(address+3, fx_cache[fx_cache_byte_index], value >> 6); + } else { + if (fx_multiplier) { + int32_t m_result = (int16_t)((fx_cache[1] << 8) | fx_cache[0]) * (int16_t)((fx_cache[3] << 8) | fx_cache[2]); + if (fx_subtract) + m_result = fx_mult_accumulator - m_result; + else + m_result = fx_mult_accumulator + m_result; + fx_vram_cache_write(address+0, (m_result) & 0xff, value & 0x03); + fx_vram_cache_write(address+1, (m_result >> 8) & 0xff, (value >> 2) & 0x03); + fx_vram_cache_write(address+2, (m_result >> 16) & 0xff, (value >> 4) & 0x03); + fx_vram_cache_write(address+3, (m_result >> 24) & 0xff, value >> 6); + } else { + fx_vram_cache_write(address+0, fx_cache[0], value & 0x03); + fx_vram_cache_write(address+1, fx_cache[1], (value >> 2) & 0x03); + fx_vram_cache_write(address+2, fx_cache[2], (value >> 4) & 0x03); + fx_vram_cache_write(address+3, fx_cache[3], value >> 6); + } + } + } else { + if (fx_cache_byte_cycling) { + if (fx_4bit_mode) { + fx_vram_cache_write(address, fx_cache[fx_cache_byte_index], nibble+1); + } else { + fx_vram_cache_write(address, fx_cache[fx_cache_byte_index], 0); + } + } else { + fx_video_space_write(address, nibble, value); // Normal write + } + } + + io_rddata[reg - 3] = video_space_read(io_addr[reg - 3]); + break; + } + case 0x05: + if (value & 0x80) { + video_reset(); + } + io_dcsel = (value >> 1) & 0x3f; + io_addrsel = value & 1; + break; + case 0x06: + irq_line = (irq_line & 0xFF) | ((value >> 7) << 8); + ien = value & 0xF; + break; + case 0x07: + isr &= value ^ 0xff; + break; + case 0x08: + irq_line = (irq_line & 0x100) | value; + break; + + case 0x09: + case 0x0A: + case 0x0B: + case 0x0C: { + video_step(MHZ, 0, true); // potential midline raster effect + int i = reg - 0x09 + (io_dcsel << 2); + if (i == 0) { + // if progressive mode field goes from 0 to 1 + // or if mode goes from vga to something else with + // progressive mode on, clear the framebuffer + if (((reg_composer[0] & 0x8) == 0 && (value & 0x8)) || + ((reg_composer[0] & 0x3) == 1 && (value & 0x3) > 1 && (value & 0x8))) { + memset(framebuffer, 0x00, SCREEN_WIDTH * SCREEN_HEIGHT * 4); + } + + // interlace field bit is read-only + reg_composer[0] = (reg_composer[0] & ~0x7f) | (value & 0x7f); + video_palette.dirty = true; + } else { + reg_composer[i] = value; + } + + switch (i) { + case 0x08: // DCSEL=2, $9F29 + fx_addr1_mode = value & 0x03; + fx_4bit_mode = (value & 0x04) >> 2; + fx_16bit_hop = (value & 0x08) >> 3; + fx_cache_byte_cycling = (value & 0x10) >> 4; + fx_cache_fill = (value & 0x20) >> 5; + fx_cache_write = (value & 0x40) >> 6; + fx_trans_writes = (value & 0x80) >> 7; + break; + case 0x09: // DCSEL=2, $9F2A + fx_affine_tile_base = (value & 0xfc) << 9; + fx_affine_clip = (value & 0x02) >> 1; + fx_2bit_poly = (value & 0x01); + break; + case 0x0a: // DCSEL=2, $9F2B + fx_affine_map_base = (value & 0xfc) << 9; + fx_affine_map_size = 2 << ((value & 0x03) << 1); + break; + case 0x0b: // DCSEL=2, $9F2C + fx_cache_increment_mode = value & 0x01; + fx_cache_nibble_index = (value & 0x02) >> 1; + fx_cache_byte_index = (value & 0x0c) >> 2; + fx_multiplier = (value & 0x10) >> 4; + fx_subtract = (value & 0x20) >> 5; + if (value & 0x40) { // accumulate + int32_t m_result = (int16_t)((fx_cache[1] << 8) | fx_cache[0]) * (int16_t)((fx_cache[3] << 8) | fx_cache[2]); + if (fx_subtract) + fx_mult_accumulator -= m_result; + else + fx_mult_accumulator += m_result; + } + if (value & 0x80) { // reset accumulator + fx_mult_accumulator = 0; + } + break; + case 0x0c: // DCSEL=3, $9F29 + fx_x_pixel_increment = ((((reg_composer[0x0d] & 0x7f) << 15) + (reg_composer[0x0c] << 7)) // base value + | ((reg_composer[0x0d] & 0x40) ? 0xffc00000 : 0)) // sign extend if negative + << 5*(!!(reg_composer[0x0d] & 0x80)); // multiply by 32 if flag set + break; + case 0x0d: // DCSEL=3, $9F2A + fx_x_pixel_increment = ((((reg_composer[0x0d] & 0x7f) << 15) + (reg_composer[0x0c] << 7)) // base value + | ((reg_composer[0x0d] & 0x40) ? 0xffc00000 : 0)) // sign extend if negative + << 5*(!!(reg_composer[0x0d] & 0x80)); // multiply by 32 if flag set + // Reset subpixel to 0.5 + fx_x_pixel_position = (fx_x_pixel_position & 0x07ff0000) | 0x00008000; + break; + case 0x0e: // DCSEL=3, $9F2B + fx_y_pixel_increment = ((((reg_composer[0x0f] & 0x7f) << 15) + (reg_composer[0x0e] << 7)) // base value + | ((reg_composer[0x0f] & 0x40) ? 0xffc00000 : 0)) // sign extend if negative + << 5*(!!(reg_composer[0x0f] & 0x80)); // multiply by 32 if flag set + break; + case 0x0f: // DCSEL=3, $9F2C + fx_y_pixel_increment = ((((reg_composer[0x0f] & 0x7f) << 15) + (reg_composer[0x0e] << 7)) // base value + | ((reg_composer[0x0f] & 0x40) ? 0xffc00000 : 0)) // sign extend if negative + << 5*(!!(reg_composer[0x0f] & 0x80)); // multiply by 32 if flag set + // Reset subpixel to 0.5 + fx_y_pixel_position = (fx_y_pixel_position & 0x07ff0000) | 0x00008000; + break; + case 0x10: // DCSEL=4, $9F29 + fx_x_pixel_position = (fx_x_pixel_position & 0x0700ff80) | (value << 16); + fx_affine_prefetch(); + break; + case 0x11: // DCSEL=4, $9F2A + fx_x_pixel_position = (fx_x_pixel_position & 0x00ffff00) | ((value & 0x7) << 24) | (value & 0x80); + fx_affine_prefetch(); + break; + case 0x12: // DCSEL=4, $9F2B + fx_y_pixel_position = (fx_y_pixel_position & 0x0700ff80) | (value << 16); + fx_affine_prefetch(); + break; + case 0x13: // DCSEL=4, $9F2C + fx_y_pixel_position = (fx_y_pixel_position & 0x00ffff00) | ((value & 0x7) << 24) | (value & 0x80); + fx_affine_prefetch(); + break; + case 0x14: // DCSEL=5, $9F29 + fx_x_pixel_position = (fx_x_pixel_position & 0x07ff0080) | (value << 8); + break; + case 0x15: // DCSEL=5, $9F2A + fx_y_pixel_position = (fx_y_pixel_position & 0x07ff0080) | (value << 8); + break; + case 0x18: // DCSEL=6, $9F29 + fx_cache[0] = value; + break; + case 0x19: // DCSEL=6, $9F2A + fx_cache[1] = value; + break; + case 0x1a: // DCSEL=6, $9F2B + fx_cache[2] = value; + break; + case 0x1b: // DCSEL=6, $9F2C + fx_cache[3] = value; + break; + } + break; + } + + case 0x0D: + case 0x0E: + case 0x0F: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + video_step(MHZ, 0, true); // potential midline raster effect + reg_layer[0][reg - 0x0D] = value; + refresh_layer_properties(0); + break; + + case 0x14: + case 0x15: + case 0x16: + case 0x17: + case 0x18: + case 0x19: + case 0x1A: + video_step(MHZ, 0, true); // potential midline raster effect + reg_layer[1][reg - 0x14] = value; + refresh_layer_properties(1); + break; + + // TODO: bring these back + case 0x1B: //audio_render(); pcm_write_ctrl(value); break; + case 0x1C: //audio_render(); pcm_write_rate(value); break; + case 0x1D: //audio_render(); pcm_write_fifo(value); break; + + case 0x1E: + case 0x1F: + // TODO: bring back + //vera_spi_write(reg & 1, value); + break; + } +} + +void +video_update_title(const char* window_title) +{ + SDL_SetWindowTitle(window, window_title); +} + +bool video_is_tilemap_address(int addr) +{ + for (int l = 0; l < 2; ++l) { + struct video_layer_properties *props = &layer_properties[l]; + if (addr < props->map_base) { + continue; + } + if (addr >= props->map_base + (2 << (props->mapw_log2 + props->maph_log2))) { + continue; + } + + return true; + } + return false; +} + +bool video_is_tiledata_address(int addr) +{ + for (int l = 0; l < 2; ++l) { + struct video_layer_properties *props = &layer_properties[l]; + if (addr < props->tile_base) { + continue; + } + int tile_size = props->tilew * props->tileh * props->bits_per_pixel / 8; + if (addr >= props->tile_base + tile_size * (props->bits_per_pixel == 1 ? 256 : 1024)) { + continue; + } + + return true; + } + return false; +} + +bool video_is_special_address(int addr) +{ + return addr >= 0x1F9C0; +} + +void +stop6502(uint16_t address) { + // if (debugger_enabled) { + // DEBUGBreakToDebugger(); + // } else if (testbench) { + // printf("STP\n"); + // fflush(stdout); + // } else { + int return_btn; + char error_message[80]; + const SDL_MessageBoxButtonData btns[2] = { + {SDL_MESSAGEBOX_BUTTON_RETURNKEY_DEFAULT, 0, "Reset Machine"}, + {SDL_MESSAGEBOX_BUTTON_ESCAPEKEY_DEFAULT, -1, "Ignore"} + }; + const SDL_MessageBoxData msg_box = { + SDL_MESSAGEBOX_ERROR, window, "Error", error_message, + 2, btns, NULL + }; + + sprintf(error_message, "Encountered stop instruction at address $%04X. CPU cannot continue.", address); + if (SDL_ShowMessageBox(&msg_box, &return_btn) == 0 && return_btn == 0) { + machine_reset(); + }; +// } +} + diff --git a/src/video.h b/src/video.h new file mode 100644 index 0000000..0ebfeee --- /dev/null +++ b/src/video.h @@ -0,0 +1,38 @@ +// Commander X16 Emulator +// Copyright (c) 2019 Michael Steil +// All rights reserved. License: 2-clause BSD + +#ifndef _VIDEO_H_ +#define _VIDEO_H_ + +#include +#include +#include +#include +//#include "glue.h" + +bool video_init(int window_scale, float screen_x_scale, char *quality, bool fullscreen, float opacity); +void video_reset(void); +bool video_step(float mhz, float steps, bool midline); +void video_update(void); +void video_end(void); +bool video_get_irq_out(void); +void video_save(SDL_RWops *f); +uint8_t video_read(uint8_t reg, bool debugOn); +void video_write(uint8_t reg, uint8_t value); +void video_update_title(const char* window_title); + +uint8_t via1_read(uint8_t reg, bool debug); +void via1_write(uint8_t reg, uint8_t value); + +// For debugging purposes only: +uint8_t video_space_read(uint32_t address); +void video_space_write(uint32_t address, uint8_t value); + +bool video_is_tilemap_address(int addr); +bool video_is_tiledata_address(int addr); +bool video_is_special_address(int addr); + +uint32_t video_get_address(uint8_t sel); + +#endif diff --git a/todo.org b/todo.org new file mode 100644 index 0000000..531ea05 --- /dev/null +++ b/todo.org @@ -0,0 +1,28 @@ +* DONE add 65c265 compatibility +** DONE Change hard coded vectors to defined ones based on tables below. +** DONE Change references to '260' to '262' +** DONE Change references to '1300' to '1310' +** DONE Add '0,0,' to cpu_cycle_table (5 places?) +** DONE Add 'irne64' flag (like irq flag) and appropriate code in dispatch.c + -> cpu_irne64 CPU_addIrne64()/CPU_clearIrne64 +** DONE Add 'irqt5' flag and appropriate code in dispatch.c + -> cpu_irqt5 CPU_addIrqt5()/CPU_clearIrqt5 +** DONE update table.c +* TODO Need a Vera demo with new kernel code +* TODO address timing - bsx just runs flat out right now, want stable 8 Mhz. + - instrumentation: how fast are we going? +* TODO Rename sdl_events.c/sdl_events.h +* TODO Keyboard Device. +** TODO 1) Create a new Keyboard device. + - base this on bexemu/keyboard.c + - takes 80 bytes in memory (might want to cut this down) +** TODO 2) Patch the Keyboard device into main.c (mem read/write) + - maybe at $DF20-$DF6F +* TODO SDL_Event logic + - update sdl_events.c logic to process keyboard events and put them info memory. +* TODO Possibly rewrite dispatch loop to be more readable. + - we don't *have* to be as general as the library intends. +* TODO Add more hardware to emulation. +** TODO 65C816 Timer(s) - Start with Timer #5 for now. + - includes interrupt processing. +