2024-07-23 02:48:34 +02:00
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* TODO Need a Vera demo with new kernel code
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* TODO address timing - bsx just runs flat out right now, want stable 8 Mhz.
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- instrumentation: how fast are we going?
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2024-08-08 01:58:22 +02:00
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* TODO hardware updates
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- VERA
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- SDL Events (Keyboard & Controllers)
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- Timer 5. -> calls CPU_addIrqt5()
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*question* How do the timers work? Do they count FCLK cycles?
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we might have to update timer 5 by more than 1 at a time. (i.e. depends on cycles)
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* TODO add other I/O & 65c265 features
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** TODO Timer 5
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** NOTE PCS7 set to post boot values is 'baked in'. Reading / Writing PCS7 should be a nop.
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** TODO Keyboard / Controllers [under development]
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** TODO SD Port [under development]
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** TODO Clock Port [under development]
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2024-07-23 02:48:34 +02:00
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