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Sentinel65X-Handbook
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Work on fleshing out sections

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Kyle Cardoza 2024-03-23 21:23:08 -04:00
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@ -81,7 +81,7 @@ The `ADDRx_H` register is actually two registers, the `ADDR0_H` and `ADDR1_H` re
The `ADDR0_H` and `ADDR1_H` registers control the low byte of the selected address in VERA memory for reading or writing with the `DATA0` and `DATA1` registers, located at `0x00DF03` and `0x00DF04` respectively. The `ADDR0_H` and `ADDR1_H` registers control the low byte of the selected address in VERA memory for reading or writing with the `DATA0` and `DATA1` registers, located at `0x00DF03` and `0x00DF04` respectively.
Bit 0 of the `ADDRx_H` is bit 16 of the address of the data port selected by `ADDRSEL`. Bits 1 and 2 of `ADDRx_H` are unused. Bit 3 is called `DECR`; when this bit is clear, the address of the selected data port will increment by the amount set with bits 4-7, called `INCR`, according to the table below. When `DECR` is set, then the address will _decrement_ by the same amount. Bit 0 of the `ADDRx_H` is bit 16 of the address of the data port selected by `ADDRSEL`. Bits 1 and 2 of `ADDRx_H` are unused. Bit 3 is called `DECR0` or `DECR1`; when this bit is clear, the address of the selected data port will increment by the amount set with bits 4-7, called `INCR0` or `INCR1`, according to the table below. When `DECR0` or `DECR1` is set, then the address will _decrement_ by the same amount when the matching data register is read from or written to.
| `INCR` value | Address Increment | | `INCR` value | Address Increment |
| -------------: | ---------------: | | -------------: | ---------------: |
@ -101,3 +101,17 @@ Bit 0 of the `ADDRx_H` is bit 16 of the address of the data port selected by `AD
| 13 | 160 | | 13 | 160 |
| 14 | 320 | | 14 | 320 |
| 15 | 640 | | 15 | 640 |
### DATA0
The `DATA0` register, located at `0x00DF03`, is the first of two data registers available from VERA. It reads or writes the address in VERA's internal memory set in `ADDR0_L`, `ADDR0_M`, and `ADDR0_H`.
If the value in `INCR0` is nonzero, then after reading or writing from or to `DATA0`, the address stored in `ADDR0_L`, `ADDR0_M`, and `ADDR0_H` will be incremented by the number of addresses in the [table above](#ADDRx_H). If `DECR0` is set, then the address will _decrement_ by that amount instead.
### DATA1
`DATA1`, located at `0x00DF04`, is identical in function to `DATA0`, but uses the address and increment settings stored in `ADDR1_H` instead of `ADDR0_H`.
### CTRL
The `CTRL` register, located at `0x00DF05`, contains three significant bits: bit 0, called `ADDRSEL`, determines which `DATAx` register the `ADDRx` registers refer to. Bit 1, called `DCSEL`, controls which set of registers are accessed at addresses `0x00DF09` through `0x00DF0C`. Bit 7, called `RESET`, will reset VERA to the initial power-on state when a `1` value is written to it.