forked from rebecca/BSX
Compare commits
2 Commits
Author | SHA1 | Date |
---|---|---|
Rebecca Buckingham | b9d4bdfcd3 | |
David Jolley | e03ceb1871 |
14
Makefile
14
Makefile
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@ -1,18 +1,24 @@
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# Variables
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# Variables
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CC = gcc
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CC = gcc
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CFLAGS = -Wall -Wextra -std=c11 -I/usr/local/include/SDL2
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# Probably this won't work on a mac using xcode.
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LDFLAGS = -L/usr/local/lib -lSDL2
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# See https://stackoverflow.com/questions/3071321/how-to-use-pkg-config-for-setting-include-paths-in-xcode
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# for possible workarounds?
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# != is a GNU make extension, so may also not work on *BSD
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SDL_CFLAGS!=pkg-config --cflags sdl2
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SDL_LFLAGS!=pkg-config --libs sdl2
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CFLAGS = -Wall -Wextra -std=c11 $(SDL_CFLAGS)
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LDFLAGS = $(SDL_LFLAGS) -lm
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SRC_DIR = src
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SRC_DIR = src
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SOURCES = $(wildcard $(SRC_DIR)/*.c)
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SOURCES = $(wildcard $(SRC_DIR)/*.c)
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OBJECTS = $(SOURCES:$(SRC_DIR)/%.c=%.o)
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OBJECTS = $(SOURCES:$(SRC_DIR)/%.c=%.o)
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TARGET = bsx
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TARGET = bsx
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# Default target
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# Default target
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all: $(TARGET)
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all: $(TARGET) Makefile
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# Linking
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# Linking
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$(TARGET): $(OBJECTS)
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$(TARGET): $(OBJECTS)
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$(CC) $(LDFLAGS) -o $@ $^
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$(CC) -o $@ $^ $(LDFLAGS)
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# Compiling
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# Compiling
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%.o: $(SRC_DIR)/%.c
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%.o: $(SRC_DIR)/%.c
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338
src/dispatch.c
338
src/dispatch.c
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@ -8,6 +8,9 @@
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* Copyright (C) 2006 by Samuel A. Falvo II
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* Copyright (C) 2006 by Samuel A. Falvo II
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*
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*
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* Modified for greater portability and virtual hardware independence.
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* Modified for greater portability and virtual hardware independence.
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*
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* Copyright (C) 2024 by Rebecca Buckingham
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* highly modified to integrate with bsx emulator.
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*/
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*/
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#define CPU_DISPATCH
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#define CPU_DISPATCH
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@ -15,10 +18,7 @@
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#include "cpu.h"
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#include "cpu.h"
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#include "cpumicro.h"
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#include "cpumicro.h"
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#include "util.h"
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#include "util.h"
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#include <stdint.h>
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//#define LIMIT_INSTRUCTION_COUNT 10000
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//void CPUEvent_elapse( word32 cycles );
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int dispatch_quit = 0;
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int dispatch_quit = 0;
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@ -45,216 +45,164 @@ union {
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duala atmp,opaddr;
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duala atmp,opaddr;
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dualw wtmp,otmp,operand;
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dualw wtmp,otmp,operand;
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int a1,a2,a3,a4,o1,o2,o3,o4;
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int a1,a2,a3,a4,o1,o2,o3,o4;
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#ifdef OLDCYCLES
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byte *cpu_curr_cycle_table;
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#endif
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void (**cpu_curr_opcode_table)();
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void (**cpu_curr_opcode_table)();
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extern int cpu_reset,cpu_abort,cpu_nmi,cpu_irq,cpu_stop,cpu_wait,cpu_trace;
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extern int cpu_reset,cpu_abort,cpu_nmi,cpu_irq,cpu_stop,cpu_wait,cpu_trace;
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extern int cpu_update_period;
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extern int cpu_irne64,cpu_irqt5;
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extern int cpu_irne64,cpu_irqt5;
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extern int cpu_update_period;
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extern void (*cpu_opcode_table[1310])();
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extern void (*cpu_opcode_table[1310])();
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#ifdef OLDCYCLES
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uint64_t last_update, next_update;
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/* Base cycle counts for all possible 1310 opcodes (262 opcodes x 5 modes). */
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/* The opcode handlers may add additional cycles to handle special cases such */
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/* a non-page-aligned direct page register or taking a branch. */
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byte cpu_cycle_table[1310] =
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#define RESET_OP 256
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{
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#define ABORT_OP 257
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8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=0, m=1, x=1 */
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#define NMI_OP 258
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2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 2, 2, 6, 4, 7, 5,
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#define IRQ_OP 259
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6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5,
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#define IRNE64_OP 260
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2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 2, 2, 4, 4, 7, 5,
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#define IRQT5_OP 261
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7, 6, 2, 4, 7, 3, 5, 6, 3, 2, 2, 3, 3, 4, 6, 5,
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2, 5, 5, 7, 7, 4, 6, 6, 2, 4, 3, 2, 4, 4, 7, 5,
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6, 6, 6, 4, 3, 3, 5, 6, 4, 2, 2, 6, 5, 4, 6, 5,
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2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
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2, 6, 3, 4, 3, 3, 3, 6, 2, 2, 2, 3, 4, 4, 4, 5,
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2, 6, 5, 7, 4, 4, 4, 6, 2, 5, 2, 2, 4, 5, 5, 5,
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2, 6, 2, 4, 3, 3, 3, 6, 2, 2, 2, 4, 4, 4, 4, 5,
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2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5,
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2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 4, 5,
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2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5,
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2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5,
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2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
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0, 0, 0, 0, 0, 0,
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8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=0, m=1, x=0 */
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void handleSignal(int type) {
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2, 6, 5, 7, 5, 4, 6, 6, 2, 5, 2, 2, 6, 5, 7, 5,
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(**cpu_curr_opcode_table[type])();
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6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5,
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}
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2, 6, 5, 7, 4, 4, 6, 6, 2, 5, 2, 2, 5, 5, 7, 5,
|
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7, 6, 2, 4, 0, 3, 5, 6, 4, 2, 2, 3, 3, 4, 6, 5,
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2, 6, 5, 7, 0, 4, 6, 6, 2, 5, 4, 2, 4, 5, 7, 5,
|
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6, 6, 6, 4, 3, 3, 5, 6, 5, 2, 2, 6, 5, 4, 6, 5,
|
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2, 6, 5, 7, 4, 4, 6, 6, 2, 5, 5, 2, 6, 5, 7, 5,
|
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2, 6, 3, 4, 4, 3, 4, 6, 2, 2, 2, 3, 5, 4, 5, 5,
|
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2, 6, 5, 7, 5, 4, 5, 6, 2, 5, 2, 2, 4, 5, 5, 5,
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3, 6, 3, 4, 4, 3, 4, 6, 2, 2, 2, 4, 5, 4, 5, 5,
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2, 6, 5, 7, 5, 4, 5, 6, 2, 5, 2, 2, 5, 5, 5, 5,
|
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3, 6, 3, 4, 4, 3, 6, 6, 2, 2, 2, 3, 5, 4, 6, 5,
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2, 6, 5, 7, 6, 4, 8, 6, 2, 5, 4, 3, 6, 5, 7, 5,
|
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3, 6, 3, 4, 4, 3, 6, 6, 2, 2, 2, 3, 5, 4, 6, 5,
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2, 6, 5, 7, 5, 4, 8, 6, 2, 5, 5, 2, 6, 5, 7, 5,
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0, 0, 0, 0, 0, 0,
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|
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8, 7, 8, 5, 7, 4, 7, 7, 3, 3, 2, 4, 8, 5, 8, 6, /* e=0, m=0, x=1 */
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void doUpdate() {
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2, 6, 6, 8, 7, 5, 8, 7, 2, 5, 2, 2, 8, 5, 9, 6,
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E_UPDATE(cpu_cycle_count);
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6, 7, 8, 5, 4, 4, 7, 7, 4, 3, 2, 5, 5, 5, 8, 6,
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last_update = cpu_cycle_count;
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2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 2, 2, 5, 5, 9, 6,
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next_update = last_update + cpu_update_period;
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7, 7, 2, 5, 0, 4, 7, 7, 4, 3, 2, 3, 3, 5, 8, 6,
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}
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2, 6, 6, 8, 0, 5, 8, 7, 2, 5, 3, 2, 4, 5, 9, 6,
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6, 7, 6, 5, 4, 4, 7, 7, 5, 3, 2, 6, 5, 5, 8, 6,
|
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2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 4, 2, 6, 5, 9, 6,
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2, 7, 3, 5, 3, 4, 3, 7, 2, 3, 2, 3, 4, 5, 4, 6,
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2, 6, 6, 8, 4, 5, 4, 7, 2, 5, 2, 2, 5, 5, 5, 6,
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2, 7, 2, 5, 3, 4, 3, 7, 2, 3, 2, 4, 4, 5, 4, 6,
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2, 6, 6, 8, 4, 5, 4, 7, 2, 5, 2, 2, 4, 5, 4, 6,
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2, 7, 3, 5, 3, 4, 7, 7, 2, 3, 2, 3, 4, 5, 8, 6,
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2, 6, 6, 8, 6, 5, 8, 7, 2, 5, 3, 3, 6, 5, 9, 6,
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2, 7, 3, 5, 3, 4, 7, 7, 2, 3, 2, 3, 4, 5, 8, 6,
|
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2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 4, 2, 6, 5, 9, 6,
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0, 0, 0, 0, 0, 0,
|
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|
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8, 7, 8, 5, 7, 4, 7, 7, 3, 3, 2, 4, 8, 5, 8, 6, /* e=0, m=0, x=0 */
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void CPU_init(void) {
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2, 7, 6, 8, 7, 5, 8, 7, 2, 6, 2, 2, 8, 6, 9, 6,
|
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6, 7, 8, 5, 4, 4, 7, 7, 4, 3, 2, 5, 5, 5, 8, 6,
|
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2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 2, 2, 6, 6, 9, 6,
|
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7, 7, 2, 5, 0, 4, 7, 7, 3, 3, 2, 3, 3, 5, 8, 6,
|
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||||||
2, 7, 6, 8, 0, 5, 8, 7, 2, 6, 4, 2, 4, 6, 9, 6,
|
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||||||
6, 7, 6, 5, 4, 4, 7, 7, 4, 3, 2, 6, 5, 5, 8, 6,
|
|
||||||
2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 5, 2, 6, 6, 9, 6,
|
|
||||||
2, 7, 3, 5, 4, 4, 4, 7, 2, 3, 2, 3, 5, 5, 5, 6,
|
|
||||||
2, 7, 6, 8, 5, 5, 5, 7, 2, 6, 2, 2, 5, 6, 6, 6,
|
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||||||
3, 7, 3, 5, 4, 4, 4, 7, 2, 3, 2, 4, 5, 5, 5, 6,
|
|
||||||
2, 7, 6, 8, 5, 5, 5, 7, 2, 6, 2, 2, 5, 6, 5, 6,
|
|
||||||
3, 7, 3, 5, 4, 4, 7, 7, 2, 3, 2, 3, 5, 5, 8, 6,
|
|
||||||
2, 7, 6, 8, 6, 5, 8, 7, 2, 6, 4, 3, 6, 6, 9, 6,
|
|
||||||
3, 7, 3, 5, 4, 4, 7, 7, 2, 3, 2, 3, 5, 5, 8, 6,
|
|
||||||
2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 5, 2, 6, 6, 9, 6,
|
|
||||||
0, 0, 0, 0, 0, 0,
|
|
||||||
|
|
||||||
8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=1, m=1, x=1 */
|
|
||||||
2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 2, 2, 6, 4, 7, 5,
|
|
||||||
6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5,
|
|
||||||
2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 2, 2, 4, 4, 7, 5,
|
|
||||||
7, 6, 2, 4, 0, 3, 5, 6, 3, 2, 2, 3, 3, 4, 6, 5,
|
|
||||||
2, 5, 5, 7, 0, 4, 6, 6, 2, 4, 3, 2, 4, 4, 7, 5,
|
|
||||||
6, 6, 6, 4, 3, 3, 5, 6, 4, 2, 2, 6, 5, 4, 6, 5,
|
|
||||||
2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
|
|
||||||
2, 6, 3, 4, 3, 3, 3, 6, 2, 2, 2, 3, 4, 4, 4, 5,
|
|
||||||
2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5,
|
|
||||||
2, 6, 2, 4, 3, 3, 3, 6, 2, 2, 2, 4, 4, 4, 4, 5,
|
|
||||||
2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5,
|
|
||||||
2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5,
|
|
||||||
2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5,
|
|
||||||
2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5,
|
|
||||||
2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
|
|
||||||
0, 0, 0, 0, 0, 0
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void CPU_run(void)
|
|
||||||
{
|
|
||||||
word32 last_update,next_update;
|
|
||||||
int opcode;
|
|
||||||
|
|
||||||
#ifdef LIMIT_INSTRUCTION_COUNT
|
|
||||||
long instructionCount = 0;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
cpu_cycle_count = 0;
|
|
||||||
last_update = 0;
|
last_update = 0;
|
||||||
next_update = cpu_update_period;
|
next_update = cpu_update_period;
|
||||||
|
cpu_cycle_count = 0;
|
||||||
E = 1;
|
E = 1;
|
||||||
F_setM(1);
|
F_setM(1);
|
||||||
F_setX(1);
|
F_setX(1);
|
||||||
CPU_modeSwitch();
|
CPU_modeSwitch();
|
||||||
|
|
||||||
dispatch:
|
|
||||||
// CPUEvent_elapse( cpu_cycle_count );
|
|
||||||
// cpu_cycle_count = 0;
|
|
||||||
if (dispatch_quit)
|
|
||||||
return;
|
|
||||||
|
|
||||||
// TODO remove this.
|
|
||||||
#ifdef LIMIT_INSTRUCTION_COUNT
|
|
||||||
instructionCount++;
|
|
||||||
if (instructionCount > LIMIT_INSTRUCTION_COUNT)
|
|
||||||
return;
|
|
||||||
#endif
|
|
||||||
// #ifdef E_UPDATE
|
|
||||||
if (cpu_cycle_count >= next_update) goto update;
|
|
||||||
update_resume:
|
|
||||||
// #endif
|
|
||||||
|
|
||||||
#ifdef DEBUG
|
|
||||||
if (cpu_trace) goto debug;
|
|
||||||
debug_resume:
|
|
||||||
#endif
|
|
||||||
if (cpu_reset) goto reset;
|
|
||||||
if (cpu_stop) goto dispatch;
|
|
||||||
if (cpu_abort) goto abort;
|
|
||||||
if (cpu_nmi) goto nmi;
|
|
||||||
if (cpu_irq) goto irq;
|
|
||||||
if (cpu_irne64) goto irne64;
|
|
||||||
if (cpu_irqt5) goto irqt5;
|
|
||||||
irq_return:
|
|
||||||
if (cpu_wait) { cpu_cycle_count++; goto dispatch; }
|
|
||||||
opcode = M_READ_OPCODE(PC.A);
|
|
||||||
PC.W.PC++;
|
|
||||||
|
|
||||||
#ifdef OLDCYCLES
|
|
||||||
cpu_cycle_count += cpu_curr_cycle_table[opcode];
|
|
||||||
#endif
|
|
||||||
(**cpu_curr_opcode_table[opcode])();
|
|
||||||
|
|
||||||
goto dispatch;
|
|
||||||
|
|
||||||
/* Special cases. Since these don't happen a lot more often than they */
|
|
||||||
/* do happen, accessing them this way means most of the time the */
|
|
||||||
/* generated code is _not_ branching. Only during the special cases do */
|
|
||||||
/* we take the branch penalty (if there is one). */
|
|
||||||
|
|
||||||
// #ifdef E_UPDATE
|
|
||||||
update:
|
|
||||||
E_UPDATE(cpu_cycle_count);
|
|
||||||
last_update = cpu_cycle_count;
|
|
||||||
next_update = last_update + cpu_update_period;
|
|
||||||
goto update_resume;
|
|
||||||
// #endif
|
|
||||||
|
|
||||||
#ifdef DEBUG
|
|
||||||
debug:
|
|
||||||
CPU_debug();
|
|
||||||
goto debug_resume;
|
|
||||||
#endif
|
|
||||||
reset:
|
|
||||||
(**cpu_curr_opcode_table[256])();
|
|
||||||
goto dispatch;
|
|
||||||
abort:
|
|
||||||
(**cpu_curr_opcode_table[257])();
|
|
||||||
goto dispatch;
|
|
||||||
nmi:
|
|
||||||
(**cpu_curr_opcode_table[258])();
|
|
||||||
goto dispatch;
|
|
||||||
irq:
|
|
||||||
if (P & 0x04) goto irq_return;
|
|
||||||
(**cpu_curr_opcode_table[259])();
|
|
||||||
goto dispatch;
|
|
||||||
irne64:
|
|
||||||
if (P & 0x04) goto irq_return;
|
|
||||||
(**cpu_curr_opcode_table[260])();
|
|
||||||
goto dispatch;
|
|
||||||
irqt5:
|
|
||||||
if (P & 0x04) goto irq_return;
|
|
||||||
(**cpu_curr_opcode_table[261])();
|
|
||||||
goto dispatch;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void CPU_step(void) {
|
||||||
|
if (cpu_cycle_count >= next_update) doUpdate();
|
||||||
|
int opcode = M_READ_OPCODE(PC.A);
|
||||||
|
PC.W.PC++;
|
||||||
|
(**cpu_curr_opcode_table[opcode])();
|
||||||
|
}
|
||||||
|
|
||||||
|
void CPU_run(void) {
|
||||||
|
while (!dispatch_quit) {
|
||||||
|
if (cpu_trace) CPU_debug();
|
||||||
|
if (cpu_reset) { handleSignal(RESET_OP); continue; }
|
||||||
|
if (cpu_abort) { handleSignal(ABORT_OP); continue; }
|
||||||
|
if (cpu_nmi) { handleSignal(NMI_OP); continue; }
|
||||||
|
if (cpu_irq) { handleSignal(IRQ_OP); continue; }
|
||||||
|
if (cpu_irne64) { handleSignal(IRNE64_OP); continue; }
|
||||||
|
if (cpu_irqt5) { handleSignal(IRQT5_OP); continue; }
|
||||||
|
if (cpu_wait) { cpu_cycle_count++; continue; }
|
||||||
|
if (cpu_stop) continue;
|
||||||
|
CPU_step();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// void old_CPU_run(void)
|
||||||
|
// {
|
||||||
|
// word32 last_update,next_update;
|
||||||
|
// int opcode;
|
||||||
|
|
||||||
|
// #ifdef LIMIT_INSTRUCTION_COUNT
|
||||||
|
// long instructionCount = 0;
|
||||||
|
// #endif
|
||||||
|
|
||||||
|
// cpu_cycle_count = 0;
|
||||||
|
// last_update = 0;
|
||||||
|
// next_update = cpu_update_period;
|
||||||
|
// E = 1;
|
||||||
|
// F_setM(1);
|
||||||
|
// F_setX(1);
|
||||||
|
// CPU_modeSwitch();
|
||||||
|
|
||||||
|
// dispatch:
|
||||||
|
// // CPUEvent_elapse( cpu_cycle_count );
|
||||||
|
// // cpu_cycle_count = 0;
|
||||||
|
// if (dispatch_quit)
|
||||||
|
// return;
|
||||||
|
|
||||||
|
// // TODO remove this.
|
||||||
|
// #ifdef LIMIT_INSTRUCTION_COUNT
|
||||||
|
// instructionCount++;
|
||||||
|
// if (instructionCount > LIMIT_INSTRUCTION_COUNT)
|
||||||
|
// return;
|
||||||
|
// #endif
|
||||||
|
// // #ifdef E_UPDATE
|
||||||
|
// if (cpu_cycle_count >= next_update) goto update;
|
||||||
|
// update_resume:
|
||||||
|
// // #endif
|
||||||
|
|
||||||
|
// #ifdef DEBUG
|
||||||
|
// if (cpu_trace) goto debug;
|
||||||
|
// debug_resume:
|
||||||
|
// #endif
|
||||||
|
// if (cpu_reset) goto reset;
|
||||||
|
// if (cpu_stop) goto dispatch;
|
||||||
|
// if (cpu_abort) goto abort;
|
||||||
|
// if (cpu_nmi) goto nmi;
|
||||||
|
// if (cpu_irq) goto irq;
|
||||||
|
// if (cpu_irne64) goto irne64;
|
||||||
|
// if (cpu_irqt5) goto irqt5;
|
||||||
|
// irq_return:
|
||||||
|
// if (cpu_wait) { cpu_cycle_count++; goto dispatch; }
|
||||||
|
// opcode = M_READ_OPCODE(PC.A);
|
||||||
|
// PC.W.PC++;
|
||||||
|
|
||||||
|
// #ifdef OLDCYCLES
|
||||||
|
// cpu_cycle_count += cpu_curr_cycle_table[opcode];
|
||||||
|
// #endif
|
||||||
|
// (**cpu_curr_opcode_table[opcode])();
|
||||||
|
|
||||||
|
// goto dispatch;
|
||||||
|
|
||||||
|
// /* Special cases. Since these don't happen a lot more often than they */
|
||||||
|
// /* do happen, accessing them this way means most of the time the */
|
||||||
|
// /* generated code is _not_ branching. Only during the special cases do */
|
||||||
|
// /* we take the branch penalty (if there is one). */
|
||||||
|
|
||||||
|
// // #ifdef E_UPDATE
|
||||||
|
// update:
|
||||||
|
// E_UPDATE(cpu_cycle_count);
|
||||||
|
// last_update = cpu_cycle_count;
|
||||||
|
// next_update = last_update + cpu_update_period;
|
||||||
|
// goto update_resume;
|
||||||
|
// // #endif
|
||||||
|
|
||||||
|
// #ifdef DEBUG
|
||||||
|
// debug:
|
||||||
|
// CPU_debug();
|
||||||
|
// goto debug_resume;
|
||||||
|
// #endif
|
||||||
|
// reset:
|
||||||
|
// (**cpu_curr_opcode_table[256])();
|
||||||
|
// goto dispatch;
|
||||||
|
// abort:
|
||||||
|
// (**cpu_curr_opcode_table[257])();
|
||||||
|
// goto dispatch;
|
||||||
|
// nmi:
|
||||||
|
// (**cpu_curr_opcode_table[258])();
|
||||||
|
// goto dispatch;
|
||||||
|
// irq:
|
||||||
|
// if (P & 0x04) goto irq_return;
|
||||||
|
// (**cpu_curr_opcode_table[259])();
|
||||||
|
// goto dispatch;
|
||||||
|
// irne64:
|
||||||
|
// if (P & 0x04) goto irq_return;
|
||||||
|
// (**cpu_curr_opcode_table[260])();
|
||||||
|
// goto dispatch;
|
||||||
|
// irqt5:
|
||||||
|
// if (P & 0x04) goto irq_return;
|
||||||
|
// (**cpu_curr_opcode_table[261])();
|
||||||
|
// goto dispatch;
|
||||||
|
// }
|
||||||
|
|
||||||
/* Recalculate opcode_offset based on the new processor mode */
|
/* Recalculate opcode_offset based on the new processor mode */
|
||||||
|
|
||||||
void CPU_modeSwitch(void) {
|
void CPU_modeSwitch(void) {
|
||||||
|
|
|
@ -26,7 +26,6 @@ void EMUL_hardwareUpdate(word32 timestamp) {
|
||||||
}
|
}
|
||||||
|
|
||||||
if (SDL_PollEvent(&sdl_event)) {
|
if (SDL_PollEvent(&sdl_event)) {
|
||||||
puts("got an event!");
|
|
||||||
handleEvent(&sdl_event);
|
handleEvent(&sdl_event);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue