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Rebecca Buckingham 2024-07-22 20:48:34 -04:00
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# Prerequisites
*.d
# Object files
*.o
*.ko
*.obj
*.elf
# Linker output
*.ilk
*.map
*.exp
# Precompiled Headers
*.gch
*.pch
# Libraries
*.lib
*.a
*.la
*.lo
# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib
# Executables
*.exe
*.out
*.app
*.i*86
*.x86_64
*.hex
# Debug files
*.dSYM/
*.su
*.idb
*.pdb
# Kernel Module Compile Results
*.mod*
*.cmd
.tmp_versions/
modules.order
Module.symvers
Mkfile.old
dkms.conf
# Other
bsx
xcuserdata/
*.hmap
*.dSYM.zip
*.dSYM
.build/

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<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<https://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<https://www.gnu.org/licenses/why-not-lgpl.html>.

26
Makefile Normal file
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@ -0,0 +1,26 @@
# Variables
CC = gcc
CFLAGS = -Wall -Wextra -std=c11 -I/usr/local/include/SDL2
LDFLAGS = -L/usr/local/lib -lSDL2
SRC_DIR = src
SOURCES = $(wildcard $(SRC_DIR)/*.c)
OBJECTS = $(SOURCES:$(SRC_DIR)/%.c=%.o)
TARGET = bsx
# Default target
all: $(TARGET)
# Linking
$(TARGET): $(OBJECTS)
$(CC) $(LDFLAGS) -o $@ $^
# Compiling
%.o: $(SRC_DIR)/%.c
$(CC) $(CFLAGS) -c -o $@ $<
# Clean up
clean:
rm -f $(OBJECTS) $(TARGET)
# Phony targets
.PHONY: all clean

34
README.org Normal file
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@ -0,0 +1,34 @@
#+TITLE: Bsx : Sentinel 65X System Emulator
(C)opyright 2024, Rebecca Buckingham.
* License
- lib65816 code is licensed GPL3.
- VERA emulation is licensed 2-clause BSD.
- All other code is licensed GPL3.
* Requirements
- SDL2 development libraries need to be installed.
* Installation
- Run make, then copy the bsx executable whereever you want it.
* Usage
- bsx path_to_rom_file
* Status
** What's done
1) 65C816 emulation via lib65816.
2) Selected 65C265 features. (Can be disabled by undefining CPU65265 in opcodes.h.)
- 65C265 Vectors are implemented. (COP, ABORT, NMI, IRQ)
- Added some 65C265-specific IRQ sources and vectors: IRQT5, IRNE64.
3) VERA emulation via code extracted from X16 emulator.
4) Loading of selected BIOS ROM.
** What's not done (i.e. TODO List)
1) System timing. Emulation always runs flat out instead at stable 8 Mhz.
2) Clean up dispatch loop in dispatch.c for easier maintenance.
3) Keyboard emulation.
4) Timer emulation. (Start with timer #5)
5) SD Card emulation.
6) Audio emulation.
7) SNES controller emulation.

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#ifndef LIB65816_CONFIG_H
#define LIB65816_CONFIG_H
/* DO NOT MODIFY THIS FILE; THIS FILE IS AUTOMATICALLY GENERATED. */
#define SIZEOF_LONG 8
#define SIZEOF_INT 4
#define SIZEOF_SHORT 2
#define DEBUG 1
#endif

92
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/*
* lib65816/cpu.c Release 1p1
* See LICENSE for more details.
*
* Code originally from XGS: Apple IIGS Emulator (cpu.c)
*
* Originally written and Copyright (C)1996 by Joshua M. Thompson
* Copyright (C) 2006 by Samuel A. Falvo II
*
* Modified for greater portability and virtual hardware independence.
*/
#include "config.h"
#include "cpu.h"
int cpu_reset;
int cpu_abort;
int cpu_nmi;
word32 cpu_irq;
int cpu_stop;
int cpu_wait;
int cpu_trace;
int cpu_irne64;
int cpu_irqt5;
word32 cpu_update_period;
#if defined( __sparc__ ) && defined( __GNUC__ )
register word32 cpu_cycle_count asm ("g5");
#else
word32 cpu_cycle_count;
#endif
void CPU_setUpdatePeriod(word32 period)
{
cpu_update_period = period;
}
void CPU_setTrace(int mode)
{
cpu_trace = mode;
}
void CPU_reset(void)
{
cpu_reset = 1;
}
void CPU_abort(void)
{
cpu_abort = 1;
}
void CPU_nmi(void)
{
cpu_nmi = 1;
}
void CPU_addIRQ( word32 m )
{
cpu_irq |= m;
}
void CPU_clearIRQ( word32 m )
{
cpu_irq &= ~m;
}
void CPU_setRunAddress(word32 address)
{
PC.W.PC = address & 0xffff;
PC.B.PB = (address >> 16) & 0xff;
}
void CPU_addIrne64( word32 m )
{
cpu_irne64 |= m;
}
void CPU_clearIrne64( word32 m )
{
cpu_irne64 &= ~m;
}
void CPU_addIrqt5( word32 m )
{
cpu_irqt5 |= m;
}
void CPU_clearIrqt5( word32 m)
{
cpu_irqt5 &= ~m;
}

230
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#ifndef LIB65816_CPU_H
#define LIB65816_CPU_H
/*
* lib65816/cpu.h Release 1p1
* See LICENSE for more details.
*
* Code originally from XGS: Apple IIGS Emulator (gscpu.h)
*
* Originally written and Copyright (C)1996 by Joshua M. Thompson
* Copyright (C) 2006 by Samuel A. Falvo II
*
* Modified for greater portability and virtual hardware independence.
*/
#include "config.h"
/* Type definitions for convenience. These are not intended to be used
* outside the scope of lib65816, since it might conflict with other
* libraries type definitions.
*/
typedef unsigned char byte;
typedef signed char sbyte;
#if SIZEOF_LONG == 4
typedef unsigned long word32;
typedef signed long sword32;
#elif SIZEOF_INT == 4
typedef unsigned int word32;
typedef signed int sword32;
#endif
#if SIZEOF_SHORT == 2
typedef unsigned short word16;
typedef signed short sword16;
#elif SIZEOF_INT == 2
typedef unsigned int word16;
typedef signed int sword16;
#endif
typedef signed char offset_s; /* short offset */
typedef signed short offset_l; /* long offset */
/*
* Union definition of a 16-bit value that can also be
* accessed as its component 8-bit values. Useful for
* registers, which change sized based on teh settings
* the M and X program status register bits.
*/
typedef union {
#ifdef WORDS_BIGENDIAN
struct { byte H,L; } B;
#else
struct { byte L,H; } B;
#endif
word16 W;
} dualw;
/* Same as above but for addresses. */
typedef union {
#ifdef WORDS_BIGENDIAN
struct { byte Z,B,H,L; } B;
struct { word16 H,L; } W;
#else
struct { byte L,H,B,Z; } B;
struct { word16 L,H; } W;
#endif
word32 A;
} duala;
/* Definitions of the 65816 registers, in case you want
* to access these from your own routines (such as from
* a WDM opcode handler routine.
*
* ATTENTION: DO NOT DEPEND ON THESE -- THESE WILL EVENTUALLY BE REPLACED
* WITH A STRUCTURE THAT MAINTAINS ALL CPU STATE.
*/
extern dualw A; /* Accumulator */
extern dualw D; /* Direct Page Register */
extern byte P; /* Processor Status Register */
extern int E; /* Emulation Mode Flag */
extern dualw S; /* Stack Pointer */
extern dualw X; /* X Index Register */
extern dualw Y; /* Y Index Register */
extern byte DB; /* Data Bank Register */
#ifndef CPU_DISPATCH
extern union { /* Program Counter */
#ifdef WORDS_BIGENDIAN
struct { byte Z,PB,H,L; } B;
struct { word16 Z,PC; } W;
#else
struct { byte L,H,PB,Z; } B;
struct { word16 PC,Z; } W;
#endif
word32 A;
} PC;
#endif
/* Current cycle count */
#if defined ( __sparc__ ) && defined ( __GNUC__ )
register word32 cpu_cycle_count asm ("g5");
#else
extern word32 cpu_cycle_count;
#endif
/* These are the core memory access macros used in the 65816 emulator.
* Set these to point to routines which handle your emulated machine's
* memory access (generally these routines will check for access to
* memory-mapped I/O and things of that nature.)
*
* The SYNC pin is useful to trap OS calls, whereas the VP pin is
* needed to emulate hardware which modifies the vector addresses.
*/
#define EMUL_PIN_SYNC 1 // much more work to provide VPD and VPA
#define EMUL_PIN_VP 2
#define M_READ(a) MEM_readMem(a, cpu_cycle_count, 0)
#define M_READ_OPCODE(a) MEM_readMem(a, cpu_cycle_count, EMUL_PIN_SYNC)
#define M_READ_VECTOR(a) MEM_readMem(a, cpu_cycle_count, EMUL_PIN_VP)
#define M_WRITE(a,v) MEM_writeMem((a),(v), cpu_cycle_count)
/* Set this macro to your emulator's "update" routine. Your update
* routine would probably do things like update hardware sprites,
* and check for user keypresses. CPU_run() calls this routine
* periodically to make sure the rest of your emulator gets time
* to run.
*
* v is the number of CPU clock cycles that have elapsed since the last
* call.
*/
#define E_UPDATE(v) EMUL_hardwareUpdate(v)
/* Set this macro to your emulator's routine for handling the WDM
* pseudo-opcode. Useful for trapping certain emulated machine
* functions and emulating them in fast C code.
*
* v is the operand byte immediately following the WDM opcode.
*/
#define E_WDM(v) EMUL_handleWDM( (v), cpu_cycle_count )
/* Set the 65816 emulator's update period (the number of cycles
* elapsed between calls to the E_UPDATE routine.)
*/
void CPU_setUpdatePeriod(word32 period);
/* Set the 65816 emulator's trace mode to off (0) or on (nonzero) */
void CPU_setTrace(int mode);
/* Send a reset to the 65816 emulator. You should do this at */
/* startup before you call CPU_run(). */
void CPU_reset(void);
/* Send an abort to the 65816 emulator. */
void CPU_abort(void);
/* Send a non-maskable interrupt to the 65816 emulator */
void CPU_nmi(void);
/* Send a standard (maskable) interrupt to the 65816 emulator. Up to 32
* IRQ sources are supported. */
void CPU_addIRQ( word32 mask );
/* Clear a previously sent interrupt (if one is still pending) */
void CPU_clearIRQ( word32 mask );
/* This routine never returns; it sits in a loop processing opcodes */
/* until the emulator exits. Periodic calls to the emulator update */
/* macro are made to allow the rest of the emulator to function. */
void CPU_run(void);
/* Internal routine called when the mode bits (e/m/x) change */
void CPU_modeSwitch(void);
/* Internal routine to print the next instruction in trace mode */
void CPU_debug(void);
void CPU_single_step_init(void);
void CPU_single_step(void);
/* These are used by the various macros above, so make sure that we
* declare them for type safety purposes! Thanks to fabys for these on
* the 6502.org forum.
*
* Thanks to BigEd on 6502.org for implementing support for memory access
* modes -- see EMUL_* macros above, near MEM_READ_*, et. al.
*/
void EMUL_handleWDM(byte opcode, word32 timestamp);
void EMUL_hardwareUpdate(word32 timestamp);
byte MEM_readMem(word32 address, word32 timestamp, word32 emulFlags);
void MEM_writeMem(word32 address, byte b, word32 timestamp);
void CPU_setRunAddress(word32 address);
#endif /* _CPU_H */

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/*
* lib65816/cpuevent.c Release 1p2
* See LICENSE for more details.
*
* Copyright 2007 by Samuel A. Falvo II
*/
#include "cpuevent.h"
#include <stdio.h>
struct List
{
CPUEvent * head;
void * null;
CPUEvent * tail;
};
static struct List eventList;
void
CPUEvent_initialize( void )
{
eventList.head = (CPUEvent *)(&eventList.null);
eventList.null = 0;
eventList.tail = (CPUEvent *)(&eventList);
}
void
CPUEvent_elapse( word32 cycles )
{
eventList.head -> counter -= cycles;
if( eventList.head -> counter < 0 )
{
eventList.head -> counter = 0;
CPUEvent_dispatch();
}
}
void
CPUEvent_schedule( CPUEvent *thisEvent, word32 when, CPUHandler *proc )
{
CPUEvent *p, *q;
thisEvent -> counter = when;
thisEvent -> handler = proc;
p = (CPUEvent *)&eventList;
q = p -> next;
while( ( thisEvent -> counter ) && ( q -> next ) )
{
/* Newly scheduled event is before 'q', so insert it in front of
* q and compensate q's countdown accordingly.
*/
if( thisEvent -> counter < q -> counter )
{
p -> next = thisEvent; thisEvent -> next = q;
q -> previous = thisEvent; thisEvent -> previous = p;
q -> counter -= thisEvent -> counter;
return;
}
/* Otherwise, q occurs before thisEvent, so we compensate thisEvent's counter
* as we continue to find the ideal insertion point.
*/
thisEvent -> counter -= q -> counter;
if( thisEvent -> counter < 0 ) thisEvent -> counter = 0;
p = q;
q = q -> next;
}
p -> next = thisEvent; thisEvent -> next = q;
q -> previous = thisEvent; thisEvent -> previous = p;
}
void
CPUEvent_dispatch( void )
{
CPUEvent *p, *nextEvent, *thisEvent;
thisEvent = eventList.head;
while( thisEvent -> next )
{
if( thisEvent -> counter != 0 ) return;
/* We need to dequeue the node FIRST, because the called
* handler may attempt to reschedule the event.
*/
p = thisEvent -> previous; nextEvent = thisEvent -> next;
p -> next = nextEvent; nextEvent -> previous = p;
thisEvent -> handler( 0 ); thisEvent = nextEvent;
}
}

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#ifndef LIB65816_CPUEVENT_H
#define LIB65816_CPUEVENT_H
/* CPUtrel 2 Emulator Release 1p2
* Copyright (c) 2007 Samuel A. Falvo II
* See LICENSE file for more information.
*/
#include "cpu.h"
typedef struct CPUEvent CPUEvent;
typedef void CPUHandler( word32 timestamp );
struct CPUEvent
{
CPUEvent * next;
CPUEvent * previous;
long counter;
CPUHandler * handler;
};
void CPUEvent_elapse( word32 delta );
void CPUEvent_dispatch( void );
void CPUEvent_initialize( void );
void CPUEvent_schedule( CPUEvent *, word32, CPUHandler * );
#endif

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/*
* lib65816/cpumacro.h Release 1p1
* See LICENSE for more details.
*
* Code originally from XGS: Apple IIGS Emulator (cpumacro.h)
*
* Originally written and Copyright (C)1996 by Joshua M. Thompson
* Copyright (C) 2006 by Samuel A. Falvo II
*
* Modified for greater portability and virtual hardware independence.
*/
/* This file contains the macros which are affected by the E, M, or X */
/* bits (as opposed to the macros in micros.h, which aren't affected). */
/* First some #undef's to prevent a lot of annoying compiler warnings. */
#undef C_LDA
#undef C_LDX
#undef C_LDY
#undef C_STA
#undef C_STX
#undef C_STY
#undef C_STZ
#undef C_INC
#undef C_DEC
#undef C_ASL
#undef C_LSR
#undef C_ROL
#undef C_ROR
#undef C_TSB
#undef C_TRB
#undef C_AND
#undef C_ORA
#undef C_EOR
#undef C_BIT
#undef C_ADC
#undef C_SBC
#undef C_CMP
#undef C_CPX
#undef C_CPY
#undef S_PUSH
#undef S_PULL
#undef O_i8
#undef O_i16
#undef O_a
#undef O_al
#undef O_d
#undef O_dix
#undef O_dixl
#undef O_dxi
#undef O_dxx
#undef O_dxy
#undef O_axx
#undef O_axy
#undef O_alxx
#undef O_pcr
#undef O_pcrl
#undef O_ai
#undef O_ail
#undef O_di
#undef O_dil
#undef O_axi
#undef O_sr
#undef O_srix
/*------- Routines that operate on a memory address -------*/
#ifdef SHORT_M
#define C_LDA(a) otmp.B.L = M_READ(a.A); \
C_LDA8(otmp.B.L)
#else
#define C_LDA(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_LDA16(otmp.W)
#endif
#ifdef SHORT_X
#define C_LDX(a) otmp.B.L = M_READ(a.A); \
C_LDX8(otmp.B.L)
#else
#define C_LDX(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_LDX16(otmp.W)
#endif
#ifdef SHORT_X
#define C_LDY(a) otmp.B.L = M_READ(a.A); \
C_LDY8(otmp.B.L)
#else
#define C_LDY(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_LDY16(otmp.W)
#endif
#ifdef SHORT_M
#define C_STA(a) M_WRITE(a.A,A.B.L)
#else
#define C_STA(a) M_WRITE(a.A,A.B.L); \
M_WRITE(a.A+1,A.B.H)
#endif
#ifdef SHORT_X
#define C_STX(a) M_WRITE(a.A,X.B.L)
#else
#define C_STX(a) M_WRITE(a.A,X.B.L); \
M_WRITE(a.A+1,X.B.H)
#endif
#ifdef SHORT_X
#define C_STY(a) M_WRITE(a.A,Y.B.L)
#else
#define C_STY(a) M_WRITE(a.A,Y.B.L); \
M_WRITE(a.A+1,Y.B.H)
#endif
#ifdef SHORT_M
#define C_STZ(a) M_WRITE(a.A,0)
#else
#define C_STZ(a) M_WRITE(a.A,0); \
M_WRITE(a.A+1,0)
#endif
#ifdef SHORT_M
#define C_INC(a) otmp.B.L = M_READ(a.A); \
C_INC8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_INC(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_INC16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_DEC(a) otmp.B.L = M_READ(a.A); \
C_DEC8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_DEC(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_DEC16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_ASL(a) otmp.B.L = M_READ(a.A); \
C_ASL8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_ASL(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_ASL16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_LSR(a) otmp.B.L = M_READ(a.A); \
C_LSR8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_LSR(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_LSR16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_ROL(a) otmp.B.L = M_READ(a.A); \
C_ROL8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_ROL(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_ROL16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_ROR(a) otmp.B.L = M_READ(a.A); \
C_ROR8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_ROR(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_ROR16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_TSB(a) otmp.B.L = M_READ(a.A); \
C_TSB8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_TSB(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_TSB16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_TRB(a) otmp.B.L = M_READ(a.A); \
C_TRB8(otmp.B.L); \
M_WRITE(a.A,otmp.B.L)
#else
#define C_TRB(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_TRB16(otmp.W); \
M_WRITE(a.A,otmp.B.L); \
M_WRITE(a.A+1,otmp.B.H)
#endif
#ifdef SHORT_M
#define C_AND(a) otmp.B.L = M_READ(a.A); \
C_AND8(otmp.B.L)
#else
#define C_AND(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_AND16(otmp.W)
#endif
#ifdef SHORT_M
#define C_ORA(a) otmp.B.L = M_READ(a.A); \
C_ORA8(otmp.B.L)
#else
#define C_ORA(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_ORA16(otmp.W)
#endif
#ifdef SHORT_M
#define C_EOR(a) otmp.B.L = M_READ(a.A); \
C_EOR8(otmp.B.L)
#else
#define C_EOR(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_EOR16(otmp.W)
#endif
#ifdef SHORT_M
#define C_BIT(a) otmp.B.L = M_READ(a.A); \
C_BIT8(otmp.B.L)
#else
#define C_BIT(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_BIT16(otmp.W)
#endif
#ifdef SHORT_M
#define C_ADC(a) otmp.B.L = M_READ(a.A); \
C_ADC8(otmp.B.L)
#else
#define C_ADC(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_ADC16(otmp.W)
#endif
#ifdef SHORT_M
#define C_SBC(a) otmp.B.L = M_READ(a.A); \
C_SBC8(otmp.B.L)
#else
#define C_SBC(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_SBC16(otmp.W)
#endif
#ifdef SHORT_M
#define C_CMP(a) otmp.B.L = M_READ(a.A); \
C_CMP8(otmp.B.L)
#else
#define C_CMP(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_CMP16(otmp.W)
#endif
#ifdef SHORT_X
#define C_CPX(a) otmp.B.L = M_READ(a.A); \
C_CPX8(otmp.B.L)
#else
#define C_CPX(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_CPX16(otmp.W)
#endif
#ifdef SHORT_X
#define C_CPY(a) otmp.B.L = M_READ(a.A); \
C_CPY8(otmp.B.L)
#else
#define C_CPY(a) otmp.B.L = M_READ(a.A); \
otmp.B.H = M_READ(a.A+1); \
C_CPY16(otmp.W)
#endif
/* Macros for pushing or pulling bytes on the 65816 stack */
#ifdef NATIVE_MODE
#define S_PUSH(v) M_WRITE(S.W,v); S.W--
#define S_PULL(v) ++S.W; v = M_READ(S.W)
#else
#define S_PUSH(v) M_WRITE(S.W,v); S.B.L--
#define S_PULL(v) S.B.L++; v = M_READ(S.W)
#endif
/* Macros to retrieve an 8 or 16-bit operand. They take as their parameter */
/* a "dualw" union variable, which they set to the operand. */
#define O_i8(v) v.B.L = M_READ(PC.A); v.B.H = 0; PC.W.PC++
#define O_i16(v) v.B.L = M_READ(PC.A); v.B.H = M_READ(PC.A+1); PC.W.PC += 2
/* Macros to retrieve the operand address. These take as their parameter */
/* a "duala" union variable, which they set to the operand address. */
#define O_a(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; PC.W.PC += 2;
#define O_al(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = M_READ(PC.A+2); PC.W.PC += 3
#define O_d(a) if (D.B.L) cpu_cycle_count++; \
a.A = D.W + M_READ(PC.A); a.B.B = 0; PC.W.PC++
#ifdef SHORT_X
#define O_dix(a) if (D.B.L) cpu_cycle_count++; \
atmp.A = D.W + M_READ(PC.A); atmp.B.B = 0; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB; \
atmp.A = a.A; \
a.A += Y.W; \
if (atmp.B.H != a.B.H) cpu_cycle_count++;
#else
#define O_dix(a) if (D.B.L) cpu_cycle_count++; \
atmp.A = D.W + M_READ(PC.A); atmp.B.B = 0; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB; \
a.A += Y.W;
#endif
#define O_dixl(a) if (D.B.L) cpu_cycle_count++; \
atmp.A = D.W + M_READ(PC.A); atmp.B.B = 0; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = M_READ(atmp.A+2); \
a.A += Y.W
#define O_dxi(a) if (D.B.L) cpu_cycle_count++; \
atmp.A = D.W + M_READ(PC.A) + X.W; atmp.B.B = 0; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB
#ifdef NATIVE_MODE
#define O_dxx(a) if (D.B.L) cpu_cycle_count++; \
a.W.L = (M_READ(PC.A) + D.W + X.W); a.B.B = 0; PC.W.PC++
#define O_dxy(a) if (D.B.L) cpu_cycle_count++; \
a.W.L = (M_READ(PC.A) + D.W + Y.W); a.B.B = 0; PC.W.PC++
#ifdef SHORT_X
#define O_axx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \
atmp.A = a.A; a.A += X.W; \
if (atmp.B.H != a.B.H) cpu_cycle_count++; \
PC.W.PC+=2
#define O_axy(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \
atmp.A = a.A; a.A += Y.W; \
if (atmp.B.H != a.B.H) cpu_cycle_count++; \
PC.W.PC+=2
#else
#define O_axx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \
a.A += X.W; \
PC.W.PC+=2
#define O_axy(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \
a.A += Y.W; \
PC.W.PC+=2
#endif
#else
#define O_dxx(a) if (D.B.L) cpu_cycle_count++; \
a.W.L = (M_READ(PC.A) + D.W + X.W); a.B.H = 0; a.B.B = 0; PC.W.PC++;
#define O_dxy(a) if (D.B.L) cpu_cycle_count++; \
a.W.L = (M_READ(PC.A) + D.W + Y.W); a.B.H = 0; a.B.B = 0; PC.W.PC++;
#define O_axx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \
atmp.A = a.A; a.W.L += X.W; \
if (atmp.B.H != a.B.H) cpu_cycle_count++; \
PC.W.PC+=2
#define O_axy(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = DB; \
atmp.A = a.A; a.W.L += Y.W; \
if (atmp.B.H != a.B.H) cpu_cycle_count++; \
PC.W.PC+=2
#endif
#define O_alxx(a) a.B.L = M_READ(PC.A); a.B.H = M_READ(PC.A+1); a.B.B = M_READ(PC.A+2); a.A += X.W; \
PC.W.PC += 3;
#define O_pcr(a) wtmp.B.L = M_READ(PC.A); PC.W.PC++; \
a.W.L = PC.W.PC + (offset_s) wtmp.B.L; a.B.B = PC.B.PB;
#define O_pcrl(a) wtmp.B.L = M_READ(PC.A); wtmp.B.H = M_READ(PC.A+1); PC.W.PC += 2; \
a.W.L = PC.W.PC + (offset_l) wtmp.W; a.B.B = PC.B.PB;
#define O_ai(a) atmp.B.L = M_READ(PC.A); atmp.B.H = M_READ(PC.A+1); atmp.B.B = 0; PC.W.PC += 2; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = 0;
#define O_ail(a) atmp.B.L = M_READ(PC.A); atmp.B.H = M_READ(PC.A+1); atmp.B.B = 0; PC.W.PC += 2; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = M_READ(atmp.A+2)
#define O_di(a) if (D.B.L) cpu_cycle_count++; \
atmp.A = M_READ(PC.A) + D.W; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB
#define O_dil(a) if (D.B.L) cpu_cycle_count++; \
atmp.A = M_READ(PC.A) + D.W; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = M_READ(atmp.A+2)
#define O_axi(a) atmp.B.L = M_READ(PC.A); atmp.B.H = M_READ(PC.A+1); \
atmp.A += X.W; atmp.B.B = PC.B.PB; \
PC.W.PC += 2; a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = PC.B.PB
#define O_sr(a) a.W.L = M_READ(PC.A) + S.W; a.B.B = 0; PC.W.PC++
#define O_srix(a) atmp.W.L = M_READ(PC.A) + S.W; atmp.B.B = 0; PC.W.PC++; \
a.B.L = M_READ(atmp.A); a.B.H = M_READ(atmp.A+1); a.B.B = DB; a.A += Y.W

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/*
* lib65816/cpumicro.h Release 1p1
* See LICENSE for more details.
*
* Code originally from XGS: Apple IIGS Emulator (cpumicro.h)
*
* Originally written and Copyright (C)1996 by Joshua M. Thompson
* Copyright (C) 2006 by Samuel A. Falvo II
*
* Modified for greater portability and virtual hardware independence.
*/
/* This file defines "micro operation" macros; that is, very low-level */
/* operations that are independent of the state of the E, M, or X bits. */
/* Macros for setting/clearing program status register bits */
#define F_setN(v) if (v) P |= 0x80; else P &= ~0x80
#define F_setV(v) if (v) P |= 0x40; else P &= ~0x40
#define F_setM(v) if (v) P |= 0x20; else P &= ~0x20
#define F_setX(v) if (v) P |= 0x10; else P &= ~0x10
#define F_setB(v) if (v) P |= 0x10; else P &= ~0x10
#define F_setD(v) if (v) P |= 0x08; else P &= ~0x08
#define F_setI(v) if (v) P |= 0x04; else P &= ~0x04
#define F_setZ(v) if (v) P |= 0x02; else P &= ~0x02
#define F_setC(v) if (v) P |= 0x01; else P &= ~0x01
/* Macros for testing program status register bits */
#define F_getN ((P & 0x80)? 1:0)
#define F_getV ((P & 0x40)? 1:0)
#define F_getM ((P & 0x20)? 1:0)
#define F_getX ((P & 0x10)? 1:0)
#define F_getD ((P & 0x08)? 1:0)
#define F_getI ((P & 0x04)? 1:0)
#define F_getZ ((P & 0x02)? 1:0)
#define F_getC ((P & 0x01)? 1:0)
/*------- Routines that operate on an 8/16-bit value -------*/
#define C_SETF8(v) F_setN(v & 0x80); \
F_setZ(!v)
#define C_SETF16(v) F_setN(v & 0x8000); \
F_setZ(!v)
#define C_LDA8(v) A.B.L = v; \
C_SETF8(v)
#define C_LDA16(v) A.W = v; \
C_SETF16(v)
#define C_LDX8(v) X.B.L = v; \
C_SETF8(v)
#define C_LDX16(v) X.W = v; \
C_SETF16(v)
#define C_LDY8(v) Y.B.L = v; \
C_SETF8(v)
#define C_LDY16(v) Y.W = v; \
C_SETF16(v)
#define C_INC8(v) v++; \
C_SETF8(v)
#define C_INC16(v) v++; \
C_SETF16(v)
#define C_DEC8(v) v--; \
C_SETF8(v)
#define C_DEC16(v) v--; \
C_SETF16(v)
#define C_ASL8(v) F_setC(v & 0x80); \
v = v << 1; \
C_SETF8(v)
#define C_ASL16(v) F_setC(v & 0x8000); \
v = v << 1; \
C_SETF16(v)
#define C_LSR8(v) F_setC(v & 0x01); \
v = v >> 1; \
C_SETF8(v)
#define C_LSR16(v) F_setC(v & 0x0001); \
v = v >> 1; \
C_SETF16(v)
#define C_ROL8(v) wtmp.B.L = P & 0x01; \
F_setC(v & 0x80); \
v = (v << 1) | wtmp.B.L; \
C_SETF8(v)
#define C_ROL16(v) wtmp.W = P & 0x01; \
F_setC(v & 0x8000); \
v = (v << 1) | wtmp.W; \
C_SETF16(v)
#define C_ROR8(v) wtmp.B.L = (P & 0x01) << 7; \
F_setC(v & 0x01); \
v = (v >> 1) | wtmp.B.L; \
C_SETF8(v)
#define C_ROR16(v) wtmp.W = (P & 0x01) << 15; \
F_setC(v & 0x0001); \
v = (v >> 1) | wtmp.W; \
C_SETF16(v)
#define C_TSB8(v) F_setZ(!(v & A.B.L)); \
v |= A.B.L;
#define C_TSB16(v) F_setZ(!(v & A.W)); \
v |= A.W;
#define C_TRB8(v) F_setZ(!(v & A.B.L)); \
v &= ~A.B.L;
#define C_TRB16(v) F_setZ(!(v & A.W)); \
v &= ~A.W;
#define C_AND8(v) A.B.L &= v; \
C_SETF8(A.B.L)
#define C_AND16(v) A.W &= v; \
C_SETF16(A.W)
#define C_ORA8(v) A.B.L |= v; \
C_SETF8(A.B.L)
#define C_ORA16(v) A.W |= v; \
C_SETF16(A.W)
#define C_EOR8(v) A.B.L ^= v; \
C_SETF8(A.B.L)
#define C_EOR16(v) A.W ^= v; \
C_SETF16(A.W)
#define C_BIT8(v) F_setN(v & 0x80); \
F_setV(v & 0x40); \
F_setZ(!(v & A.B.L)); \
#define C_BIT16(v) F_setN(v & 0x8000); \
F_setV(v & 0x4000); \
F_setZ(!(v & A.W)); \
#define C_ADC8(v) if (F_getD) { \
a1 = A.B.L & 0x0F; \
a2 = (A.B.L >> 4) & 0x0F; \
o1 = v & 0x0F; \
o2 = (v >> 4) & 0x0F; \
a1 += (o1 + F_getC); \
a2 += o2; \
if (a1>9) { \
a1 -= 10; \
a2++; \
} \
if (a2>9) { \
a2 -= 10; \
F_setC(1); \
} else { \
F_setC(0); \
} \
wtmp.W = (a2 << 4) | a1; \
} else { \
wtmp.W = A.B.L + v + F_getC; \
F_setC(wtmp.B.H); \
} \
F_setV(~(A.B.L ^ v) & (A.B.L ^ wtmp.B.L) & 0x80); \
A.B.L = wtmp.B.L; \
C_SETF8(A.B.L);
#define C_ADC16(v) if (F_getD) { \
a1 = A.W & 0x0F; \
a2 = (A.W >> 4) & 0x0F; \
a3 = (A.W >> 8) & 0x0F; \
a4 = (A.W >> 12) & 0x0F; \
o1 = v & 0x0F; \
o2 = (v >> 4) & 0x0F; \
o3 = (v >> 8) & 0x0F; \
o4 = (v >> 12) & 0x0F; \
a1 += (o1 + F_getC); \
a2 += o2; \
a3 += o3; \
a4 += o4; \
if (a1>9) { \
a1 -= 10; \
a2++; \
} \
if (a2>9) { \
a2 -= 10; \
a3++; \
} \
if (a3>9) { \
a3 -= 10; \
a4++; \
} \
if (a4>9) { \
a4 -= 10; \
F_setC(1); \
} else { \
F_setC(0); \
} \
atmp.A = (a4 << 12) | (a3 << 8) | (a2 << 4) | a1; \
} else { \
atmp.A = A.W + v + F_getC; \
F_setC(atmp.W.H); \
} \
F_setV(~(A.W ^ v) & (A.W ^ atmp.W.L) & 0x8000); \
A.W = atmp.W.L; \
C_SETF16(A.W);
#define C_SBC8(v) if (F_getD) { \
a1 = A.B.L & 0x0F; \
a2 = (A.B.L >> 4) & 0x0F; \
o1 = v & 0x0F; \
o2 = (v >> 4) & 0x0F; \
a1 -= (o1 + !F_getC); \
a2 -= o2; \
if (a1<0) { \
a1 += 10; \
a2--; \
} \
if (a2<0) { \
a2 += 10; \
F_setC(0); \
} else { \
F_setC(1); \
} \
wtmp.W = (a2 << 4) | a1; \
} else { \
wtmp.W = (A.B.L - v) - !F_getC; \
F_setC(!wtmp.B.H); \
} \
F_setV((A.B.L ^ v) & (A.B.L ^ wtmp.B.L) & 0x80); \
A.B.L = wtmp.B.L; \
C_SETF8(A.B.L);
#define C_SBC16(v) if (F_getD) { \
a1 = A.W & 0x0F; \
a2 = (A.W >> 4) & 0x0F; \
a3 = (A.W >> 8) & 0x0F; \
a4 = (A.W >> 12) & 0x0F; \
o1 = v & 0x0F; \
o2 = (v >> 4) & 0x0F; \
o3 = (v >> 8) & 0x0F; \
o4 = (v >> 12) & 0x0F; \
a1 -= (o1 + !F_getC); \
a2 -= o2; \
a3 -= o3; \
a4 -= o4; \
if (a1<0) { \
a1 += 10; \
a2--; \
} \
if (a2<0) { \
a2 += 10; \
a3--; \
} \
if (a3<0) { \
a3 += 10; \
a4--; \
} \
if (a4<0) { \
a4 += 10; \
F_setC(0); \
} else { \
F_setC(1); \
} \
atmp.A = (a4 << 12) | (a3 << 8) | (a2 << 4) | a1; \
} else { \
atmp.A = (A.W - v) - !F_getC; \
F_setC(!atmp.W.H); \
} \
A.W = atmp.W.L; \
F_setV((A.W ^ v) & (A.W ^ atmp.W.L) & 0x8000); \
C_SETF16(A.W);
#define C_CMP8(v) wtmp.W = A.B.L - v; \
F_setC(!wtmp.B.H); \
C_SETF8(wtmp.B.L)
#define C_CMP16(v) atmp.A = A.W - v; \
F_setC(!atmp.W.H); \
C_SETF16(atmp.W.L)
#define C_CPX8(v) wtmp.W = X.B.L - v; \
F_setC(!wtmp.B.H); \
C_SETF8(wtmp.B.L)
#define C_CPX16(v) atmp.A = X.W - v; \
F_setC(!atmp.W.H); \
C_SETF16(atmp.W.L)
#define C_CPY8(v) wtmp.W = Y.B.L - v; \
F_setC(!wtmp.B.H); \
C_SETF8(wtmp.B.L)
#define C_CPY16(v) atmp.A = Y.W - v; \
F_setC(!atmp.W.H); \
C_SETF16(atmp.W.L)

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/*
* lib65816/debugger.c Release 1p1
* Copyright (C) 2006 by Samuel A. Falvo II
* See LICENSE for more details.
*
* 2007 Jan 5 saf2
* Complete rewrite as the old "debugger" (really a tracer) was just rife
* with bugs and utterly lacking in suitable features.
*/
#include "config.h"
#ifdef DEBUG
#include "cpu.h"
#include <stdio.h>
#include "cpumicro.h"
/* 65816 debugger module */
char *mnemonics[256] = {
"BRK", "ORA", "COP", "ORA", "TSB", "ORA", "ASL", "ORA",
"PHP", "ORA", "ASL", "PHD", "TSB", "ORA", "ASL", "ORA",
"BPL", "ORA", "ORA", "ORA", "TRB", "ORA", "ASL", "ORA",
"CLC", "ORA", "INC", "TCS", "TRB", "ORA", "ASL", "ORA",
"JSR", "AND", "JSL", "AND", "BIT", "AND", "ROL", "AND",
"PLP", "AND", "ROL", "PLD", "BIT", "AND", "ROL", "AND",
"BMI", "AND", "AND", "AND", "BIT", "AND", "ROL", "AND",
"SEC", "AND", "DEC", "TSC", "BIT", "AND", "ROL", "AND",
"RTI", "EOR", "WDM", "EOR", "MVP", "EOR", "LSR", "EOR",
"PHA", "EOR", "LSR", "PHK", "JMP", "EOR", "LSR", "EOR",
"BVC", "EOR", "EOR", "EOR", "MVN", "EOR", "LSR", "EOR",
"CLI", "EOR", "PHY", "TCD", "JMP", "EOR", "LSR", "EOR",
"RTS", "ADC", "PER", "ADC", "STZ", "ADC", "ROR", "ADC",
"PLA", "ADC", "ROR", "RTL", "JMP", "ADC", "ROR", "ADC",
"BVS", "ADC", "ADC", "ADC", "STZ", "ADC", "ROR", "ADC",
"SEI", "ADC", "PLY", "TDC", "JMP", "ADC", "ROR", "ADC",
"BRA", "STA", "BRL", "STA", "STY", "STA", "STX", "STA",
"DEY", "BIT", "TXA", "PHB", "STY", "STA", "STX", "STA",
"BCC", "STA", "STA", "STA", "STY", "STA", "STX", "STA",
"TYA", "STA", "TXS", "TXY", "STZ", "STA", "STZ", "STA",
"LDY", "LDA", "LDX", "LDA", "LDY", "LDA", "LDX", "LDA",
"TAY", "LDA", "TAX", "PLB", "LDY", "LDA", "LDX", "LDA",
"BCS", "LDA", "LDA", "LDA", "LDY", "LDA", "LDX", "LDA",
"CLV", "LDA", "TSX", "TYX", "LDY", "LDA", "LDX", "LDA",
"CPY", "CMP", "REP", "CMP", "CPY", "CMP", "DEC", "CMP",
"INY", "CMP", "DEX", "WAI", "CPY", "CMP", "DEC", "CMP",
"BNE", "CMP", "CMP", "CMP", "PEI", "CMP", "DEC", "CMP",
"CLD", "CMP", "PHX", "STP", "JML", "CMP", "DEC", "CMP",
"CPX", "SBC", "SEP", "SBC", "CPX", "SBC", "INC", "SBC",
"INX", "SBC", "NOP", "XBA", "CPX", "SBC", "INC", "SBC",
"BEQ", "SBC", "SBC", "SBC", "PEA", "SBC", "INC", "SBC",
"SED", "SBC", "PLX", "XCE", "JSR", "SBC", "INC", "SBC"
};
enum modes {
IMM8,
IMM,
IMMX,
ACC,
PCR,
PCRL,
IMPL,
DP,
DPX,
DPY,
DPI,
DPIX,
DPIY,
DPIL,
DPILY,
ABS,
ABSX,
ABSY,
ABSL,
ABSLX,
STK,
STKIY,
ABSI,
ABSIX,
BLK
};
int addrmodes[256] = {
IMM8, DPIX, IMM8, STK, DP, DP, DP, DPIL,
IMPL, IMM, ACC, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, DP, DPX, DPX, DPILY,
IMPL, ABSY, ACC, IMPL, ABS, ABSX, ABSX, ABSLX,
ABS, DPIX, ABSL, STK, DP, DP, DP, DPIL,
IMPL, IMM, ACC, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, DPX, DPX, DPX, DPILY,
IMPL, ABSY, ACC, IMPL, ABSX, ABSX, ABSX, ABSLX,
IMPL, DPIX, IMM8, STK, BLK, DP, DP, DPIL,
IMPL, IMM, ACC, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, BLK, DPX, DPX, DPILY,
IMPL, ABSY, IMPL, IMPL, ABSL, ABSX, ABSX, ABSX,
IMPL, DPIX, IMPL, STK, DP, DP, DP, DPIL,
IMPL, IMM, ACC, IMPL, ABSI, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, DPX, DPX, DPX, DPILY,
IMPL, ABSY, IMPL, IMPL, ABSIX, ABSX, ABSX, ABSLX,
PCR, DPIX, PCRL, STK, DP, DP, DP, DPIL,
IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, DPX, DPX, DPX, DPILY,
IMPL, ABSY, IMPL, IMPL, ABS, ABSX, ABSX, ABSLX,
IMMX, DPIX, IMMX, STK, DP, DP, DP, DPIL,
IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, DPX, DPX, DPY, DPILY,
IMPL, ABSY, IMPL, IMPL, ABSX, ABSX, ABSY, ABSLX,
IMMX, DPIX, IMM8, STK, DP, DP, DP, DPIL,
IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, DPI, DPX, DPX, DPILY,
IMPL, ABSY, IMPL, IMPL, ABSI, ABSX, ABSX, ABSLX,
IMMX, DPIX, IMM8, STK, DP, DP, DP, DPIL,
IMPL, IMM, IMPL, IMPL, ABS, ABS, ABS, ABSL,
PCR, DPIY, DPI, STKIY, ABS, DPX, DPX, DPILY,
IMPL, ABSY, IMPL, IMPL, ABSIX, ABSX, ABSX, ABSLX
};
extern int cpu_irq;
void CPU_debug(void) {
int opcode;
int mode;
int operand;
int ea;
char operands[40];
opcode = M_READ(PC.A);
mode = addrmodes[opcode];
printf("A=%04X X=%04X Y=%04X S=%04X D=%04X B=%02X P=%02X E=%1d ",
(int) A.W, (int) X.W,
(int) Y.W, (int) S.W,
(int) D.W, (int) DB,
(int) P, (int) E);
printf("%02X/%04X %s ",(int) PC.B.PB,(int) PC.W.PC,mnemonics[opcode]);
switch (mode) {
case IMM8:
sprintf( operands, "#$%02X", M_READ(PC.A+1) );
break;
case IMM:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
if( F_getM ) sprintf( operands, "#$%02X", (operand & 0xFF));
else sprintf( operands, "#$%04X", operand );
break;
case IMMX:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
if( F_getX ) sprintf( operands, "#$%02X", (operand & 0xFF));
else sprintf( operands, "#$%04X", operand );
break;
case ACC:
sprintf( operands, "A" );
break;
case PCR:
operand = M_READ(PC.A+1);
sprintf( operands, "$%02X ($%02X%04X)", operand, PC.B.PB, PC.W.PC + operand + 2);
break;
case PCRL:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
sprintf( operands, "$%02X ($%02X%04X)", operand, PC.B.PB, PC.W.PC + operand + 3);
break;
case IMPL:
sprintf( operands, "" );
break;
case DP:
operand = M_READ(PC.A+1);
ea = D.W + operand;
sprintf( operands, "$%02X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPX:
operand = M_READ(PC.A+1);
if( F_getX ) ea = D.W + operand + X.B.L;
else ea = D.W + operand + X.W;
sprintf( operands, "$%02X,X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPY:
operand = M_READ(PC.A+1);
if( F_getX ) ea = D.W + operand + Y.B.L;
else ea = D.W + operand + Y.W;
sprintf( operands, "$%02X,Y (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPI:
operand = M_READ(PC.A+1);
ea = D.W + operand;
ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16);
sprintf( operands, "($%02X) (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPIX:
operand = M_READ(PC.A+1);
if( F_getX ) ea = D.W + operand + X.B.L;
else ea = D.W + operand + X.W;
ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16);
sprintf( operands, "($%02X,X) (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPIY:
operand = M_READ(PC.A+1);
ea = D.W + operand;
if( F_getX ) ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16) + Y.B.L;
else ea = M_READ(ea) | (M_READ(ea+1)<<8) | (DB<<16) + Y.W;
sprintf( operands, "($%02X),Y (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPIL:
operand = M_READ(PC.A+1);
ea = D.W + operand;
ea = M_READ(ea) | (M_READ(ea+1)<<8) | (M_READ(ea+2)<<16);
sprintf( operands, "[$%02X] (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case DPILY:
operand = M_READ(PC.A+1);
ea = D.W + operand;
if( F_getX ) ea = M_READ(ea) | (M_READ(ea+1)<<8) | (M_READ(ea+2)<<16) + Y.B.L;
else ea = M_READ(ea) | (M_READ(ea+1)<<8) | (M_READ(ea+2)<<16) + Y.W;
sprintf( operands, "[$%02X],Y (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABS:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
ea = operand + (DB<<16);
sprintf( operands, "$%04X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABSX:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
if( F_getX ) ea = operand + (DB<<16) + X.B.L;
else ea = operand + (DB<<16) + X.W;
sprintf( operands, "$%04X,X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABSY:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
if( F_getX ) ea = operand + (DB<<16) + Y.B.L;
else ea = operand + (DB<<16) + Y.W;
sprintf( operands, "$%04X,Y (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABSL:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8) | (M_READ(PC.A+3)<<16);
ea = operand;
sprintf( operands, "$%06X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABSLX:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8) | (M_READ(PC.A+3)<<16);
if( F_getX ) ea = operand + X.B.L;
else ea = operand + X.W;
sprintf( operands, "$%06X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABSI:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
ea = M_READ(operand) + (M_READ(operand+1)<<8) + (DB<<16);
sprintf( operands, "$%04X (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case ABSIX:
operand = M_READ(PC.A+1) | (M_READ(PC.A+2)<<8);
ea = operand | (PC.B.PB << 16);
ea = M_READ(ea) + (M_READ(ea+1)<<8) + (PC.B.PB<<16);
sprintf( operands, "($%04X,X) (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case STK:
operand = M_READ(PC.A+1);
ea = operand + S.W;
sprintf( operands, "$%02X,S (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case STKIY:
operand = M_READ(PC.A+1);
ea = operand + S.W;
if( F_getX ) ea = M_READ(ea) + (M_READ(ea+1)<<8) + (DB<<16) + Y.B.L;
else ea = M_READ(ea) + (M_READ(ea+1)<<8) + (DB<<16) + Y.W;
sprintf( operands, "$%02X,S (@%06X %02X %02X %02X ...)",
operand, ea, M_READ(ea), M_READ(ea+1), M_READ(ea+2) );
break;
case BLK:
sprintf( operands, "$%02X, $%02X", M_READ(PC.A+2), M_READ(PC.A+1) );
break;
}
printf( "%s\n", operands );
fflush(stdout);
}
#endif

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/*
* lib65816/dispatch.c Release 1p1
* See LICENSE for more details.
*
* Code originally from XGS: Apple IIGS Emulator (dispatch.c)
*
* Originally written and Copyright (C)1996 by Joshua M. Thompson
* Copyright (C) 2006 by Samuel A. Falvo II
*
* Modified for greater portability and virtual hardware independence.
*/
#define CPU_DISPATCH
#include "cpu.h"
#include "cpumicro.h"
#include "util.h"
//#define LIMIT_INSTRUCTION_COUNT 10000
//void CPUEvent_elapse( word32 cycles );
int dispatch_quit = 0;
dualw A; /* Accumulator */
dualw D; /* Direct Page Register */
byte P; /* Processor Status Register */
int E; /* Emulation Mode Flag */
dualw S; /* Stack Pointer */
dualw X; /* X Index Register */
dualw Y; /* Y Index Register */
byte DB; /* Data Bank Register */
union {
#ifdef WORDS_BIGENDIAN
struct { byte Z,PB,H,L; } B;
struct { word16 Z,PC; } W;
#else
struct { byte L,H,PB,Z; } B;
struct { word16 PC,Z; } W;
#endif
word32 A;
} PC;
duala atmp,opaddr;
dualw wtmp,otmp,operand;
int a1,a2,a3,a4,o1,o2,o3,o4;
#ifdef OLDCYCLES
byte *cpu_curr_cycle_table;
#endif
void (**cpu_curr_opcode_table)();
extern int cpu_reset,cpu_abort,cpu_nmi,cpu_irq,cpu_stop,cpu_wait,cpu_trace;
extern int cpu_update_period;
extern int cpu_irne64,cpu_irqt5;
extern void (*cpu_opcode_table[1310])();
#ifdef OLDCYCLES
/* Base cycle counts for all possible 1310 opcodes (262 opcodes x 5 modes). */
/* The opcode handlers may add additional cycles to handle special cases such */
/* a non-page-aligned direct page register or taking a branch. */
byte cpu_cycle_table[1310] =
{
8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=0, m=1, x=1 */
2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 2, 2, 6, 4, 7, 5,
6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5,
2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 2, 2, 4, 4, 7, 5,
7, 6, 2, 4, 7, 3, 5, 6, 3, 2, 2, 3, 3, 4, 6, 5,
2, 5, 5, 7, 7, 4, 6, 6, 2, 4, 3, 2, 4, 4, 7, 5,
6, 6, 6, 4, 3, 3, 5, 6, 4, 2, 2, 6, 5, 4, 6, 5,
2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
2, 6, 3, 4, 3, 3, 3, 6, 2, 2, 2, 3, 4, 4, 4, 5,
2, 6, 5, 7, 4, 4, 4, 6, 2, 5, 2, 2, 4, 5, 5, 5,
2, 6, 2, 4, 3, 3, 3, 6, 2, 2, 2, 4, 4, 4, 4, 5,
2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5,
2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 4, 5,
2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5,
2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5,
2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
0, 0, 0, 0, 0, 0,
8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=0, m=1, x=0 */
2, 6, 5, 7, 5, 4, 6, 6, 2, 5, 2, 2, 6, 5, 7, 5,
6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5,
2, 6, 5, 7, 4, 4, 6, 6, 2, 5, 2, 2, 5, 5, 7, 5,
7, 6, 2, 4, 0, 3, 5, 6, 4, 2, 2, 3, 3, 4, 6, 5,
2, 6, 5, 7, 0, 4, 6, 6, 2, 5, 4, 2, 4, 5, 7, 5,
6, 6, 6, 4, 3, 3, 5, 6, 5, 2, 2, 6, 5, 4, 6, 5,
2, 6, 5, 7, 4, 4, 6, 6, 2, 5, 5, 2, 6, 5, 7, 5,
2, 6, 3, 4, 4, 3, 4, 6, 2, 2, 2, 3, 5, 4, 5, 5,
2, 6, 5, 7, 5, 4, 5, 6, 2, 5, 2, 2, 4, 5, 5, 5,
3, 6, 3, 4, 4, 3, 4, 6, 2, 2, 2, 4, 5, 4, 5, 5,
2, 6, 5, 7, 5, 4, 5, 6, 2, 5, 2, 2, 5, 5, 5, 5,
3, 6, 3, 4, 4, 3, 6, 6, 2, 2, 2, 3, 5, 4, 6, 5,
2, 6, 5, 7, 6, 4, 8, 6, 2, 5, 4, 3, 6, 5, 7, 5,
3, 6, 3, 4, 4, 3, 6, 6, 2, 2, 2, 3, 5, 4, 6, 5,
2, 6, 5, 7, 5, 4, 8, 6, 2, 5, 5, 2, 6, 5, 7, 5,
0, 0, 0, 0, 0, 0,
8, 7, 8, 5, 7, 4, 7, 7, 3, 3, 2, 4, 8, 5, 8, 6, /* e=0, m=0, x=1 */
2, 6, 6, 8, 7, 5, 8, 7, 2, 5, 2, 2, 8, 5, 9, 6,
6, 7, 8, 5, 4, 4, 7, 7, 4, 3, 2, 5, 5, 5, 8, 6,
2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 2, 2, 5, 5, 9, 6,
7, 7, 2, 5, 0, 4, 7, 7, 4, 3, 2, 3, 3, 5, 8, 6,
2, 6, 6, 8, 0, 5, 8, 7, 2, 5, 3, 2, 4, 5, 9, 6,
6, 7, 6, 5, 4, 4, 7, 7, 5, 3, 2, 6, 5, 5, 8, 6,
2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 4, 2, 6, 5, 9, 6,
2, 7, 3, 5, 3, 4, 3, 7, 2, 3, 2, 3, 4, 5, 4, 6,
2, 6, 6, 8, 4, 5, 4, 7, 2, 5, 2, 2, 5, 5, 5, 6,
2, 7, 2, 5, 3, 4, 3, 7, 2, 3, 2, 4, 4, 5, 4, 6,
2, 6, 6, 8, 4, 5, 4, 7, 2, 5, 2, 2, 4, 5, 4, 6,
2, 7, 3, 5, 3, 4, 7, 7, 2, 3, 2, 3, 4, 5, 8, 6,
2, 6, 6, 8, 6, 5, 8, 7, 2, 5, 3, 3, 6, 5, 9, 6,
2, 7, 3, 5, 3, 4, 7, 7, 2, 3, 2, 3, 4, 5, 8, 6,
2, 6, 6, 8, 5, 5, 8, 7, 2, 5, 4, 2, 6, 5, 9, 6,
0, 0, 0, 0, 0, 0,
8, 7, 8, 5, 7, 4, 7, 7, 3, 3, 2, 4, 8, 5, 8, 6, /* e=0, m=0, x=0 */
2, 7, 6, 8, 7, 5, 8, 7, 2, 6, 2, 2, 8, 6, 9, 6,
6, 7, 8, 5, 4, 4, 7, 7, 4, 3, 2, 5, 5, 5, 8, 6,
2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 2, 2, 6, 6, 9, 6,
7, 7, 2, 5, 0, 4, 7, 7, 3, 3, 2, 3, 3, 5, 8, 6,
2, 7, 6, 8, 0, 5, 8, 7, 2, 6, 4, 2, 4, 6, 9, 6,
6, 7, 6, 5, 4, 4, 7, 7, 4, 3, 2, 6, 5, 5, 8, 6,
2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 5, 2, 6, 6, 9, 6,
2, 7, 3, 5, 4, 4, 4, 7, 2, 3, 2, 3, 5, 5, 5, 6,
2, 7, 6, 8, 5, 5, 5, 7, 2, 6, 2, 2, 5, 6, 6, 6,
3, 7, 3, 5, 4, 4, 4, 7, 2, 3, 2, 4, 5, 5, 5, 6,
2, 7, 6, 8, 5, 5, 5, 7, 2, 6, 2, 2, 5, 6, 5, 6,
3, 7, 3, 5, 4, 4, 7, 7, 2, 3, 2, 3, 5, 5, 8, 6,
2, 7, 6, 8, 6, 5, 8, 7, 2, 6, 4, 3, 6, 6, 9, 6,
3, 7, 3, 5, 4, 4, 7, 7, 2, 3, 2, 3, 5, 5, 8, 6,
2, 7, 6, 8, 5, 5, 8, 7, 2, 6, 5, 2, 6, 6, 9, 6,
0, 0, 0, 0, 0, 0,
8, 6, 8, 4, 5, 3, 5, 6, 3, 2, 2, 4, 6, 4, 6, 5, /* e=1, m=1, x=1 */
2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 2, 2, 6, 4, 7, 5,
6, 6, 8, 4, 3, 3, 5, 6, 4, 2, 2, 5, 4, 4, 6, 5,
2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 2, 2, 4, 4, 7, 5,
7, 6, 2, 4, 0, 3, 5, 6, 3, 2, 2, 3, 3, 4, 6, 5,
2, 5, 5, 7, 0, 4, 6, 6, 2, 4, 3, 2, 4, 4, 7, 5,
6, 6, 6, 4, 3, 3, 5, 6, 4, 2, 2, 6, 5, 4, 6, 5,
2, 5, 5, 7, 4, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
2, 6, 3, 4, 3, 3, 3, 6, 2, 2, 2, 3, 4, 4, 4, 5,
2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5,
2, 6, 2, 4, 3, 3, 3, 6, 2, 2, 2, 4, 4, 4, 4, 5,
2, 5, 5, 7, 4, 4, 4, 6, 2, 4, 2, 2, 4, 4, 4, 5,
2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5,
2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5,
2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5,
2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5,
0, 0, 0, 0, 0, 0
};
#endif
void CPU_run(void)
{
word32 last_update,next_update;
int opcode;
#ifdef LIMIT_INSTRUCTION_COUNT
long instructionCount = 0;
#endif
cpu_cycle_count = 0;
last_update = 0;
next_update = cpu_update_period;
E = 1;
F_setM(1);
F_setX(1);
CPU_modeSwitch();
dispatch:
// CPUEvent_elapse( cpu_cycle_count );
// cpu_cycle_count = 0;
if (dispatch_quit)
return;
// TODO remove this.
#ifdef LIMIT_INSTRUCTION_COUNT
instructionCount++;
if (instructionCount > LIMIT_INSTRUCTION_COUNT)
return;
#endif
// #ifdef E_UPDATE
if (cpu_cycle_count >= next_update) goto update;
update_resume:
// #endif
#ifdef DEBUG
if (cpu_trace) goto debug;
debug_resume:
#endif
if (cpu_reset) goto reset;
if (cpu_stop) goto dispatch;
if (cpu_abort) goto abort;
if (cpu_nmi) goto nmi;
if (cpu_irq) goto irq;
if (cpu_irne64) goto irne64;
if (cpu_irqt5) goto irqt5;
irq_return:
if (cpu_wait) { cpu_cycle_count++; goto dispatch; }
opcode = M_READ_OPCODE(PC.A);
PC.W.PC++;
#ifdef OLDCYCLES
cpu_cycle_count += cpu_curr_cycle_table[opcode];
#endif
(**cpu_curr_opcode_table[opcode])();
goto dispatch;
/* Special cases. Since these don't happen a lot more often than they */
/* do happen, accessing them this way means most of the time the */
/* generated code is _not_ branching. Only during the special cases do */
/* we take the branch penalty (if there is one). */
// #ifdef E_UPDATE
update:
E_UPDATE(cpu_cycle_count);
last_update = cpu_cycle_count;
next_update = last_update + cpu_update_period;
goto update_resume;
// #endif
#ifdef DEBUG
debug:
CPU_debug();
goto debug_resume;
#endif
reset:
(**cpu_curr_opcode_table[256])();
goto dispatch;
abort:
(**cpu_curr_opcode_table[257])();
goto dispatch;
nmi:
(**cpu_curr_opcode_table[258])();
goto dispatch;
irq:
if (P & 0x04) goto irq_return;
(**cpu_curr_opcode_table[259])();
goto dispatch;
irne64:
if (P & 0x04) goto irq_return;
(**cpu_curr_opcode_table[260])();
goto dispatch;
irqt5:
if (P & 0x04) goto irq_return;
(**cpu_curr_opcode_table[261])();
goto dispatch;
}
/* Recalculate opcode_offset based on the new processor mode */
void CPU_modeSwitch(void) {
int opcode_offset;
if (E) {
opcode_offset = 1048;
} else {
if (F_getX) {
X.B.H = 0;
Y.B.H = 0;
}
opcode_offset = ((~P >> 4) & 0x03) * 262;
}
#ifdef OLDCYCLES
cpu_curr_cycle_table = cpu_cycle_table + opcode_offset;
#endif
cpu_curr_opcode_table = cpu_opcode_table + opcode_offset;
}

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#include <stdio.h>
#include <stdbool.h>
#include <stdint.h>
#include <SDL.h>
// implement these later
void psg_reset(void) {
}
void pcm_reset(void) {
}
void machine_dump(const char* msg) {
}
void machine_reset() { }
void machine_nmi() { }
void machine_paste(const char* text) { }
void machine_toggle_warp() { }
void sdcard_attach() { }
void sdcard_detach() { }
void mouse_button_down(int num) { }
void mouse_button_up(int num) { }
void mouse_move(int x, int y) { }
void mouse_set_wheel(int y) { }
void mouse_send_state() { }
void audio_render() { }
void joystick_add(int index) { }
void joystick_remove(int index) { }
void joystick_button_down(int instance_id, uint8_t button) { }
void joystick_button_up(int instance_id, uint8_t button) { }
bool grab_mouse = false;
bool warp_mode = false;
bool disable_emu_cmd_keys = false;
bool enable_midline = false;
bool log_video = false;
// TODO this needs to be moved to smc.c
uint8_t activity_led = 0;
uint32_t key_modifiers = 0;
uint32_t key_scancode = 0;
uint8_t machine_mhz = 8;
extern bool video_init(int window_scale, float screen_x_scale, char *quality, bool fullscreen, float opacity);
extern bool video_step(float mhz, float steps, bool midline);
extern bool video_update(void);
extern void video_end(void);
extern void video_reset(void);
extern void video_write(uint8_t reg, uint8_t value);
extern uint8_t video_read(uint8_t reg, bool debugOn);

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#ifndef _GLUE_H_
#define _GLUE_H_
#include <stdbool.h>
#include <stdint.h>
#include <SDL.h>
#define WINDOW_TITLE "Vera Window"
#define MOUSE_GRAB_MSG " (Ctrl+M to end mouse/keyboard capture)"
#define MHZ machine_mhz
extern bool grab_mouse;
extern bool warp_mode;
extern uint8_t activity_led;
extern bool disable_emu_cmd_keys;
extern bool enable_midline;
extern uint8_t machine_mhz;
extern bool log_video;
void psg_reset(void);
void pcm_reset(void);
void machine_dump(const char* msg);
void machine_reset();
void machine_nmi();
void machine_paste(const char* text);
void machine_toggle_warp();
void sdcard_attach();
void sdcard_detach();
void mouse_button_down(int num);
void mouse_button_up(int num);
void mouse_move(int x, int y);
void mouse_set_wheel(int y);
void mouse_send_state();
void audio_render();
void joystick_add(int index);
void joystick_remove(int index);
void joystick_button_down(int instance_id, uint8_t button);
void joystick_button_up(int instance_id, uint8_t button);
//extern SDL_Event event;
#endif

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#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "cpu.h"
#include "util.h"
#include "video.h"
//#define DEBUG_READ 1
//#define DEBUG_WRITE 1
extern void handleEvent(SDL_Event *event);
extern int cpu_reset, cpu_abort, cpu_nmi, cpu_irq, cpu_stop, cpu_wait;
byte *memory = NULL;
word32 runAddress = 0;
SDL_Event sdl_event;
void EMUL_hardwareUpdate(word32 timestamp) {
static word32 lastUpdate = 0;
int steps = timestamp - lastUpdate;
bool newFrame = video_step(8.0, steps, false);
if (newFrame) {
video_update();
}
if (SDL_PollEvent(&sdl_event)) {
puts("got an event!");
handleEvent(&sdl_event);
}
lastUpdate = timestamp;
}
void EMUL_handleWDM(byte opcode, word32 timestamp) {
printf("got WDM(%d) @ %u\n", opcode, timestamp);
}
byte MEM_readMem(word32 address, word32 timestamp, word32 emulFlags) {
if (address >= 0xdf00 && address < 0xdf20) {
#ifdef DEBUG_READ
printf("readMem: address:%06x, offset:%06x\n", address, address);
#endif
return video_read(address - 0xdf00, false);
}
int offset = 0;
bool outOfRange = false;
if (address < 0x080000) {
offset = address;
} else if (address > 0xc00000 && address < 0xc80000) {
offset = address - 0xb80000;
} else {
// out of range, just return 0xff.
outOfRange = true;
return 0xff;
}
byte b = 0xff;
if (!outOfRange) {
b = *((byte *)(memory + offset));
}
#ifdef DEBUG_READ
printf("readMem: address:%06x, offset:%06x, value:%02x\n", address, offset, b);
#endif
return b;
}
void MEM_writeMem(word32 address, byte b, word32 timestamp) {
if (address >= 0xdf00 && address < 0xdf20) {
video_write(address - 0xdf00, b);
#ifdef DEBUG_WRITE
printf("writeMem: address:%06x, offset:%06x\n", address, address);
#endif
return;
}
int offset = 0;
if (address < 0x080000) {
offset = address;
} else if (address > 0xc00000 && address < 0xc80000) {
offset = address - 0xb80000;
} else {
// out of range, ignore the write.
return;
}
#ifdef DEBUG_WRITE
printf("writeMem: address:%06x, offset:%06x\n", address, offset);
#endif
*((byte *) memory + offset) = b;
}
void initialize() {
puts("initializing memory...");
memory = (byte *) malloc(0x100000);
if (memory == NULL) {
puts("Couldn't create memory.");
} else {
puts("initializing vera...");
video_init(2, (float) 1, "best", 0, 1.0);
video_reset();
}
}
bool endsWith(const char *source_str, const char *search_str) {
int idx = strlen(source_str) - strlen(search_str);
if (idx > 0) {
const char *tmp = (const char *)(source_str + idx);
if (strncmp(tmp, search_str, strlen(search_str)) == 0) {
return true;
}
}
return false;
}
int loadBin(const char *filename) {
FILE *file = fopen(filename, "rb");
if (!file) {
perror("Could not open file.");
return -1;
}
// 0x80000 because we shift addresses
size_t bytesRead = fread((char *)(memory + 0x80000), 1, 0x80000, file);
if (bytesRead != 0x80000) {
perror("Failed to read the complete file");
fclose(file);
return -1;
}
runAddress = 0xc08004;
puts("this is shifted, so $08:0000 is $c0:0000");
hexDump(memory, 0x88000, 64);
return 0;
}
int main(int argc, char *argv[]) {
bool runOk = true;
if (argc < 2) {
puts("bsx file-to-run.bin");
return -1;
}
initialize();
if (endsWith(argv[1], ".bin")) {
if (loadBin(argv[1]))
runOk = false;
}
if (runOk) {
//CPUEvent_initialize();
CPU_setUpdatePeriod(1000);
CPU_setTrace(0);
cpu_reset = 0;
cpu_abort = 0;
cpu_nmi = 0;
cpu_irq = 0;
cpu_stop = 0;
cpu_wait = 0;
P = 0x34;
E = 1;
D.W = 0;
DB = 0;
PC.B.PB = (runAddress >> 16);
S.W = 0x01FF;
A.W = 0;
X.W = 0;
Y.W = 0;
PC.B.L = (runAddress & 0xff);
PC.B.H = ((runAddress >> 8) & 0xff);
CPU_modeSwitch();
CPU_run();
}
return 0;
}

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#undef NATIVE_MODE
#define SHORT_M
#define SHORT_X
#define CPUMODE e1m1x1
#include "opcodes.h"

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#define NATIVE_MODE
#define SHORT_M
#define SHORT_X
#define CPUMODE e0m1x1
#include "opcodes.h"

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#define NATIVE_MODE
#undef SHORT_M
#define SHORT_X
#define CPUMODE e0m0x1
#include "opcodes.h"

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#define NATIVE_MODE
#define SHORT_M
#undef SHORT_X
#define CPUMODE e0m1x0
#include "opcodes.h"

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#define NATIVE_MODE
#undef SHORT_M
#undef SHORT_X
#define CPUMODE e0m0x0
#include "opcodes.h"

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#include "cpu.h"
#include "sdl_events.h"
#include <stdbool.h>
extern int dispatch_quit;
u_int8_t keyboard_keyReady = 0;
SDL_Keysym keyboard_keySym;
u_int8_t keyboard_repeat;
u_int8_t keyboard_state;
void keyboard_init() {
}
byte keyboard_read(u_int8_t register) {
return 0;
}
void keyboard_write(u_int8_t register, byte value) {
}
char translateSDLKey(SDL_Keysym keysym) {
// todo: expand this to handle more keys
// special keys like home/end/etc probably need to send multiple bytes.
// not sure how to deal with that unless ascii key & mod are separate reads.
if (keysym.sym >= SDLK_a && keysym.sym <= SDLK_z) {
// todo: include keysym.mod to get shift state.
return 'a' + (keysym.sym - SDLK_a);
} else if (keysym.sym >= SDLK_0 && keysym.sym <= SDLK_9) {
return '0' + (keysym.sym - SDLK_0);
} else if (keysym.sym == SDLK_SPACE) {
return ' ';
} else if (keysym.sym == SDLK_RETURN) {
return '\n';
} else if (keysym.sym == SDLK_TAB) {
return '\t';
}
// Add more keys as needed
return '\0'; // Return null character for unsupported keys
}
void handleEvent(SDL_Event *event) {
if (event->type == SDL_QUIT) {
puts("SDL_QUIT happened!");
dispatch_quit = 1;
} else if (event->type == SDL_KEYDOWN || event->type == SDL_KEYUP) {
SDL_KeyboardEvent *ke = (SDL_KeyboardEvent *) event;
keyboard_keySym = ke->keysym;
keyboard_repeat = ke->repeat;
keyboard_state = ke->state;
}
}

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#ifndef sdl_events_h
#define sdl_events_h
#include <stdio.h>
#include <SDL.h>
#endif /* sdl_events_h */

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#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "cpu.h"
char *toHex(unsigned long value, unsigned int digits)
{
static char buffer[16];
unsigned int offset = sizeof(buffer);;
buffer[--offset] = 0;
while (digits-- > 0) {
buffer[--offset] = "0123456789ABCDEF"[value & 0xf];
value >>= 4;
}
return (&(buffer[offset]));
}
void hexDump(char *memory, int offset, int length) {
char buffer[256];
char ascii[17] = "";
for (int i = 0; i < 256; i++)
buffer[i] = 0;
for (int i = 0; i < length; i += 16) {
sprintf((char *) buffer, "%04x: ", offset + i);
for (int j = 0; j < 16; j++) {
byte b = memory[offset + j + i];
sprintf((char *) (6 + buffer + j*3), "%02x ", b);
if (b >= 0x20 && b < 0x7f) {
ascii[j] = b;
} else {
ascii[j] = '.';
}
}
strcat(buffer, ascii);
puts(buffer);
}
}
// int main() {
// char buffer[65];
// for (int i = 0; i < 64; i++) {
// buffer[i] = 'A' + i;
// }
// buffer[64] = '\0';
// //hexDump( (const char *) buffer, 0, 64);
// // for (int i = 0; i < 64; i++) {
// // printf("%d = '%c'\n", i, buffer[i]);
// // }
// // puts(buffer);
// hexDump(buffer, 16, 48);
// }

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#pragma once
#include "cpu.h"
char *toHex(unsigned long value, unsigned int digits);
void hexDump(char *memory, int offset, int length);

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src/video.h Normal file
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// Commander X16 Emulator
// Copyright (c) 2019 Michael Steil
// All rights reserved. License: 2-clause BSD
#ifndef _VIDEO_H_
#define _VIDEO_H_
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <SDL.h>
//#include "glue.h"
bool video_init(int window_scale, float screen_x_scale, char *quality, bool fullscreen, float opacity);
void video_reset(void);
bool video_step(float mhz, float steps, bool midline);
void video_update(void);
void video_end(void);
bool video_get_irq_out(void);
void video_save(SDL_RWops *f);
uint8_t video_read(uint8_t reg, bool debugOn);
void video_write(uint8_t reg, uint8_t value);
void video_update_title(const char* window_title);
uint8_t via1_read(uint8_t reg, bool debug);
void via1_write(uint8_t reg, uint8_t value);
// For debugging purposes only:
uint8_t video_space_read(uint32_t address);
void video_space_write(uint32_t address, uint8_t value);
bool video_is_tilemap_address(int addr);
bool video_is_tiledata_address(int addr);
bool video_is_special_address(int addr);
uint32_t video_get_address(uint8_t sel);
#endif

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* DONE add 65c265 compatibility
** DONE Change hard coded vectors to defined ones based on tables below.
** DONE Change references to '260' to '262'
** DONE Change references to '1300' to '1310'
** DONE Add '0,0,' to cpu_cycle_table (5 places?)
** DONE Add 'irne64' flag (like irq flag) and appropriate code in dispatch.c
-> cpu_irne64 CPU_addIrne64()/CPU_clearIrne64
** DONE Add 'irqt5' flag and appropriate code in dispatch.c
-> cpu_irqt5 CPU_addIrqt5()/CPU_clearIrqt5
** DONE update table.c
* TODO Need a Vera demo with new kernel code
* TODO address timing - bsx just runs flat out right now, want stable 8 Mhz.
- instrumentation: how fast are we going?
* TODO Rename sdl_events.c/sdl_events.h
* TODO Keyboard Device.
** TODO 1) Create a new Keyboard device.
- base this on bexemu/keyboard.c
- takes 80 bytes in memory (might want to cut this down)
** TODO 2) Patch the Keyboard device into main.c (mem read/write)
- maybe at $DF20-$DF6F
* TODO SDL_Event logic
- update sdl_events.c logic to process keyboard events and put them info memory.
* TODO Possibly rewrite dispatch loop to be more readable.
- we don't *have* to be as general as the library intends.
* TODO Add more hardware to emulation.
** TODO 65C816 Timer(s) - Start with Timer #5 for now.
- includes interrupt processing.