317 lines
9.9 KiB
Plaintext
317 lines
9.9 KiB
Plaintext
package MemArbiter_Test;
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import Assert::*;
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import StmtFSM::*;
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import Testing::*;
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import Printf::*;
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import List::*;
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import Vector::*;
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import BuildVector::*;
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import MemArbiter::*;
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typedef UInt#(4) Addr;
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typedef struct {
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String name;
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Vector#(n, Maybe#(MemArbiterOp#(Addr))) reqs;
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Maybe#(Addr) forbid_addr;
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Vector#(n, Bool) want_grants;
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Maybe#(Addr) want_forbid_addr;
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} TestCase#(numeric type n) deriving (Bits, Eq);
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function Maybe#(MemArbiterOp#(Addr)) read(Addr addr);
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return tagged Valid MemArbiterOp{write: False, addr: addr};
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endfunction
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function Maybe#(MemArbiterOp#(Addr)) write(Addr addr);
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return tagged Valid MemArbiterOp{write: True, addr: addr};
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endfunction
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function Maybe#(MemArbiterOp#(Addr)) idle();
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return tagged Invalid;
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endfunction
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function Maybe#(Addr) noForbid();
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return tagged Invalid;
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endfunction
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function Maybe#(Addr) forbid(Addr a);
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return tagged Valid a;
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endfunction
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function Vector#(n, Bool) grant(Integer granted);
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function gen(idx);
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return idx == granted;
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endfunction
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return genWith(gen);
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endfunction
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function Vector#(n, Bool) noGrant();
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return replicate(False);
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endfunction
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function TestCase#(n) testCase(String name,
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Vector#(n, Maybe#(MemArbiterOp#(Addr))) reqs,
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Maybe#(Addr) forbid_addr,
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Vector#(n, Bool) want_grants,
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Maybe#(Addr) want_forbid_addr);
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return TestCase{
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name: name,
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reqs: reqs,
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forbid_addr: forbid_addr,
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want_grants: want_grants,
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want_forbid_addr: want_forbid_addr
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};
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endfunction
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interface TB;
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method Action start();
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(* always_ready *)
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method Bool done();
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endinterface
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module mkArbiterTB(MemArbiter#(n, Addr) dut, Vector#(m, TestCase#(n)) tests, TB ifc);
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let cycles <- mkCycleCounter();
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Reg#(Bit#(TLog#(m))) idx <- mkReg(0);
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Reg#(Bool) running <- mkReg(False);
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for (Integer i=0; i<valueOf(n); i=i+1) begin
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rule request (running && isValid(tests[idx].reqs[i]));
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dut.ports[i].request(validValue(tests[idx].reqs[i]));
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endrule
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end
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(* no_implicit_conditions, fire_when_enabled *)
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rule forbid (running && isValid(tests[idx].forbid_addr));
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dut.forbid_addr(validValue(tests[idx].forbid_addr));
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endrule
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Wire#(Maybe#(Addr)) got_forbid_addr <- mkDWire(tagged Invalid);
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(* fire_when_enabled *)
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rule collect_forbid (running);
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got_forbid_addr <= tagged Valid dut.forbidden_addr();
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endrule
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function Fmt req_s(Maybe#(MemArbiterOp#(Addr)) v);
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case (v) matches
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tagged Invalid: return $format("Idle");
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tagged Valid .req &&& req.write: return $format("Write(%0d)", req.addr);
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tagged Valid .req: return $format("Read(%0d)", req.addr);
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endcase
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endfunction
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function Fmt addr_s(Maybe#(Addr) v);
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case (v) matches
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tagged Invalid: return $format("<nil>");
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tagged Valid .a: return $format("%0d", a);
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endcase
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endfunction
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(* no_implicit_conditions, fire_when_enabled *)
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rule check (running);
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let test = tests[idx];
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let reqs = test.reqs;
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let want_grants = test.want_grants;
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let want_forbid_addr = test.want_forbid_addr;
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Vector#(n, Bool) got_grants = newVector;
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for (Integer i=0; i<valueOf(n); i=i+1)
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got_grants[i] = dut.ports[i].grant();
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$display("RUN %s (%0d)", tests[idx].name, idx);
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if (got_grants != want_grants || got_forbid_addr != want_forbid_addr) begin
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$display(" input:");
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for (Integer i=0; i<valueOf(n); i=i+1)
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$display(" ", $format("%0d", i), ": ", req_s(reqs[i]));
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$display(" forbid: ", addr_s(test.forbid_addr));
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$display(" output:");
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$display(" grants: ", fshow(got_grants));
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$display(" forbid: ", addr_s(got_forbid_addr));
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$display(" want grants: ", fshow(tests[idx].want_grants));
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$display(" want forbid: ", addr_s(want_forbid_addr));
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dynamicAssert(False, "wrong arbiter output");
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end
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dynamicAssert(cycles == 1, "arbiter took more than 0 cycles");
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$display("OK %s", tests[idx].name);
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cycles.reset();
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if (idx == fromInteger(valueOf(m)-1))
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running <= False;
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else
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idx <= idx+1;
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endrule
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method Action start() if (!running && idx == 0);
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cycles.reset();
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running <= True;
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endmethod
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method Bool done();
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return !running && idx != 0;
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endmethod
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endmodule
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module mkTB(Empty);
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///////////////////////////////
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// Strict arbiter
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let strictTests = vec(
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// Simple grants
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testCase("All idle",
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vec(idle, idle, idle), noForbid,
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noGrant, noForbid),
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testCase("Port 0 read",
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vec(read(1), idle, idle), noForbid,
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grant(0), noForbid),
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testCase("Port 0 write",
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vec(write(1), idle, idle), noForbid,
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grant(0), forbid(1)),
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testCase("Port 1 read",
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vec(idle, read(1), idle), noForbid,
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grant(1), noForbid),
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testCase("Port 1 write",
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vec(idle, write(1), idle), noForbid,
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grant(1), forbid(1)),
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testCase("Port 2 read",
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vec(idle, idle, read(1)), noForbid,
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grant(2), noForbid),
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testCase("Port 2 write",
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vec(idle, idle, write(1)), noForbid,
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grant(2), forbid(1)),
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// Priorities
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testCase("Port 0+1",
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vec(read(1), read(2), idle), noForbid,
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grant(0), noForbid),
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testCase("Port 0+2",
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vec(read(1), idle, read(2)), noForbid,
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grant(0), noForbid),
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testCase("Port 1+2",
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vec(idle, read(1), read(2)), noForbid,
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grant(1), noForbid),
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testCase("Port 0+1+2",
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vec(read(1), read(2), read(3)), noForbid,
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grant(0), noForbid),
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testCase("Port 0+1+2, overruled writes",
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vec(read(1), write(1), write(2)), noForbid,
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grant(0), noForbid),
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// Forbidden addrs
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testCase("Port 0 read denied",
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vec(read(1), read(2), idle), forbid(1),
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grant(1), noForbid),
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testCase("Port 0 write denied",
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vec(write(1), read(2), idle), forbid(1),
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grant(1), noForbid),
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testCase("Port 0 no addr match",
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vec(write(2), idle, idle), forbid(1),
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grant(0), forbid(2)),
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testCase("Port 0 denied, no alternatives",
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vec(write(1), idle, idle), forbid(1),
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noGrant, noForbid)
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);
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MemArbiter#(3, Addr) strict <- mkPriorityMemArbiter();
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let strictTB <- mkArbiterTB(strict, strictTests);
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///////////////////////////////
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// Round-robin arbiter
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let rrTests = vec(
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// Simple grants
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testCase("All idle",
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vec(idle, idle, idle), noForbid,
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noGrant, noForbid),
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testCase("Port 0 read",
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vec(read(1), idle, idle), noForbid,
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grant(0), noForbid),
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testCase("Port 0 write",
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vec(write(1), idle, idle), noForbid,
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grant(0), forbid(1)),
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testCase("Port 1 read",
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vec(idle, read(1), idle), noForbid,
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grant(1), noForbid),
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testCase("Port 1 write",
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vec(idle, write(1), idle), noForbid,
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grant(1), forbid(1)),
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testCase("Port 2 read",
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vec(idle, idle, read(1)), noForbid,
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grant(2), noForbid),
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testCase("Port 2 write",
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vec(idle, idle, write(1)), noForbid,
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grant(2), forbid(1)),
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// Priorities
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testCase("Port 2 to reset RR",
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vec(idle, idle, read(1)), noForbid,
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grant(2), noForbid),
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testCase("Port 0+1 #1",
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vec(read(1), read(2), idle), noForbid,
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grant(0), noForbid),
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testCase("Port 0+1 #2",
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vec(read(1), read(2), idle), noForbid,
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grant(1), noForbid),
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testCase("Port 0+1 #3",
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vec(read(1), read(2), idle), noForbid,
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grant(0), noForbid),
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testCase("Port 0+2 #1",
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vec(read(1), idle, read(2)), noForbid,
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grant(2), noForbid),
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testCase("Port 0+2 #2",
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vec(read(1), idle, read(2)), noForbid,
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grant(0), noForbid),
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testCase("Port 0+1+2 #1",
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vec(read(1), read(2), read(3)), noForbid,
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grant(1), noForbid),
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testCase("Port 0+1+2 #2",
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vec(read(1), read(2), read(3)), noForbid,
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grant(2), noForbid),
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testCase("Port 0+1+2 #3",
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vec(read(1), read(2), read(3)), noForbid,
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grant(0), noForbid),
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testCase("Port 0+1+2 #4",
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vec(read(1), read(2), read(3)), noForbid,
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grant(1), noForbid),
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// Forbidden addrs
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testCase("Port 2 to reset RR",
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vec(idle, idle, read(1)), noForbid,
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grant(2), noForbid),
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testCase("RR with denied writes #1",
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vec(read(1), write(2), read(3)), forbid(3),
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grant(0), noForbid),
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testCase("RR with denied writes #2",
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vec(read(1), write(2), read(3)), forbid(3),
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grant(1), forbid(2)),
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testCase("RR with denied writes #3",
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vec(read(1), write(2), read(3)), forbid(3),
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grant(0), noForbid),
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testCase("RR with denied writes #4",
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vec(read(1), write(2), read(3)), forbid(3),
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grant(1), forbid(2))
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);
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MemArbiter#(3, Addr) rr <- mkRoundRobinMemArbiter();
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let rrTB <- mkArbiterTB(rr, rrTests);
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runTest(100,
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mkTest("MemArbiter", seq
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mkTest("MemArbiter/Strict", seq
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strictTB.start();
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await(strictTB.done);
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endseq);
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mkTest("MemArbiter/RoundRobin", seq
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rrTB.start();
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await(rrTB.done);
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endseq);
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endseq));
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endmodule
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endpackage
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