package GlitchFilter_Test;

import Assert::*;
import StmtFSM::*;

import GlitchFilter::*;
import Testing::*;

module mkTB();
   let testflags <- mkTestFlags();
   let cycles <- mkCycleCounter();

   let dut <- mkGlitchFilter(3, 0);

   // Slight indirection to appease the compiler: GlitchFilter
   // requires a write on every cycle, and with just the test FSM, the
   // compiler can't prove that this is satisfied. So, give it a
   // default value when the test isn't driving the input, on the
   // first few cycles of the test.
   Wire#(bit) pin_in <- mkDWire(0);
   (* no_implicit_conditions,fire_when_enabled *)
   rule push_in;
      dut <= pin_in;
   endrule

   function Action check_dut(bit in, bit want_out);
      return action
                if (testflags.verbose)
                   $display("%0d: GlitchFilter(%0d) => %0d, want %0d", cycles.all, in, dut, want_out);
                dynamicAssert(dut == want_out, "wrong GlitchFilter output");
                pin_in <= in;
             endaction;
   endfunction

   runTest(100,
      mkTest("GlitchFilter", seq
                                // Simple 0->1 transition
                                check_dut(0, 0);
                                check_dut(1, 0);
                                check_dut(1, 0);
                                check_dut(1, 0);
                                check_dut(1, 1);
                                check_dut(1, 1);

                                // Simple 1->0 transition
                                check_dut(0, 1);
                                check_dut(0, 1);
                                check_dut(0, 1);
                                check_dut(0, 0);
                                check_dut(0, 0);

                                // Glitchy 0->1
                                check_dut(1, 0);
                                check_dut(1, 0);
                                check_dut(0, 0);
                                check_dut(1, 0);
                                check_dut(0, 0);
                                check_dut(1, 0);
                                check_dut(1, 0);
                                check_dut(1, 1);
                                check_dut(1, 1);

                                // Glitchy 1->0
                                check_dut(0, 1);
                                check_dut(0, 1);
                                check_dut(1, 1);
                                check_dut(0, 1);
                                check_dut(1, 1);
                                check_dut(0, 1);
                                check_dut(0, 1);
                                check_dut(0, 0);
                                check_dut(0, 0);
                             endseq));
endmodule

endpackage