dave/gary - gary - Sentinel 65X

Commit Graph

Author	SHA1	Message	Date
David Anderson	80391cefee	lib/DelayLine: plumb verbose test flag into tests	2024-09-09 11:20:13 -07:00
David Anderson	f1e705fd31	lib: add more documentation	2024-08-20 00:29:32 -07:00
David Anderson	85e27554ec	lib: add a DelayLine module A delay line takes a write and echoes it back N cycles later, with N fixed at compile time. It's a handy primitive to have when wrapping Verilog blackbox modules because the blackbox often specifies something like having 2 cycles of latency, and so you need to bubble the fact that a write occurred 2 cycles ago through to the output so that you can wire up the right implicit conditions.	2024-08-19 23:00:15 -07:00

Author

SHA1

Message

Date

David Anderson

80391cefee

lib/DelayLine: plumb verbose test flag into tests

2024-09-09 11:20:13 -07:00

David Anderson

f1e705fd31

lib: add more documentation

2024-08-20 00:29:32 -07:00

David Anderson

85e27554ec

lib: add a DelayLine module

A delay line takes a write and echoes it back N cycles later,
with N fixed at compile time. It's a handy primitive to have
when wrapping Verilog blackbox modules because the blackbox
often specifies something like having 2 cycles of latency,
and so you need to bubble the fact that a write occurred 2
cycles ago through to the output so that you can wire up the
right implicit conditions.

2024-08-19 23:00:15 -07:00

3 Commits