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lib: fix port B reset wiring for ECP5_RAM

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David Anderson 2024-08-13 20:53:47 -07:00
parent 8d2261e245
commit e64b990f80
1 changed files with 1 additions and 1 deletions
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2
lib/ECP5_RAM.v
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@ -160,7 +160,7 @@ module ECP5_RAM(CLKA,
.CSA2(CSA[2]), .CSA2(CSA[2]),
.CSA1(CSA[1]), .CSA1(CSA[1]),
.CSA0(CSA[0]), .CSA0(CSA[0]),
.RSTB(RSTA), .RSTB(RSTB),
.DOB17(DOB[17]), .DOB17(DOB[17]),
.DOB16(DOB[16]), .DOB16(DOB[16]),
.DOB15(DOB[15]), .DOB15(DOB[15]),