adjust 'inv genclk' to allow per-hardware PLLs

This commit is contained in:
David Anderson 2024-09-07 12:10:22 -07:00
parent 77b772c7ee
commit 6e84e9c689
1 changed files with 2 additions and 2 deletions

View File

@ -235,8 +235,8 @@ def clean(c):
shutil.rmtree("out") shutil.rmtree("out")
@task @task
def genclk(c, in_mhz=25, main_mhz=100, cpu_mhz=10, vga_mhz=25): def genclk(c, hardware_name, in_mhz=25, main_mhz=100, cpu_mhz=8, vga_mhz=25):
out = Path("sentinel65x/PLL.v") out = Path(f"hardware/{hardware_name}/PLL.v")
c.run(f"ecppll -f {out} --module PLL --clkin_name CLK_REF --clkin {in_mhz} --clkout0_name CLK_MAIN --clkout0 {main_mhz} --clkout1_name CLK_CPU --clkout1 {cpu_mhz} --clkout2_name CLK_VGA --clkout2 {vga_mhz}") c.run(f"ecppll -f {out} --module PLL --clkin_name CLK_REF --clkin {in_mhz} --clkout0_name CLK_MAIN --clkout0 {main_mhz} --clkout1_name CLK_CPU --clkout1 {cpu_mhz} --clkout2_name CLK_VGA --clkout2 {vga_mhz}")
bsv_out = out.with_suffix(".bsv") bsv_out = out.with_suffix(".bsv")
with open(bsv_out) as f: with open(bsv_out) as f: