diff --git a/vram/VRAM.bsv b/vram/VRAM.bsv
index a128dc8..09198d0 100644
--- a/vram/VRAM.bsv
+++ b/vram/VRAM.bsv
@@ -44,9 +44,12 @@ module mkArbitratedVRAMServers(VRAMServer ram, MemArbiter#(n, VRAMAddr) arb, Vec
    (* fire_when_enabled *)
    rule submit (awaiting_response[1] matches tagged Invalid);
       let port = arb.granted_port();
-      ram.request.put(requests[port].first);
+      let req = requests[port].first;
+      ram.request.put(req);
       requests[port].deq();
-      awaiting_response[1] <= tagged Valid port;
+      // Only reads generate a response.
+      if (req.data matches tagged Invalid)
+         awaiting_response[1] <= tagged Valid port;
    endrule
 
    (* fire_when_enabled *)