diff --git a/vram/VRAM.bsv b/vram/VRAM.bsv
index d22c2f7..d7c0593 100644
--- a/vram/VRAM.bsv
+++ b/vram/VRAM.bsv
@@ -16,6 +16,7 @@ export VRAMAddr, VRAMData, VRAMRequest(..), VRAMResponse(..);
 export VRAMServer(..);
 export VRAM(..), mkVRAM;
 
+// A VRAMServer is a memory port.
 typedef Server#(VRAMRequest, VRAMResponse) VRAMServer;
 
 // mkArbitratedVRAMServers expands a VRAMServer port into multiple
@@ -49,7 +50,7 @@ module mkArbitratedVRAMServers(VRAMServer ram, MemArbiter#(n, VRAMAddr) arb, Vec
    endrule
 
    (* fire_when_enabled *)
-   rule response (awaiting_response[0] matches tagged Valid .port &&& responses[port].notFull);
+   rule response (awaiting_response[0] matches tagged Valid .port);
       let resp <- ram.response.get();
       responses[port].enq(resp);
       awaiting_response[0] <= tagged Invalid;