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"e19af1e1-a19e-435d-b57d-7bb7b2685566") ) (wire (pts (xy 113.03 190.5) (xy 113.03 193.04) ) (stroke (width 0) (type default) ) (uuid "e1d68470-2fa2-4bad-954a-509fb7493a13") ) (bus (pts (xy 33.02 96.52) (xy 38.1 96.52) ) (stroke (width 0) (type default) ) (uuid "e20b6268-d49b-4233-84e7-72454d6b328d") ) (wire (pts (xy 43.18 36.83) (xy 57.15 36.83) ) (stroke (width 0) (type default) ) (uuid "e242125b-63ae-4d37-9e99-bd138ae27cf6") ) (bus (pts (xy 101.6 101.6) (xy 101.6 104.14) ) (stroke (width 0) (type default) ) (uuid "e93b83cf-be1a-427f-813f-6aa23e1dbc8b") ) (wire (pts (xy 55.88 153.67) (xy 36.83 153.67) ) (stroke (width 0) (type default) ) (uuid "ea876c82-1900-4a4d-8e5d-504c83c765bb") ) (wire (pts (xy 158.75 93.98) (xy 144.78 93.98) ) (stroke (width 0) (type default) ) (uuid "ee3e405c-2b16-4406-a9fe-e6aa821f97c5") ) (wire (pts (xy 55.88 172.72) (xy 36.83 172.72) ) (stroke (width 0) (type default) ) (uuid "f0eb82b4-6780-455e-b767-d28d5421eb7b") ) (wire (pts (xy 43.18 57.15) (xy 57.15 57.15) ) (stroke (width 0) (type default) ) (uuid "f40beda3-5a1b-44c1-bf3f-721df9756e1b") ) (wire (pts (xy 129.54 74.93) (xy 129.54 76.2) ) (stroke (width 0) (type default) ) (uuid "fc92d3d4-9fad-4040-86c0-9eefce3b9ac3") ) (wire (pts (xy 43.18 74.93) (xy 57.15 74.93) ) (stroke (width 0) (type default) ) (uuid "ffa3bb2c-07db-4349-9fdf-e9b146d11e9d") ) (text "The address space is divided into primary and secondary regions by the PLD.\n\nThe ~{CS}_{0} range covers 0x00DF00 to 0x00DF1F, and selects the VERA chip.\n\nThe ~{CS}_{1} range covers 0x00DFC0 to 0x00DFFF, and selects the clock port.\n\nThe ~{CS}_{4} range covers 0x008000 to 0x00DEFF and 0x00E000 to 0x00FFFF, and\nselects the on-board flash ROM with ~{ROM}_{0} if ~{CART} is high, and the\ncartridge port ROM with ~{ROM}_{1} if ~{CART} is low. This allows cartridges\nto override the boot sequence simply by grounding pin b31 and having the ASCII\nsequence \"WDC\" at offset 0x008000 on the chip selected by ~{ROM}_{1}.\n\nThe ~{CS}_{5} range covers 0x000200 to 0x007FFF and 0x010000 to 0x3FFFFF, and\nselects the on-board RAM chip with ~{RAM}_{0} if the address is below 0x080000,\nand the cartridge RAM with ~{RAM}_{1} otherwise. The range 0x000000 to 0x0001FF\nselects the SRAM built into the CPU. If this SRAM is disabled, then ~{CS}_{5}\nis extended to cover that range.\n\nThe ~{CS}_{6} range covers 0x400000 to 0xBFFFFF, and selects uncommitted\nexpansion space.\n\nThe ~{CS}_{7} range covers 0xC00000 to 0xFFFFFF, and selects the on-board\nflash ROM with ~{ROM}_{0} if the address is lower than 0xC80000, and selects\nthe expansion ROM with ~{ROM}_{1} otherwise." (exclude_from_sim no) (at 204.47 101.6 0) (effects (font (size 1.27 1.27) ) ) (uuid "96dc46d4-9bbe-48a4-800b-24035b28b21b") ) (text "Resistor values are an estimate. Confirm appropriate\nvalues when LED parts are chosen." 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