210 lines
2.4 KiB
ArmAsm
210 lines
2.4 KiB
ArmAsm
.include "sentinel65x.i"
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* = $C8000
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.null "WDC"
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jml w65c265s_init
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w65c265s_init .proc
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; Disable standard interrupts
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sei
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.short_a
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.long_i
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; Set data bank to 0
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lda #0
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pha
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plb
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.databank 0
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; Set direct page to $0000
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pea $0000
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pld
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.dpage $0000
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; Set stack to $001FF
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ldx #$01FF
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txs
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; Start FCLK
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lda #%00000001
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tsb SSCR
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; Disable the on-CPU ROM
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lda #%10001001
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tsb BCR
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; Disable secondary interrupt sources
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stz UIER
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stz TIER
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stz EIER
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; Enable all used chip select lines.
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lda #%11110011
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sta PCS7
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; Disable all timers
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stz TER
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; Set P5.4 and P5.5 as output
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lda #%00110000
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tsb PDD5
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; Set P6.1 as output
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lda #%00000010
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tsb PDD6
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; Disable on-chip SRAM
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lda #%00000100
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tsb SSCR
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; Select FCLK as the clock source
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lda #%11111010
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tsb SSCR
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; Initialize the VERA
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jsl vera_init
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; Jump to entry point.
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jml start
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.endproc
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blink_red .proc
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pha
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phx
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; Turn on the red LED
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lda #%00010000
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tsb PD5
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ldx #02
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jsl delay
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; Turn off the red LED
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lda #%00010000
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trb PD5
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plx
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pla
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rtl
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.endproc
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blink_green .proc
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pha
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phx
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; Turn on the green LED
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lda #%00100000
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tsb PD5
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ldx #02
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jsl delay
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; Turn off the green LED
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lda #%00100000
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trb PD5
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plx
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pla
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rtl
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.endproc
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blink_blue .proc
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pha
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phx
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; Turn on the blue LED
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lda #%00000010
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tsb PD6
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ldx #02
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jsl delay
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; Turn off the blue LED
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lda #%00000010
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trb PD6
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plx
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pla
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rtl
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.endproc
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; Delay X times.
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delay .proc
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phy
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loop_x
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ldy #$FFFF
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loop_y
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dey
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bne loop_y
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dex
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bne loop_x
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ply
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rtl
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.endproc
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start .proc
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jsl blink_blue
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main_loop
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nop
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bra main_loop
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.endproc
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empty_irq_handler .proc
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phb
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phd
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.long_a
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.long_i
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pha
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phx
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phy
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jmp irq_exit
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.endproc
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nmi_handler .proc
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jsl blink_red
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jsl blink_green
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jsl blink_blue
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rti
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.endproc
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irq_exit .proc
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.long_a
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.long_i
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ply
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plx
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pla
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pld
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plb
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rti
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.endproc
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vera_init .proc
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pha
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jsl blink_red
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jsl blink_green
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pla
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rtl
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.endproc
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.fill $FF80 - *, 0
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* = $FF80
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.fill $FFBA - *, empty_irq_handler
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* = $FFBA
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.word nmi_handler
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.fill $FFFF - *, empty_irq_handler
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.fill 524288 - *, 0
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