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Work on IRQs

This commit is contained in:
Kyle J Cardoza 2024-06-13 16:59:40 -04:00
parent 0630e22e06
commit ccde5b3f5e
6 changed files with 519 additions and 65 deletions
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14
include/vera.i
View File

@ -114,20 +114,6 @@ VERA_PSG_BASE = $1F9C0
VERA_PALETTE_BASE = $1FA00
VERA_SPRITE_ATTR_BASE = $1FC00
; vpoke
; writes an immediate byte to a given register
vpoke .macro reg, value
.save_registers
lda #\value
sta \reg
rep #$20
.al
pla
plp
.endmacro
; vera_address_select - selects the active VERA address register
; Selecting 0 means that the address registers control the address
; accessed by VERA_DATA0, while selecting 1 means controlling the

293
src/irq.s
View File

@ -6,23 +6,118 @@
.section irq_handlers
.logical $00FE00
nmi_user_vector
.long irq_exit
irq_user_vector
.long irq_exit
virq_user_vector
.long irq_exit
brk_user_vector
.long irq_exit
cop_user_vector
.long irq_exit
timer0_user_vector
.long irq_exit
timer1_user_vector
.long irq_exit
timer2_user_vector
.long irq_exit
timer3_user_vector
.long irq_exit
timer4_user_vector
.long irq_exit
timer5_user_vector
.long irq_exit
timer6_user_vector
.long irq_exit
timer7_user_vector
.long irq_exit
empty_irq_handler .proc
rti
phb
phd
.long_a
.long_i
pha
phx
phy
jml irq_exit
.endproc
empty_irq_handler_emu .proc
phb
phd
.short_a
.short_i
pha
phx
phy
jmp irq_exit_emu
.endproc
irq_handler .proc
phb
phd
.short_a
.short_i
pha
phx
phy
jmp [irq_user_vector]
.endproc
virq_handler .proc
phb
phd
.long_a
.long_i
.short_a
.short_i
pha
phx
phy
jmp irq_exit
jmp [virq_user_vector]
.endproc
cop_handler .proc
phb
phd
.short_a
.short_i
pha
phx
phy
jmp [cop_user_vector]
.endproc
brk_handler .proc
phb
phd
.short_a
.short_i
pha
phx
phy
jmp [brk_user_vector]
.endproc
nmi_handler .proc
phb
phd
.long_a
@ -31,11 +126,103 @@ cop_handler .proc
phx
phy
jmp irq_exit
jmp [nmi_user_vector]
.endproc
nmi_handler .proc
rti
timer0_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer0_user_vector]
.endproc
timer1_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer1_user_vector]
.endproc
timer2_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer2_user_vector]
.endproc
timer3_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer3_user_vector]
.endproc
timer4_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer4_user_vector]
.endproc
timer5_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer5_user_vector]
.endproc
timer6_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer6_user_vector]
.endproc
timer7_handler .proc
phb
phd
.long_a
.long_i
pha
phx
phy
jmp [timer7_user_vector]
.endproc
irq_exit .proc
@ -49,45 +236,58 @@ irq_exit .proc
rti
.endproc
irq_exit_emu .proc
.short_a
.short_i
ply
plx
pla
pld
plb
rti
.endproc
.endlogical
.endsection irq_handlers
.section irq_vectors
.logical $00FF80
.addr <>empty_irq_handler ; Timer 0 (Native Mode)
.addr <>empty_irq_handler ; Timer 1 (Native Mode)
.addr <>empty_irq_handler ; Timer 2 (Native Mode)
.addr <>empty_irq_handler ; Timer 3 (Native Mode)
.addr <>empty_irq_handler ; Timer 4 (Native Mode)
.addr <>empty_irq_handler ; Timer 5 (Native Mode)
.addr <>empty_irq_handler ; Timer 6 (Native Mode)
.addr <>empty_irq_handler ; Timer 7 (Native Mode)
.addr <>empty_irq_handler ; PE56 (Native Mode)
.addr <>empty_irq_handler ; NE57 (Native Mode)
.addr <>empty_irq_handler ; PE60 (Native Mode)
.addr <>empty_irq_handler ; PE62 (Native Mode)
.addr <>virq_handler ; NE64/VERA IRQ (Native Mode)
.addr <>empty_irq_handler ; NE66 (Native Mode)
.addr <>empty_irq_handler ; PIB (Native Mode)
.addr <>empty_irq_handler ; IRQ (Native Mode)
.addr <>empty_irq_handler ; UART0 RX (Native Mode)
.addr <>empty_irq_handler ; UART0 TX (Native Mode)
.addr <>empty_irq_handler ; UART1 RX (Native Mode)
.addr <>empty_irq_handler ; UART1 TX (Native Mode)
.addr <>empty_irq_handler ; UART2 RX (Native Mode)
.addr <>empty_irq_handler ; UART2 TX (Native Mode)
.addr <>empty_irq_handler ; UART3 RX (Native Mode)
.addr <>empty_irq_handler ; UART3 TX (Native Mode)
.addr <>empty_irq_handler ; RESERVED
.addr <>empty_irq_handler ; RESERVED
.addr <>cop_handler ; COP (Native Mode)
.addr <>empty_irq_handler ; BRK (Native Mode)
.addr <>empty_irq_handler ; ABORT (Native Mode)
.addr <>nmi_handler ; NMI (Native Mode)
.addr <>empty_irq_handler ; RESERVED
.addr <>empty_irq_handler ; RESERVED
.fill 64, $EA
.addr <>timer0_handler ; Timer 0 (Native Mode)
.addr <>timer1_handler ; Timer 1 (Native Mode)
.addr <>timer2_handler ; Timer 2 (Native Mode)
.addr <>timer3_handler ; Timer 3 (Native Mode)
.addr <>timer4_handler ; Timer 4 (Native Mode)
.addr <>timer5_handler ; Timer 5 (Native Mode)
.addr <>timer6_handler ; Timer 6 (Native Mode)
.addr <>timer7_handler ; Timer 7 (Native Mode)
.addr <>empty_irq_handler ; PE56 (Native Mode)
.addr <>empty_irq_handler ; NE57 (Native Mode)
.addr <>empty_irq_handler ; PE60 (Native Mode)
.addr <>empty_irq_handler ; PE62 (Native Mode)
.addr <>virq_handler ; NE64/VERA IRQ (Native Mode)
.addr <>empty_irq_handler ; NE66 (Native Mode)
.addr <>empty_irq_handler ; PIB (Native Mode)
.addr <>irq_handler ; IRQ (Native Mode)
.addr <>empty_irq_handler ; UART0 RX (Native Mode)
.addr <>empty_irq_handler ; UART0 TX (Native Mode)
.addr <>empty_irq_handler ; UART1 RX (Native Mode)
.addr <>empty_irq_handler ; UART1 TX (Native Mode)
.addr <>empty_irq_handler ; UART2 RX (Native Mode)
.addr <>empty_irq_handler ; UART2 TX (Native Mode)
.addr <>empty_irq_handler ; UART3 RX (Native Mode)
.addr <>empty_irq_handler ; UART3 TX (Native Mode)
.addr <>empty_irq_handler ; RESERVED
.addr <>empty_irq_handler ; RESERVED
.addr <>cop_handler ; COP (Native Mode)
.addr <>brk_handler ; BRK (Native Mode)
.addr <>empty_irq_handler ; ABORT (Native Mode)
.addr <>nmi_handler ; NMI (Native Mode)
.addr <>empty_irq_handler ; RESERVED
.addr <>empty_irq_handler ; RESERVED
; Emtpy handlers for 65C02 emulation mode.
.fill 64, <>empty_irq_handler_emu
.endlogical
.endsection irq_vectors
@ -98,7 +298,18 @@ irq_exit .proc
irq_init .proc
.save_registers
.memcpy $00FE00, $00FE00, $200
; Disable /CS4; This frees the RAM from $008000-$00FDFF for
; user code.
; trampolines.
lda #1 << 4
trb PCS7
; Copy the vectors and handlers into RAM.
.memcpy $00FE00, $C0FE00, $200
; Enable the /NMI input with BCR6 = 1
lda #1 << 6
tsb BCR
.restore_registers
rtl

10
src/main.s
View File

@ -9,16 +9,6 @@ main .proc
jsl irq_init
; Disable /CS4; This frees the RAM from $008000-$00FDFF for
; user code. $00FE00-$00FFFF is for the IRQ vectors and
; trampolines.
lda #1 << 4
trb PCS7
; Enable the /NMI input with BCR6 = 1
lda #1 << 6
tsb BCR
jsl led_init
jsl vera_init

4
src/memory.s
View File

@ -29,6 +29,10 @@
.dsection boot
.cerror * > $C08100
.fill $C08100 - *, $EA
.dsection data
.cerror * > $C0FE00
.fill $C0FE00 - *, $EA
* = $C0FE00
.dsection irq_handlers

2
src/vera.s
View File

@ -5,6 +5,8 @@ vera_init .proc
jsl vera_reset
; Load the VERA font.
.restore_registers
rtl
.endproc

261
src/vera_font.s Normal file
View File

@ -0,0 +1,261 @@
.section data
vera_font
.byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $7e, $81, $a5, $81, $81, $bd, $99, $81, $81, $7e, $00, $00, $00, $00
.byte $00, $00, $7e, $ff, $db, $ff, $ff, $c3, $e7, $ff, $ff, $7e, $00, $00, $00, $00
.byte $00, $00, $00, $00, $6c, $fe, $fe, $fe, $fe, $7c, $38, $10, $00, $00, $00, $00
.byte $00, $00, $00, $00, $10, $38, $7c, $fe, $7c, $38, $10, $00, $00, $00, $00, $00
.byte $00, $00, $00, $18, $3c, $3c, $e7, $e7, $e7, $18, $18, $3c, $00, $00, $00, $00
.byte $00, $00, $00, $18, $3c, $7e, $ff, $ff, $7e, $18, $18, $3c, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $18, $3c, $3c, $18, $00, $00, $00, $00, $00, $00
.byte $ff, $ff, $ff, $ff, $ff, $ff, $e7, $c3, $c3, $e7, $ff, $ff, $ff, $ff, $00, $00
.byte $00, $00, $00, $00, $00, $3c, $66, $42, $42, $66, $3c, $00, $00, $00, $00, $00
.byte $ff, $ff, $ff, $ff, $ff, $c3, $99, $bd, $bd, $99, $c3, $ff, $ff, $ff, $00, $00
.byte $00, $00, $1e, $0e, $1a, $32, $78, $cc, $cc, $cc, $cc, $78, $00, $00, $00, $00
.byte $00, $00, $3c, $66, $66, $66, $66, $3c, $18, $7e, $18, $18, $00, $00, $00, $00
.byte $00, $00, $3f, $33, $3f, $30, $30, $30, $30, $70, $f0, $e0, $00, $00, $00, $00
.byte $00, $00, $7f, $63, $7f, $63, $63, $63, $63, $67, $e7, $e6, $c0, $00, $00, $00
.byte $00, $00, $00, $18, $18, $db, $3c, $e7, $3c, $db, $18, $18, $00, $00, $00, $00
.byte $00, $80, $c0, $e0, $f0, $f8, $fe, $f8, $f0, $e0, $c0, $80, $00, $00, $00, $00
.byte $00, $02, $06, $0e, $1e, $3e, $fe, $3e, $1e, $0e, $06, $02, $00, $00, $00, $00
.byte $00, $00, $18, $3c, $7e, $18, $18, $18, $7e, $3c, $18, $00, $00, $00, $00, $00
.byte $00, $00, $28, $28, $28, $28, $28, $28, $28, $00, $28, $28, $00, $00, $00, $00
.byte $00, $00, $7e, $92, $92, $92, $92, $72, $12, $12, $12, $12, $00, $00, $00, $00
.byte $00, $38, $44, $40, $30, $48, $44, $44, $24, $18, $04, $44, $38, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $00, $fe, $fe, $fe, $fe, $00, $00, $00, $00
.byte $00, $00, $18, $3c, $7e, $18, $18, $18, $7e, $3c, $18, $7e, $00, $00, $00, $00
.byte $00, $00, $18, $3c, $7e, $18, $18, $18, $18, $18, $18, $18, $00, $00, $00, $00
.byte $00, $00, $18, $18, $18, $18, $18, $18, $18, $7e, $3c, $18, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $18, $0c, $fe, $0c, $18, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $30, $60, $fe, $60, $30, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $c0, $c0, $c0, $fe, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $28, $6c, $fe, $6c, $28, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $10, $38, $38, $7c, $7c, $fe, $fe, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $fe, $fe, $7c, $7c, $38, $38, $10, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $10, $10, $10, $10, $10, $10, $10, $00, $10, $10, $00, $00, $00, $00
.byte $00, $00, $24, $24, $24, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $24, $24, $24, $7e, $24, $24, $7e, $24, $24, $24, $00, $00, $00, $00
.byte $10, $10, $7c, $92, $90, $90, $7c, $12, $12, $92, $7c, $10, $10, $00, $00, $00
.byte $00, $00, $64, $94, $68, $08, $10, $10, $20, $2c, $52, $4c, $00, $00, $00, $00
.byte $00, $00, $18, $24, $24, $18, $30, $4a, $44, $44, $44, $3a, $00, $00, $00, $00
.byte $00, $00, $10, $10, $10, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $08, $10, $20, $20, $20, $20, $20, $20, $10, $08, $00, $00, $00, $00
.byte $00, $00, $20, $10, $08, $08, $08, $08, $08, $08, $10, $20, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $24, $18, $7e, $18, $24, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $10, $10, $7c, $10, $10, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $10, $10, $20, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $7e, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $10, $10, $00, $00, $00, $00
.byte $00, $00, $04, $04, $08, $08, $10, $10, $20, $20, $40, $40, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $46, $4a, $52, $62, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $08, $18, $28, $08, $08, $08, $08, $08, $08, $3e, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $02, $04, $08, $10, $20, $40, $7e, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $02, $1c, $02, $02, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $02, $06, $0a, $12, $22, $42, $7e, $02, $02, $02, $00, $00, $00, $00
.byte $00, $00, $7e, $40, $40, $40, $7c, $02, $02, $02, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $1c, $20, $40, $40, $7c, $42, $42, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $7e, $42, $02, $04, $04, $08, $08, $10, $10, $10, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $42, $3c, $42, $42, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $42, $42, $3e, $02, $02, $04, $38, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $10, $10, $00, $00, $00, $10, $10, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $10, $10, $00, $00, $00, $10, $10, $20, $00, $00, $00
.byte $00, $00, $00, $04, $08, $10, $20, $40, $20, $10, $08, $04, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $7e, $00, $00, $7e, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $20, $10, $08, $04, $02, $04, $08, $10, $20, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $02, $04, $08, $08, $00, $08, $08, $00, $00, $00, $00
.byte $00, $00, $7c, $82, $9e, $a2, $a2, $a2, $a6, $9a, $80, $7e, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $42, $42, $7e, $42, $42, $42, $42, $00, $00, $00, $00
.byte $00, $00, $7c, $42, $42, $42, $7c, $42, $42, $42, $42, $7c, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $40, $40, $40, $40, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $78, $44, $42, $42, $42, $42, $42, $42, $44, $78, $00, $00, $00, $00
.byte $00, $00, $7e, $40, $40, $40, $78, $40, $40, $40, $40, $7e, $00, $00, $00, $00
.byte $00, $00, $7e, $40, $40, $40, $78, $40, $40, $40, $40, $40, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $40, $40, $40, $4e, $42, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $42, $42, $42, $42, $7e, $42, $42, $42, $42, $42, $00, $00, $00, $00
.byte $00, $00, $38, $10, $10, $10, $10, $10, $10, $10, $10, $38, $00, $00, $00, $00
.byte $00, $00, $0e, $04, $04, $04, $04, $04, $04, $44, $44, $38, $00, $00, $00, $00
.byte $00, $00, $42, $44, $48, $50, $60, $60, $50, $48, $44, $42, $00, $00, $00, $00
.byte $00, $00, $40, $40, $40, $40, $40, $40, $40, $40, $40, $7e, $00, $00, $00, $00
.byte $00, $00, $82, $c6, $aa, $92, $92, $82, $82, $82, $82, $82, $00, $00, $00, $00
.byte $00, $00, $42, $42, $42, $62, $52, $4a, $46, $42, $42, $42, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $42, $42, $42, $42, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $7c, $42, $42, $42, $42, $7c, $40, $40, $40, $40, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $42, $42, $42, $42, $42, $42, $4a, $3c, $02, $00, $00, $00
.byte $00, $00, $7c, $42, $42, $42, $42, $7c, $50, $48, $44, $42, $00, $00, $00, $00
.byte $00, $00, $3c, $42, $40, $40, $3c, $02, $02, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $fe, $10, $10, $10, $10, $10, $10, $10, $10, $10, $00, $00, $00, $00
.byte $00, $00, $42, $42, $42, $42, $42, $42, $42, $42, $42, $3c, $00, $00, $00, $00
.byte $00, $00, $42, $42, $42, $42, $42, $24, $24, $24, $18, $18, $00, $00, $00, $00
.byte $00, $00, $82, $82, $82, $82, $82, $92, $92, $aa, $c6, $82, $00, $00, $00, $00
.byte $00, $00, $42, $42, $24, $24, $18, $18, $24, $24, $42, $42, $00, $00, $00, $00
.byte $00, $00, $82, $82, $44, $44, $28, $10, $10, $10, $10, $10, $00, $00, $00, $00
.byte $00, $00, $7e, $02, $02, $04, $08, $10, $20, $40, $40, $7e, $00, $00, $00, $00
.byte $00, $00, $38, $20, $20, $20, $20, $20, $20, $20, $20, $38, $00, $00, $00, $00
.byte $00, $00, $40, $40, $20, $20, $10, $10, $08, $08, $04, $04, $00, $00, $00, $00
.byte $00, $00, $38, $08, $08, $08, $08, $08, $08, $08, $08, $38, $00, $00, $00, $00
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.byte $00, $00, $38, $44, $44, $38, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $18, $18, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $18, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $06, $04, $04, $04, $04, $44, $44, $44, $24, $14, $0c, $00, $00, $00
.byte $00, $00, $78, $44, $44, $44, $44, $44, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $70, $88, $10, $20, $40, $f8, $00, $00, $00, $00, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $7c, $7c, $7c, $7c, $7c, $7c, $7c, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
.endsection data