From 90f07361b0f01b9cd31c7fc46320ff182b1e2751 Mon Sep 17 00:00:00 2001 From: Kyle Cardoza Date: Sat, 23 Mar 2024 21:27:27 -0400 Subject: [PATCH] Work on fleshing out sections --- Audio & Video.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Audio & Video.md b/Audio & Video.md index 471f703..6a8d74b 100644 --- a/Audio & Video.md +++ b/Audio & Video.md @@ -106,7 +106,7 @@ Bit 0 of the `ADDRx_H` is bit 16 of the address of the data port selected by `AD The `DATA0` register, located at `0x00DF03`, is the first of two data registers available from VERA. It reads or writes the address in VERA's internal memory set in `ADDR0_L`, `ADDR0_M`, and `ADDR0_H`. -If the value in `INCR0` is nonzero, then after reading or writing from or to `DATA0`, the address stored in `ADDR0_L`, `ADDR0_M`, and `ADDR0_H` will be incremented by the number of addresses in the [table above](#ADDRx_H). If `DECR0` is set, then the address will _decrement_ by that amount instead. +If the value in `INCR0` is nonzero, then after reading or writing from or to `DATA0`, the address stored in `ADDR0_L`, `ADDR0_M`, and `ADDR0_H` will be incremented by the number of addresses in the [table above](#addrx_h). If `DECR0` is set, then the address will _decrement_ by that amount instead. ### DATA1