Work on fleshing out sections

2024-03-23 20:45:49 -04:00 · 2024-03-23 20:45:49 -04:00 · 3a74d20880
parent 4c5bc52ebb
commit 3a74d20880
1 changed files with 1 additions and 1 deletions
--- a/Video.md
+++ b/Video.md
@ -66,7 +66,7 @@ VERA is configured and controlled using a series of 32 memory-mapped I/O registe
  <th>Bit&nbsp;0</th>
 </tr>
 <tr>
-  <td>`0x00DF00`</td>
+  <td><pre>0x00DF00</pre></td>
  <td>ADDRx_L (x=ADDRSEL)</td>
  <td colspan="8" align="center">VRAM Address (7:0)</td>
 </tr>