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Sentinel65X-Handbook
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Work on fleshing out sections

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Kyle Cardoza 2024-03-22 20:46:28 -04:00
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Audio & Video.md
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# Audio & Video
## VERA Video
## VERA Audio
## The Sentinel 65X A/V Port

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Clock Port.md
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# Clock Port
The Sentinel 65X clock port is a small, 28-pin female pin header on the mainboard, which exposes the system's debug serial line, I2C bus, reset and main interrupt lines, `PHI2` clock signal, and a 64-address memory-mapped I/O region, mapped to memory beginning at `0x00DFC0`. This region of uncommitted expansion is reserved for the use of user-installed clock port accessories.

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Controller Ports.md
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# Controller Ports
Sentinel 65X supports up to four SNES-compatible controller ports, read under software control using the integrated GPIO pins on the CPU.
The kernel itself will have, as part of its system timer IRQ, the job of reading in all controllers and storing their state at a known address in memory.