Implemented vera_reset()

This commit is contained in:
Kyle J Cardoza 2024-07-16 01:22:47 -04:00
parent 3e6a97dd81
commit d73480c27a
2 changed files with 41 additions and 5 deletions

View File

@ -54,12 +54,9 @@ void vera_mem_clear(uint32_t dest, size_t length) {
}
}
void vera_reset(void) {
uint8_t ctrl = vera_ctrl_read();
vera_ctrl_write(ctrl | (1 << 7));
}
void vera_init(void) {
vera_reset();
vera_mem_write(VERA_PALETTE_BASE, &vera_palette, 0x200);
vera_mem_write(TEXT_CONSOLE_TILES, &vera_font_0, 0x1000);
vera_mem_set(TEXT_CONSOLE0_VRAM, 0x00, 0x4000);
@ -83,4 +80,6 @@ void vera_init(void) {
vera_ien_write(0b00000000);
vera_isr_write(0b00000111);
vera_dc_video_write(0b00010001);
vera_mem_write(TEXT_CONSOLE0_VRAM, (void *)(0xC00000), 0x4000);
}

View File

@ -7,8 +7,10 @@
#include "macros.h"
#include "kernel/hardware/65c816.h"
#include "kernel/hardware/w65c265s.h"
#include "kernel/hardware/vera.h"
.public vera_reset
.public vera_addr_l_read
.public vera_addr_l_write
.public vera_addr_m_read
@ -84,6 +86,41 @@
.section farcode,text
vera_reset:
pha
phy
short_a
; Turn off the VERA.
lda #1 << 2
trb PD4
; Now we delay a while.
ldy ##0x1FFF
delay_y1
dey
bne delay_y1
; Turn on the VERA.
lda #1 << 2
tsb PD4
; Now we delay another while.
ldy ##0xFFFF
delay_y2
dey
bne delay_y2
ldy ##0xBFFF
delay_y3
dey
bne delay_y3
long_a
ply
pla
rtl
vera_addr_l_read:
short_a
lda long:VERA_ADDRx_L