init work
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65975d61fb
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@ -32,19 +32,6 @@ delay_y
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dey
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bne delay_y
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// Set stack to $001FF
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ldx ##0x01FF
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txs
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// Set data bank to 0
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lda #0
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pha
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plb
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// Set direct page to $0000
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pea #0x0000
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pld
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// Enable all the in-use chip select lines.
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lda #0b11110011
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sta PCS7
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@ -32,6 +32,7 @@
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.section code, noreorder
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.pubweak __program_root_section
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__program_root_section:
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clc
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xce ; native 16-bit mode
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@ -51,6 +52,7 @@ __program_root_section:
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.section code, noroot, noreorder
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.pubweak __data_initialization_needed
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.extern __initialize_sections
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__data_initialization_needed:
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lda ##.word2 (.sectionEnd data_init_table)
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sta dp:.tiny(_Dp+6)
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@ -66,6 +68,7 @@ __data_initialization_needed:
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.section code, noroot, noreorder
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.pubweak __call_initialize_global_streams
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.extern __initialize_global_streams
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__call_initialize_global_streams:
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jsl long:__initialize_global_streams
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@ -73,6 +76,7 @@ __call_initialize_global_streams:
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.section code, noroot, noreorder
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.pubweak __call_heap_initialize
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.extern __heap_initialize, __default_heap
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__call_heap_initialize:
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lda ##.word2 (.sectionStart heap)
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sta dp:.tiny(_Dp+6)
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