diff --git a/Makefile b/Makefile index c88cded..8cbe014 100755 --- a/Makefile +++ b/Makefile @@ -21,11 +21,14 @@ clean: -name '*.bin' -o \ -name '*.elf' -o \ -name '*.a' -o \ - -name '*.lst' \ + -name '*.lst' -o \ + -name '*.list' \ \) -delete @find src -type f \( \ -name '*.o' -o \ -name '*.bin' \ + -name '*.lst' -o \ + -name '*.list' \ \) -delete .PHONY: flash diff --git a/config/kernel.scm b/config/kernel.scm index 0d10c7e..1f2166a 100755 --- a/config/kernel.scm +++ b/config/kernel.scm @@ -1,7 +1,7 @@ (define memories '( (memory RAM - (address (#x001000 . #x002FFF)) + (address (#x001000 . #x003FFF)) (type RAM) (section zhuge) (section znear) diff --git a/include/kernel/hardware/vera.h b/include/kernel/hardware/vera.h index 31b4c55..30ed7f8 100755 --- a/include/kernel/hardware/vera.h +++ b/include/kernel/hardware/vera.h @@ -59,67 +59,67 @@ // Offsets (relative to VERA_BASE) for each VERA register -#define VERA_ADDRx_L VERA_BASE + 0x00 -#define VERA_ADDRx_M VERA_BASE + 0x01 -#define VERA_ADDRx_H VERA_BASE + 0x02 +#define VERA_ADDRx_L (VERA_BASE + 0x00) +#define VERA_ADDRx_M (VERA_BASE + 0x01) +#define VERA_ADDRx_H (VERA_BASE + 0x02) // Accssible with ADDRSEL 0 -#define VERA_ADDR0_L VERA_BASE + 0x00 -#define VERA_ADDR0_M VERA_BASE + 0x01 -#define VERA_ADDR0_H VERA_BASE + 0x02 +#define VERA_ADDR0_L (VERA_BASE + 0x00) +#define VERA_ADDR0_M (VERA_BASE + 0x01) +#define VERA_ADDR0_H (VERA_BASE + 0x02) // Accssible with ADDRSEL 1 -#define VERA_ADDR1_L VERA_BASE + 0x00 -#define VERA_ADDR1_M VERA_BASE + 0x01 -#define VERA_ADDR1_H VERA_BASE + 0x02 +#define VERA_ADDR1_L (VERA_BASE + 0x00) +#define VERA_ADDR1_M (VERA_BASE + 0x01) +#define VERA_ADDR1_H (VERA_BASE + 0x02) -#define VERA_DATA_0 VERA_BASE + 0x03 -#define VERA_DATA_1 VERA_BASE + 0x04 +#define VERA_DATA_0 (VERA_BASE + 0x03) +#define VERA_DATA_1 (VERA_BASE + 0x04) -#define VERA_CTRL VERA_BASE + 0x05 -#define VERA_IEN VERA_BASE + 0x06 -#define VERA_ISR VERA_BASE + 0x07 -#define VERA_IRQLINE_L VERA_BASE + 0x08 -#define VERA_SCANLINE_L VERA_BASE + 0x08 +#define VERA_CTRL (VERA_BASE + 0x05) +#define VERA_IEN (VERA_BASE + 0x06) +#define VERA_ISR (VERA_BASE + 0x07) +#define VERA_IRQLINE_L (VERA_BASE + 0x08) +#define VERA_SCANLINE_L (VERA_BASE + 0x08) // Accssible with DCSEL 0 -#define VERA_DC_VIDEO VERA_BASE + 0x09 -#define VERA_DC_HSCALE VERA_BASE + 0x0A -#define VERA_DC_VSCALE VERA_BASE + 0x0B -#define VERA_DC_BORDER VERA_BASE + 0x0C +#define VERA_DC_VIDEO (VERA_BASE + 0x09) +#define VERA_DC_HSCALE (VERA_BASE + 0x0A) +#define VERA_DC_VSCALE (VERA_BASE + 0x0B) +#define VERA_DC_BORDER (VERA_BASE + 0x0C) // Accssible with DCSEL 1 -#define VERA_DC_HSTART VERA_BASE + 0x09 -#define VERA_DC_HSTOP VERA_BASE + 0x0A -#define VERA_DC_VSTART VERA_BASE + 0x0B -#define VERA_DC_VSTOP VERA_BASE + 0x0C +#define VERA_DC_HSTART (VERA_BASE + 0x09) +#define VERA_DC_HSTOP (VERA_BASE + 0x0A) +#define VERA_DC_VSTART (VERA_BASE + 0x0B) +#define VERA_DC_VSTOP (VERA_BASE + 0x0C) // Layer 0 -#define VERA_L0_CONFIG VERA_BASE + 0x0D -#define VERA_L0_MAPBASE VERA_BASE + 0x0E -#define VERA_L0_TILEBASE VERA_BASE + 0x0F -#define VERA_L0_HSCROLL_L VERA_BASE + 0x10 -#define VERA_L0_HSCROLL_H VERA_BASE + 0x11 -#define VERA_L0_VSCROLL_L VERA_BASE + 0x12 -#define VERA_L0_VSCROLL_H VERA_BASE + 0x13 +#define VERA_L0_CONFIG (VERA_BASE + 0x0D) +#define VERA_L0_MAPBASE (VERA_BASE + 0x0E) +#define VERA_L0_TILEBASE (VERA_BASE + 0x0F) +#define VERA_L0_HSCROLL_L (VERA_BASE + 0x10) +#define VERA_L0_HSCROLL_H (VERA_BASE + 0x11) +#define VERA_L0_VSCROLL_L (VERA_BASE + 0x12) +#define VERA_L0_VSCROLL_H (VERA_BASE + 0x13) // Layer 1 -#define VERA_L1_CONFIG VERA_BASE + 0x14 -#define VERA_L1_MAPBASE VERA_BASE + 0x15 -#define VERA_L1_TILEBASE VERA_BASE + 0x16 -#define VERA_L1_HSCROLL_L VERA_BASE + 0x17 -#define VERA_L1_HSCROLL_H VERA_BASE + 0x18 -#define VERA_L1_VSCROLL_L VERA_BASE + 0x19 -#define VERA_L1_VSCROLL_H VERA_BASE + 0x1A +#define VERA_L1_CONFIG (VERA_BASE + 0x14) +#define VERA_L1_MAPBASE (VERA_BASE + 0x15) +#define VERA_L1_TILEBASE (VERA_BASE + 0x16) +#define VERA_L1_HSCROLL_L (VERA_BASE + 0x17) +#define VERA_L1_HSCROLL_H (VERA_BASE + 0x18) +#define VERA_L1_VSCROLL_L (VERA_BASE + 0x19) +#define VERA_L1_VSCROLL_H (VERA_BASE + 0x1A) // Audio -#define VERA_AUDIO_CTRL VERA_BASE + 0x1B -#define VERA_AUDIO_RATE VERA_BASE + 0x1C -#define VERA_AUDIO_DATA VERA_BASE + 0x1D +#define VERA_AUDIO_CTRL (VERA_BASE + 0x1B) +#define VERA_AUDIO_RATE (VERA_BASE + 0x1C) +#define VERA_AUDIO_DATA (VERA_BASE + 0x1D) // SPI (Unused in prototype four!) -#define VERA_SPI_DATA VERA_BASE + 0x1E -#define VERA_SPI_CTRL VERA_BASE + 0x1F +#define VERA_SPI_DATA (VERA_BASE + 0x1E) +#define VERA_SPI_CTRL (VERA_BASE + 0x1F) // VRAM layout #define TEXT_CONSOLE_TILES 0x000800 @@ -132,953 +132,221 @@ // The assembler can't handle this stuff. #ifdef __CALYPSI_CC__ -static inline uint8_t vera_addr_l_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF00 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_addr_l_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF00 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_addr_m_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF01 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_addr_m_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF01 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_addr_h_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF02 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_addr_h_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF02 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_data_0_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF03 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_data_0_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF03 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_data_1_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF04 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_data_1_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF04 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_ctrl_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF05 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_ctrl_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF05 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_ien_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF06 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_ien_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF06 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_isr_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF07 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_isr_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF07 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_scanline_l_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF08 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_irq_line_l_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF08 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_video_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " lda 0x00DF09 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_video_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " pla \n" - " sta 0x00DF09 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_hscale_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " lda 0x00DF0A \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_hscale_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " pla \n" - " sta 0x00DF0A \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_vscale_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " lda 0x00DF0B \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_vscale_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " pla \n" - " sta 0x00DF0B \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_border_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " lda 0x00DF0C \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_border_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " trb 0x00DF05 \n" - " pla \n" - " sta 0x00DF0C \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_hstart_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " lda 0x00DF09 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_hstart_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " pla \n" - " sta 0x00DF09 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_hstop_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " lda 0x00DF0A \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_hstop_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " pla \n" - " sta 0x00DF0A \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_vstart_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " lda 0x00DF0B \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_vstart_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " pla \n" - " sta 0x00DF0B \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_dc_vstop_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " lda 0x00DF0C \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_dc_vstop_write(uint8_t value) { - __asm(" sep #0x20 \n" - " pha \n" - " lda #0b00000010 \n" - " tsb 0x00DF05 \n" - " pla \n" - " sta 0x00DF0C \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_config_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF0D \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_config_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF0D \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_mapbase_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF0E \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_mapbase_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF0E \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_tilebase_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF0F \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_tilebase_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF0F \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_hscroll_l_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF10 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_hscroll_l_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF10 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_hscroll_h_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF11 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_hscroll_h_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF11 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_vscroll_l_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF12 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_vscroll_l_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF12 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l0_vscroll_h_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF13 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l0_vscroll_h_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF13 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_config_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF14 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_config_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF14 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_mapbase_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF15 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_mapbase_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF15 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_tilebase_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF16 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_tilebase_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF16 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_hscroll_l_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF17 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_hscroll_l_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF17 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_hscroll_h_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF18 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_hscroll_h_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF18 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_vscroll_l_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF19 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_vscroll_l_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF19 \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_l1_vscroll_h_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF1A \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_vscroll_h_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF1A \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_audio_ctrl_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF1B \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_audio_ctrl_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF1B \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_audio_rate_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF1C \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_audio_rate_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF1C \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_audio_data_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF1D \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_audio_data_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF1D \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_spi_data_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF1E \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_spi_data_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF1E \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} - -static inline uint8_t vera_spi_ctrl_read(void) { - uint8_t result; - - __asm(" sep #0x20 \n" - " lda 0x00DF1F \n" - " rep #0x20 \n" - " and 0x00FF \n" - : "=Ka"(result) - : - : "c" - ); - return result; -} - -static inline void vera_l1_spi_ctrl_write(uint8_t value) { - __asm(" sep #0x20 \n" - " sta 0x00DF1F \n" - " rep #0x20 \n" - " and 0x00FF \n" - : - : "Ka"(value) - : "c" - ); -} +__attribute__((simple_call)) +uint8_t vera_addr_l_read(void); + +__attribute__((simple_call)) +void vera_addr_l_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_addr_m_read(void); + +__attribute__((simple_call)) +void vera_addr_m_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_addr_h_read(void); + +__attribute__((simple_call)) +void vera_addr_h_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_data_0_read(void); + +__attribute__((simple_call)) +void vera_data_0_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_data_1_read(void); + +__attribute__((simple_call)) +void vera_data_1_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_ctrl_read(void); + +__attribute__((simple_call)) +void vera_ctrl_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_ien_read(void); + +__attribute__((simple_call)) +void vera_ien_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_isr_read(void); + +__attribute__((simple_call)) +void vera_isr_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_scanline_l_read(void); + +__attribute__((simple_call)) +void vera_irq_line_l_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_video_read(void); + +__attribute__((simple_call)) +void vera_dc_video_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_hscale_read(void); + +__attribute__((simple_call)) +void vera_dc_hscale_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_vscale_read(void); + +__attribute__((simple_call)) +void vera_dc_vscale_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_border_read(void); + +__attribute__((simple_call)) +void vera_dc_border_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_hstart_read(void); + +__attribute__((simple_call)) +void vera_dc_hstart_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_hstop_read(void); + +__attribute__((simple_call)) +void vera_dc_hstop_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_vstart_read(void); + +__attribute__((simple_call)) +void vera_dc_vstart_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_dc_vstop_read(void); + +__attribute__((simple_call)) +void vera_dc_vstop_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_config_read(void); + +__attribute__((simple_call)) +void vera_l0_config_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_mapbase_read(void); + +__attribute__((simple_call)) +void vera_l0_mapbase_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_tilebase_read(void); + +__attribute__((simple_call)) +void vera_l0_tilebase_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_hscroll_l_read(void); + +__attribute__((simple_call)) +void vera_l0_hscroll_l_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_hscroll_h_read(void); + +__attribute__((simple_call)) +void vera_l0_hscroll_h_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_vscroll_l_read(void); + +__attribute__((simple_call)) +void vera_l0_vscroll_l_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l0_vscroll_h_read(void); + +__attribute__((simple_call)) +void vera_l0_vscroll_h_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_config_read(void); + +__attribute__((simple_call)) +void vera_l1_config_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_mapbase_read(void); + +__attribute__((simple_call)) +void vera_l1_mapbase_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_tilebase_read(void); + +__attribute__((simple_call)) +void vera_l1_tilebase_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_hscroll_l_read(void); + +__attribute__((simple_call)) +void vera_l1_hscroll_l_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_hscroll_h_read(void); + +__attribute__((simple_call)) +void vera_l1_hscroll_h_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_vscroll_l_read(void); + +__attribute__((simple_call)) +void vera_l1_vscroll_l_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_l1_vscroll_h_read(void); + +__attribute__((simple_call)) +void vera_l1_vscroll_h_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_audio_ctrl_read(void); + +__attribute__((simple_call)) +void vera_audio_ctrl_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_audio_rate_read(void); + +__attribute__((simple_call)) +void vera_audio_rate_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_audio_data_read(void); + +__attribute__((simple_call)) +void vera_audio_data_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_spi_data_read(void); + +__attribute__((simple_call)) +void vera_l1_spi_data_write(uint8_t value); + +__attribute__((simple_call)) +uint8_t vera_spi_ctrl_read(void); + +__attribute__((simple_call)) +uint8_t vera_l1_spi_ctrl_write(uint8_t value); void vera_init(void); diff --git a/src/kernel/cstartup.s b/src/kernel/cstartup.s index d410496..9ab6bea 100755 --- a/src/kernel/cstartup.s +++ b/src/kernel/cstartup.s @@ -46,13 +46,13 @@ w65c265s_init: short_a long_i - ; We reset the VERA at boot. So P4.2 is an output held high. + ; Turn on the VERA. lda #1 << 2 - trb PD4 + tsb PD4 tsb PDD4 ; Now we delay a while. - ldy ##0x0FFF + ldy ##0x1FFF delay_y1 dey bne delay_y1 diff --git a/src/kernel/hardware/vera/vera.c b/src/kernel/hardware/vera/vera.c index cd6dc85..4f9f256 100644 --- a/src/kernel/hardware/vera/vera.c +++ b/src/kernel/hardware/vera/vera.c @@ -12,12 +12,12 @@ extern uint16_t *vera_palette; -extern uint8_t vera_font_0; +extern uint8_t *vera_font_0; void vera_address_select(uint8_t value) { uint8_t ctrl = vera_ctrl_read(); - if ((value & 0b00000001) == 0) { + if (value == 0) { ctrl &= 0b11111110; } else { ctrl |= 0b00000001; @@ -27,9 +27,9 @@ void vera_address_select(uint8_t value) { } void vera_address_set(uint32_t address) { - vera_addr_l_write(address & 0x0000FF); - vera_addr_m_write((address & 0x00FF00) >> 8); - vera_addr_h_write((address & 0xFF0000) >> 16); + vera_addr_l_write(address & 0x000000FF); + vera_addr_m_write((address >> 8) & 0x000000FF); + vera_addr_h_write((address >> 16) & 0x000000FF); } void vera_mem_read(void *dest, uint32_t src, size_t length) { @@ -39,7 +39,7 @@ void vera_mem_read(void *dest, uint32_t src, size_t length) { vera_address_set(src | AUTO_INC_1); for (size_t count = 0; count < length; count += 1) { - *destination = vera_data_0_read(); + destination[count] = vera_data_0_read(); } } @@ -50,7 +50,7 @@ void vera_mem_write(uint32_t dest, void *src, size_t length) { uint8_t *source = src; for (size_t count = 0; count < length; count += 1) { - vera_data_0_write(*(source + count)); + vera_data_0_write(source[count]); } } @@ -78,5 +78,29 @@ void vera_reset(void) { } void vera_init(void) { - vera_reset(); + + vera_mem_write(VERA_PALETTE_BASE, &vera_palette, 0x200); + vera_mem_write(TEXT_CONSOLE_TILES, &vera_font_0, 0x1000); + + vera_dc_hscale_write(0x80); + vera_dc_vscale_write(0x80); + + vera_dc_hstart_write(0); + vera_dc_hstop_write(640 >> 2); + vera_dc_vstart_write(0); + vera_dc_vstop_write(480 >> 1); + + vera_l0_config_write(VERA_L_BPP1 | VERA_L_64H | VERA_L_128W); + vera_l0_mapbase_write(TEXT_CONSOLE0_VRAM >> 9); + vera_l0_tilebase_write(((TEXT_CONSOLE_TILES >> 9) & 0b11111100) | VERA_TILESIZE8x16); + vera_l0_hscroll_l_write(0); + vera_l0_hscroll_h_write(0); + vera_l0_vscroll_l_write(0); + vera_l0_vscroll_h_write(0); + + vera_ien_write(0b00000000); + vera_isr_write(0b00000111); + vera_dc_video_write(0b00010001); + + vera_mem_write(TEXT_CONSOLE0_VRAM, (void*)(0xC00000), 0x4000); } diff --git a/src/kernel/hardware/vera/vera_lowlevel.s b/src/kernel/hardware/vera/vera_lowlevel.s new file mode 100644 index 0000000..23187e5 --- /dev/null +++ b/src/kernel/hardware/vera/vera_lowlevel.s @@ -0,0 +1,633 @@ +; SPDX-License-Identifier: MIT +; +; src/kernel/hardware/vera/vera_lowleve.s +; Direct hardware read/write calls for VERA driver +; +; Copyright © 2024 Kyle J Cardoza + +#include "macros.h" +#include "kernel/hardware/65c816.h" +#include "kernel/hardware/vera.h" + + .public vera_addr_l_read + .public vera_addr_l_write + .public vera_addr_m_read + .public vera_addr_m_write + .public vera_addr_h_read + .public vera_addr_h_write + .public vera_data_0_read + .public vera_data_0_write + .public vera_data_1_read + .public vera_data_1_write + .public vera_ctrl_read + .public vera_ctrl_write + .public vera_ien_read + .public vera_ien_write + .public vera_isr_read + .public vera_isr_write + .public vera_scanline_l_read + .public vera_irq_line_l_write + .public vera_dc_video_read + .public vera_dc_video_write + .public vera_dc_hscale_read + .public vera_dc_hscale_write + .public vera_dc_vscale_read + .public vera_dc_vscale_write + .public vera_dc_border_read + .public vera_dc_border_write + .public vera_dc_hstart_read + .public vera_dc_hstart_write + .public vera_dc_hstop_read + .public vera_dc_hstop_write + .public vera_dc_vstart_read + .public vera_dc_vstart_write + .public vera_dc_vstop_read + .public vera_dc_vstop_write + .public vera_l0_config_read + .public vera_l0_config_write + .public vera_l0_mapbase_read + .public vera_l0_mapbase_write + .public vera_l0_tilebase_read + .public vera_l0_tilebase_write + .public vera_l0_hscroll_l_read + .public vera_l0_hscroll_l_write + .public vera_l0_hscroll_h_read + .public vera_l0_hscroll_h_write + .public vera_l0_vscroll_l_read + .public vera_l0_vscroll_l_write + .public vera_l0_vscroll_h_read + .public vera_l0_vscroll_h_write + .public vera_l1_config_read + .public vera_l1_config_write + .public vera_l1_mapbase_read + .public vera_l1_mapbase_write + .public vera_l1_tilebase_read + .public vera_l1_tilebase_write + .public vera_l1_hscroll_l_read + .public vera_l1_hscroll_l_write + .public vera_l1_hscroll_h_read + .public vera_l1_hscroll_h_write + .public vera_l1_vscroll_l_read + .public vera_l1_vscroll_l_write + .public vera_l1_vscroll_h_read + .public vera_l1_vscroll_h_write + .public vera_audio_ctrl_read + .public vera_audio_ctrl_write + .public vera_audio_rate_read + .public vera_audio_rate_write + .public vera_audio_data_read + .public vera_audio_data_write + .public vera_spi_data_read + .public vera_l1_spi_data_write + .public vera_spi_ctrl_read + .public vera_l1_spi_ctrl_write + + .section farcode,text + +vera_addr_l_read: + short_a + lda long:VERA_ADDRx_L + long_a + and ##0x00FF + rtl + +vera_addr_l_write: + short_a + sta long:VERA_ADDRx_L + long_a + rtl + +vera_addr_m_read: + short_a + lda long:VERA_ADDRx_M + long_a + and ##0x00FF + rtl + +vera_addr_m_write: + short_a + sta long:VERA_ADDRx_M + long_a + rtl + +vera_addr_h_read: + short_a + lda long:VERA_ADDRx_H + long_a + and ##0x00FF + rtl + +vera_addr_h_write: + short_a + sta long:VERA_ADDRx_H + long_a + rtl + +vera_data_0_read: + short_a + lda long:VERA_DATA_0 + long_a + and ##0x00FF + rtl + +vera_data_0_write: + short_a + sta long:VERA_DATA_0 + long_a + rtl + +vera_data_1_read: + short_a + lda long:VERA_DATA_1 + long_a + and ##0x00FF + rtl + +vera_data_1_write: + short_a + sta long:VERA_DATA_1 + long_a + rtl + +vera_ctrl_read: + short_a + lda long:VERA_CTRL + long_a + and ##0x00FF + rtl + +vera_ctrl_write: + short_a + sta long:VERA_CTRL + long_a + rtl + +vera_ien_read: + short_a + lda long:VERA_IEN + long_a + and ##0x00FF + rtl + +vera_ien_write: + short_a + sta long:VERA_IEN + long_a + rtl + +vera_isr_read: + short_a + lda long:VERA_ISR + long_a + and ##0x00FF + rtl + +vera_isr_write: + short_a + sta long:VERA_ISR + long_a + rtl + +vera_scanline_l_read: + short_a + lda long:VERA_SCANLINE_L + long_a + and ##0x00FF + rtl + +vera_irq_line_l_write: + short_a + sta long:VERA_IRQLINE_L + long_a + rtl + +vera_dc_video_read: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + lda long:VERA_DC_VIDEO + long_a + and ##0x00FF + rtl + +vera_dc_video_write: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + sta long:VERA_DC_VIDEO + long_a + rtl + +vera_dc_hscale_read: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + lda long:VERA_DC_HSCALE + long_a + and ##0x00FF + rtl + +vera_dc_hscale_write: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + sta long:VERA_DC_HSCALE + long_a + rtl + +vera_dc_vscale_read: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + lda long:VERA_DC_VSCALE + long_a + and ##0x00FF + rtl + +vera_dc_vscale_write: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + sta long:VERA_DC_VSCALE + long_a + rtl + +vera_dc_border_read: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + lda long:VERA_DC_BORDER + long_a + and ##0x00FF + rtl + +vera_dc_border_write: + short_a + pha + lda long:VERA_CTRL + and #0b11111101 + sta long:VERA_CTRL + pla + sta long:VERA_DC_BORDER + long_a + rtl + +vera_dc_hstart_read: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + lda long:VERA_DC_HSTART + long_a + and ##0x00FF + rtl + +vera_dc_hstart_write: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + sta long:VERA_DC_HSTART + long_a + rtl + +vera_dc_hstop_read: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + lda long:VERA_DC_HSTOP + long_a + and ##0x00FF + rtl + +vera_dc_hstop_write: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + sta long:VERA_DC_HSTOP + long_a + rtl + +vera_dc_vstart_read: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + lda long:VERA_DC_VSTART + long_a + and ##0x00FF + rtl + +vera_dc_vstart_write: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + sta long:VERA_DC_VSTART + long_a + rtl + +vera_dc_vstop_read: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + lda long:VERA_DC_VSTOP + long_a + and ##0x00FF + rtl + +vera_dc_vstop_write: + short_a + pha + lda long:VERA_CTRL + ora #0b00000010 + sta long:VERA_CTRL + pla + sta long:VERA_DC_VSTOP + long_a + rtl + +vera_l0_config_read: + short_a + lda long:VERA_L0_CONFIG + long_a + and ##0x00FF + rtl + +vera_l0_config_write: + short_a + sta long:VERA_L0_CONFIG + long_a + rtl + +vera_l0_mapbase_read: + short_a + lda long:VERA_L0_MAPBASE + long_a + and ##0x00FF + rtl + +vera_l0_mapbase_write: + short_a + sta long:VERA_L0_MAPBASE + long_a + rtl + +vera_l0_tilebase_read: + short_a + lda long:VERA_L0_TILEBASE + long_a + and ##0x00FF + rtl + +vera_l0_tilebase_write: + short_a + sta long:VERA_L0_TILEBASE + long_a + rtl + +vera_l0_hscroll_l_read: + short_a + lda long:VERA_L0_HSCROLL_L + long_a + and ##0x00FF + rtl + +vera_l0_hscroll_l_write: + short_a + sta long:VERA_L0_HSCROLL_L + long_a + rtl + +vera_l0_hscroll_h_read: + short_a + lda long:VERA_L0_HSCROLL_H + long_a + and ##0x00FF + rtl + +vera_l0_hscroll_h_write: + short_a + sta long:VERA_L0_HSCROLL_H + long_a + rtl + +vera_l0_vscroll_l_read: + short_a + lda long:VERA_L0_VSCROLL_L + long_a + and ##0x00FF + rtl + +vera_l0_vscroll_l_write: + short_a + sta long:VERA_L0_VSCROLL_L + long_a + rtl + +vera_l0_vscroll_h_read: + short_a + lda long:VERA_L0_VSCROLL_H + long_a + and ##0x00FF + rtl + +vera_l0_vscroll_h_write: + short_a + sta long:VERA_L0_VSCROLL_H + long_a + rtl + +vera_l1_config_read: + short_a + lda long:VERA_L1_CONFIG + long_a + and ##0x00FF + rtl + +vera_l1_config_write: + short_a + sta long:VERA_L1_CONFIG + long_a + rtl + +vera_l1_mapbase_read: + short_a + lda long:VERA_L1_MAPBASE + long_a + and ##0x00FF + rtl + +vera_l1_mapbase_write: + short_a + sta long:VERA_L1_MAPBASE + long_a + rtl + +vera_l1_tilebase_read: + short_a + lda long:VERA_L1_TILEBASE + long_a + and ##0x00FF + rtl + +vera_l1_tilebase_write: + short_a + sta long:VERA_L1_TILEBASE + long_a + rtl + +vera_l1_hscroll_l_read: + short_a + lda long:VERA_L1_HSCROLL_L + long_a + and ##0x00FF + rtl + +vera_l1_hscroll_l_write: + short_a + sta long:VERA_L1_HSCROLL_L + long_a + rtl + +vera_l1_hscroll_h_read: + short_a + lda long:VERA_L1_HSCROLL_H + long_a + and ##0x00FF + rtl + +vera_l1_hscroll_h_write: + short_a + sta long:VERA_L1_HSCROLL_H + long_a + rtl + +vera_l1_vscroll_l_read: + short_a + lda long:VERA_L1_VSCROLL_L + long_a + and ##0x00FF + rtl + +vera_l1_vscroll_l_write: + short_a + sta long:VERA_L1_VSCROLL_L + long_a + rtl + +vera_l1_vscroll_h_read: + short_a + lda long:VERA_L1_VSCROLL_H + long_a + and ##0x00FF + rtl + +vera_l1_vscroll_h_write: + short_a + sta long:VERA_L1_VSCROLL_H + long_a + rtl + +vera_audio_ctrl_read: + short_a + lda long:VERA_AUDIO_CTRL + long_a + and ##0x00FF + rtl + +vera_audio_ctrl_write: + short_a + sta long:VERA_AUDIO_CTRL + long_a + rtl + +vera_audio_rate_read: + short_a + lda long:VERA_AUDIO_RATE + long_a + and ##0x00FF + rtl + +vera_audio_rate_write: + short_a + sta long:VERA_AUDIO_RATE + long_a + rtl + +vera_audio_data_read: + short_a + lda long:VERA_AUDIO_DATA + long_a + and ##0x00FF + rtl + +vera_audio_data_write: + short_a + sta long:VERA_AUDIO_DATA + long_a + rtl + +vera_spi_data_read: + short_a + lda long:VERA_SPI_DATA + long_a + and ##0x00FF + rtl + +vera_l1_spi_data_write: + short_a + sta long:VERA_SPI_DATA + long_a + rtl + +vera_spi_ctrl_read: + short_a + lda long:VERA_SPI_CTRL + long_a + and ##0x00FF + rtl + +vera_l1_spi_ctrl_write: + short_a + sta long:VERA_SPI_CTRL + long_a + rtl \ No newline at end of file diff --git a/vera.s b/vera.s new file mode 100644 index 0000000..440fbf5 --- /dev/null +++ b/vera.s @@ -0,0 +1,471 @@ +; Generated by Calypsi ISO C compiler for 65816 + + .rtmodel version,"1" + .rtmodel codeModel,"large" + .rtmodel dataModel,"small" + .rtmodel core,"65816" + .rtmodel huge,"0" + .extern _Dp + .extern _Vfp + .extern vera_addr_h_write + .extern vera_addr_l_write + .extern vera_addr_m_write + .extern vera_ctrl_read + .extern vera_ctrl_write + .extern vera_data_0_read + .extern vera_data_0_write + .extern vera_dc_hscale_write + .extern vera_dc_hstart_write + .extern vera_dc_hstop_write + .extern vera_dc_video_write + .extern vera_dc_vscale_write + .extern vera_dc_vstart_write + .extern vera_dc_vstop_write + .extern vera_font_0 + .extern vera_ien_write + .extern vera_isr_write + .extern vera_l0_config_write + .extern vera_l0_hscroll_h_write + .extern vera_l0_hscroll_l_write + .extern vera_l0_mapbase_write + .extern vera_l0_tilebase_write + .extern vera_l0_vscroll_h_write + .extern vera_l0_vscroll_l_write + .extern vera_palette +; // SPDX-License-Identifier: MIT +; // +; // src/kernel/hardware/vera/vera.c +; // IRQ handlers +; // +; // Copyright © 2024 Kyle J Cardoza +; +; #include +; +; #include "kernel/hardware/vera.h" +; #include "kernel/util/delay.h" +; +; extern uint16_t *vera_palette; +; +; extern uint8_t *vera_font_0; +; +; void vera_address_select(uint8_t value) { + .section farcode,text + .public vera_address_select +vera_address_select: + phy + sep #32 + sta 1,s + rep #32 +; uint8_t ctrl = vera_ctrl_read(); + jsl long:vera_ctrl_read + sep #32 + sta 2,s + rep #32 +; +; if (value == 0) { + sep #32 + lda 1,s + rep #32 + bne `?L4` +; ctrl &= 0b11111110; + lda ##254 + and 2,s + sep #32 + sta 1,s + rep #32 + sep #32 + lda 1,s + sta 1,s + rep #32 + bra `?L5` +`?L4`: +; } else { +; ctrl |= 0b00000001; + lda ##1 + ora 2,s + sep #32 + sta 1,s + rep #32 + sep #32 + lda 1,s + sta 1,s + rep #32 +`?L5`: +; } +; +; vera_ctrl_write(ctrl); + lda 1,s + jsl long:vera_ctrl_write +; } + ply + rtl +; +; void vera_address_set(uint32_t address) { + .section farcode,text + .public vera_address_set +vera_address_set: + pei dp:.tiny (_Dp+8) + pei dp:.tiny (_Dp+10) + stx dp:.tiny (_Dp+10) + sta dp:.tiny (_Dp+8) +; vera_addr_l_write(address & 0x000000FF); + lda dp:.tiny (_Dp+8) + jsl long:vera_addr_l_write +; vera_addr_m_write((address >> 8) & 0x000000FF); + ldx dp:.tiny (_Dp+10) + lda dp:.tiny (_Dp+8) + ldy ##8 + stx dp:.tiny _Dp + iny + dey + beq `?L47` +`?L48`: + lsr dp:.tiny _Dp + ror a + dey + bne `?L48` +`?L47`: + ldx dp:.tiny _Dp + stx dp:.tiny (_Dp+2) + sta dp:.tiny _Dp + lda dp:.tiny (_Dp+2) + and ##0 + tax + lda dp:.tiny _Dp + and ##255 + jsl long:vera_addr_m_write +; vera_addr_h_write((address >> 16) & 0x000000FF); + ldx dp:.tiny (_Dp+10) + lda dp:.tiny (_Dp+8) + txa + ldx ##0 + stx dp:.tiny (_Dp+2) + sta dp:.tiny _Dp + lda dp:.tiny (_Dp+2) + and ##0 + tax + lda dp:.tiny _Dp + and ##255 + jsl long:vera_addr_h_write +; } + ply + sty dp:.tiny (_Dp+10) + ply + sty dp:.tiny (_Dp+8) + rtl +; +; void vera_mem_read(void *dest, uint32_t src, size_t length) { + .section farcode,text + .public vera_mem_read +vera_mem_read: + pei dp:.tiny (_Dp+8) + pei dp:.tiny (_Dp+10) + phy + phy + ldx dp:.tiny _Dp + stx dp:.tiny (_Dp+8) + ldx dp:.tiny (_Dp+2) + stx dp:.tiny (_Dp+10) +; uint8_t *destination = dest; + sta 1,s +; +; vera_address_select(0); + lda ##0 + jsl long:vera_address_select +; vera_address_set(src | AUTO_INC_1); + lda dp:.tiny (_Dp+10) + ora ##16 + tax + lda dp:.tiny (_Dp+8) + ora ##0 + jsl long:vera_address_set +; +; for (size_t count = 0; count < length; count += 1) { + lda ##0 + sta 3,s + lda 3,s + sta 3,s +`?L14`: lda 3,s + cmp 12,s + bcc `?L13` +; destination[count] = vera_data_0_read(); +; } +; } + ply + ply + ply + sty dp:.tiny (_Dp+10) + ply + sty dp:.tiny (_Dp+8) + rtl +`?L13`: + jsl long:vera_data_0_read + tax + lda 1,s + tay + txa + sep #32 + sta (3,s),y + rep #32 + lda 3,s + inc a + sta 3,s + bra `?L14` +; +; void vera_mem_write(uint32_t dest, void *src, size_t length) { + .section farcode,text + .public vera_mem_write +vera_mem_write: + pei dp:.tiny (_Dp+8) + pei dp:.tiny (_Dp+10) + pei dp:.tiny (_Dp+12) + pei dp:.tiny (_Dp+14) + phy + phy + stx dp:.tiny (_Dp+14) + sta dp:.tiny (_Dp+12) + lda dp:.tiny _Dp + sta dp:.tiny (_Dp+10) + lda dp:.tiny (_Dp+2) + sta dp:.tiny (_Dp+8) +; vera_address_select(0); + lda ##0 + jsl long:vera_address_select +; vera_address_set(dest | AUTO_INC_1); + lda dp:.tiny (_Dp+14) + ora ##16 + tax + lda dp:.tiny (_Dp+12) + ora ##0 + jsl long:vera_address_set +; +; uint8_t *source = src; + lda dp:.tiny (_Dp+10) + sta 1,s +; +; for (size_t count = 0; count < length; count += 1) { + lda ##0 + sta 3,s + lda 3,s + sta 3,s +`?L21`: lda 3,s + cmp dp:.tiny (_Dp+8) + bcc `?L20` +; vera_data_0_write(source[count]); +; } +; } + ply + ply + ply + sty dp:.tiny (_Dp+14) + ply + sty dp:.tiny (_Dp+12) + ply + sty dp:.tiny (_Dp+10) + ply + sty dp:.tiny (_Dp+8) + rtl +`?L20`: lda 1,s + tay + lda (3,s),y + jsl long:vera_data_0_write + lda 3,s + inc a + sta 3,s + bra `?L21` +; +; void vera_mem_set(uint32_t dest, uint8_t value, size_t length) { + .section farcode,text + .public vera_mem_set +vera_mem_set: + pei dp:.tiny (_Dp+8) + pei dp:.tiny (_Dp+12) + pei dp:.tiny (_Dp+14) + phy + stx dp:.tiny (_Dp+14) + sta dp:.tiny (_Dp+12) + lda dp:.tiny _Dp + sta dp:.tiny (_Dp+8) +; vera_address_select(0); + lda ##0 + jsl long:vera_address_select +; vera_address_set(dest | AUTO_INC_1); + lda dp:.tiny (_Dp+14) + ora ##16 + tax + lda dp:.tiny (_Dp+12) + ora ##0 + jsl long:vera_address_set +; +; for (size_t count = 0; count < length; count += 1) { + lda ##0 + sta 1,s + lda 1,s + sta 1,s +`?L28`: lda 1,s + cmp dp:.tiny (_Dp+8) + bcc `?L27` +; vera_data_0_write(value); +; } +; } + ply + ply + sty dp:.tiny (_Dp+14) + ply + sty dp:.tiny (_Dp+12) + ply + sty dp:.tiny (_Dp+8) + rtl +`?L27`: lda 12,s + jsl long:vera_data_0_write + lda 1,s + inc a + sta 1,s + bra `?L28` +; +; void vera_mem_clear(uint32_t dest, size_t length) { + .section farcode,text + .public vera_mem_clear +vera_mem_clear: + pei dp:.tiny (_Dp+8) + pei dp:.tiny (_Dp+12) + pei dp:.tiny (_Dp+14) + phy + stx dp:.tiny (_Dp+14) + sta dp:.tiny (_Dp+12) + lda dp:.tiny _Dp + sta dp:.tiny (_Dp+8) +; vera_address_select(0); + lda ##0 + jsl long:vera_address_select +; vera_address_set(dest | AUTO_INC_1); + lda dp:.tiny (_Dp+14) + ora ##16 + tax + lda dp:.tiny (_Dp+12) + ora ##0 + jsl long:vera_address_set +; +; for (size_t count = 0; count < length; count += 1) { + lda ##0 + sta 1,s + lda 1,s + sta 1,s +`?L35`: lda 1,s + cmp dp:.tiny (_Dp+8) + bcc `?L34` +; vera_data_0_write(0x00); +; } +; } + ply + ply + sty dp:.tiny (_Dp+14) + ply + sty dp:.tiny (_Dp+12) + ply + sty dp:.tiny (_Dp+8) + rtl +`?L34`: lda ##0 + jsl long:vera_data_0_write + lda 1,s + inc a + sta 1,s + bra `?L35` +; +; void vera_reset(void) { + .section farcode,text + .public vera_reset +vera_reset: +; uint8_t ctrl = vera_ctrl_read(); + jsl long:vera_ctrl_read +; vera_ctrl_write(ctrl | (1 << 7)); + ora ##128 + jsl long:vera_ctrl_write +; } + rtl +; +; void vera_init(void) { + .section farcode,text + .public vera_init +vera_init: +; +; vera_mem_write(VERA_PALETTE_BASE, vera_palette, 0x200); + ldx ##0x200 + stx dp:.tiny (_Dp+2) + ldx vera_palette + stx dp:.tiny _Dp + lda ##0xfa00 + ldx ##1 + jsl long:vera_mem_write +; vera_mem_write(TEXT_CONSOLE_TILES, vera_font_0, 0x1000); + ldx ##0x1000 + stx dp:.tiny (_Dp+2) + ldx vera_font_0 + stx dp:.tiny _Dp + lda ##0x800 + ldx ##0 + jsl long:vera_mem_write +; +; vera_dc_hscale_write(0x80); + lda ##128 + jsl long:vera_dc_hscale_write +; vera_dc_vscale_write(0x80); + lda ##128 + jsl long:vera_dc_vscale_write +; +; vera_dc_hstart_write(0); + lda ##0 + jsl long:vera_dc_hstart_write +; vera_dc_hstop_write(640 >> 2); + lda ##160 + jsl long:vera_dc_hstop_write +; vera_dc_vstart_write(0); + lda ##0 + jsl long:vera_dc_vstart_write +; vera_dc_vstop_write(480 >> 1); + lda ##240 + jsl long:vera_dc_vstop_write +; +; vera_l0_config_write(VERA_L_BPP1 | VERA_L_64H | VERA_L_128W); + lda ##96 + jsl long:vera_l0_config_write +; vera_l0_mapbase_write(TEXT_CONSOLE0_VRAM >> 9); + lda ##12 + jsl long:vera_l0_mapbase_write +; vera_l0_tilebase_write(((TEXT_CONSOLE_TILES >> 9) & 0b11111100) | VERA_TILESIZE8x16); + lda ##6 + jsl long:vera_l0_tilebase_write +; vera_l0_hscroll_l_write(0); + lda ##0 + jsl long:vera_l0_hscroll_l_write +; vera_l0_hscroll_h_write(0); + lda ##0 + jsl long:vera_l0_hscroll_h_write +; vera_l0_vscroll_l_write(0); + lda ##0 + jsl long:vera_l0_vscroll_l_write +; vera_l0_vscroll_h_write(0); + lda ##0 + jsl long:vera_l0_vscroll_h_write +; +; vera_ien_write(0b00000000); + lda ##0 + jsl long:vera_ien_write +; vera_isr_write(0b00000111); + lda ##7 + jsl long:vera_isr_write +; vera_dc_video_write(0b00010001); + lda ##17 + jsl long:vera_dc_video_write +; +; vera_mem_write(TEXT_CONSOLE0_VRAM, (void*)(0xC00000), 0x4000); + ldx ##0x4000 + stx dp:.tiny (_Dp+2) + ldx ##0 + stx dp:.tiny _Dp + lda ##0x1800 + ldx ##0 + jsl long:vera_mem_write +; } + rtl +