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combined boot.s into cstartup.s

This commit is contained in:
Kyle J Cardoza 2024-07-12 00:19:17 -04:00
parent f749b29b7b
commit 70988d6df1
3 changed files with 117 additions and 132 deletions
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58
src/kernel/boot.s
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@ -1,58 +0,0 @@
//; SPDX-License-Identifier: MIT
//;
//; boot/boot.s
//; Boot code for Sentinel 65X
//;
//; Copyright <20> 2024 Kyle J Cardoza <Kyle.Cardoza@icloud.com>
#include "sentinel65x.h"
.extern __program_root_section
.section boot, noreorder
.asciz "WDC"
w65c265s_init:
// Disable interrupts
sei
stz UIER
stz TIER
stz EIER
short_a
long_i
// We reset the VERA at boot. So P4.2 is an output, held
// low until later in the boot sequence.
lda #1 << 2
trb PD4
tsb PDD4
// Now we delay a while.
ldy ##0x0FFF
delay_y
dey
bne delay_y
// Enable all the in-use chip select lines.
lda #0b11110011
sta PCS7
// Disable the on-CPU ROM
w65c265s_rom_off
// Disable the on-CPU RAM
w65c265s_sram_off
; Set P5.4 and P5.5 as output
lda #0b00110000
trb PDD5
tsb PDD5
trb PD5
; Set P6.1 as output
lda #0b00000010
trb PDD6
tsb PDD6
trb PD6
// And we are booted enough to jump to high ROM.
jmp long:__program_root_section

68
src/kernel/cstartup.s
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@ -20,23 +20,57 @@
#include "macros.h"
#include "65c816.h"
#include "w65c265s.h"
#include "65c816.h"
;;; ***************************************************************************
;;;
;;; __program_start - actual start point of the program
;;;
;;; Set up CPU stack, ini
#include "65c816.h"tialize sections and call main().
;;; You can override this with your own routine, or tailor it as needed.
;;; The easiest way to make custom initialization is to provide your own
;;; __low_level_init which gets called after stacks have been initialized.
;;;
;;; ***************************************************************************
.section code, noreorder
.section boot, noreorder
.pubweak __program_root_section
__program_root_section:
.asciz "WDC"
w65c265s_init:
// Disable interrupts
sei
stz UIER
stz TIER
stz EIER
short_a
long_i
// We reset the VERA at boot. So P4.2 is an output, held
// low until later in the boot sequence.
lda #1 << 2
trb PD4
tsb PDD4
// Now we delay a while.
ldy ##0x0FFF
delay_y
dey
bne delay_y
// Enable all the in-use chip select lines.
lda #0b11110011
sta PCS7
// Disable the on-CPU ROM
w65c265s_rom_off
// Disable the on-CPU RAM
w65c265s_sram_off
; Set P5.4 and P5.5 as output
lda #0b00110000
trb PDD5
tsb PDD5
trb PD5
; Set P6.1 as output
lda #0b00000010
trb PDD6
tsb PDD6
trb PD6
wdm #0x80
clc
xce ; native 16-bit mode
@ -53,7 +87,7 @@ __program_root_section:
plb ; set data bank
;;; **** Initialize data sections if needed.
.section code, noroot, noreorder
.section boot, noroot, noreorder
.pubweak __data_initialization_needed
.extern __initialize_sections
@ -69,7 +103,7 @@ __data_initialization_needed:
jsl long:__initialize_sections
;;; **** Initialize streams if needed.
.section code, noroot, noreorder
.section boot, noroot, noreorder
.pubweak __call_initialize_global_streams
.extern __initialize_global_streams
@ -77,7 +111,7 @@ __call_initialize_global_streams:
jsl long:__initialize_global_streams
;;; **** Initialize heap if needed.
.section code, noroot, noreorder
.section boot, noroot, noreorder
.pubweak __call_heap_initialize
.extern __heap_initialize, __default_heap
@ -96,7 +130,7 @@ __call_heap_initialize:
wdm #0x81
.section code, root, noreorder
.section boot, root, noreorder
lda ##0 ; argc = 0
jsl long:main
jmp long:exit

9
src/kernel/main.c
View File

@ -6,5 +6,14 @@
// Copyright © 2024 Kyle J Cardoza <Kyle.Cardoza@icloud.com>
void main(void) {
// Light Red LED
__asm(
" sep #0x20\n"
" lda #0b00010000\n"
" tsb 0x00DF21\n"
" rep #0x20\n"
);
for (;;) {}
}